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Documentation: KVM: make corrections to locking.rst
Correct grammar and punctuation. Use "read-only" for consistency. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Sean Christopherson <seanjc@google.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: kvm@vger.kernel.org Cc: Jonathan Corbet <corbet@lwn.net> Cc: linux-doc@vger.kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net> Link: https://lore.kernel.org/r/20230612030810.23376-3-rdunlap@infradead.org
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@ -67,7 +67,7 @@ following two cases:
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2. Write-Protection: The SPTE is present and the fault is caused by
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write-protect. That means we just need to change the W bit of the spte.
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What we use to avoid all the race is the Host-writable bit and MMU-writable bit
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What we use to avoid all the races is the Host-writable bit and MMU-writable bit
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on the spte:
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- Host-writable means the gfn is writable in the host kernel page tables and in
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@ -130,7 +130,7 @@ to gfn. For indirect sp, we disabled fast page fault for simplicity.
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A solution for indirect sp could be to pin the gfn, for example via
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kvm_vcpu_gfn_to_pfn_atomic, before the cmpxchg. After the pinning:
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- We have held the refcount of pfn that means the pfn can not be freed and
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- We have held the refcount of pfn; that means the pfn can not be freed and
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be reused for another gfn.
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- The pfn is writable and therefore it cannot be shared between different gfns
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by KSM.
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@ -186,22 +186,22 @@ writable between reading spte and updating spte. Like below case:
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The Dirty bit is lost in this case.
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In order to avoid this kind of issue, we always treat the spte as "volatile"
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if it can be updated out of mmu-lock, see spte_has_volatile_bits(), it means,
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if it can be updated out of mmu-lock [see spte_has_volatile_bits()]; it means
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the spte is always atomically updated in this case.
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3) flush tlbs due to spte updated
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If the spte is updated from writable to readonly, we should flush all TLBs,
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If the spte is updated from writable to read-only, we should flush all TLBs,
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otherwise rmap_write_protect will find a read-only spte, even though the
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writable spte might be cached on a CPU's TLB.
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As mentioned before, the spte can be updated to writable out of mmu-lock on
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fast page fault path, in order to easily audit the path, we see if TLBs need
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be flushed caused by this reason in mmu_spte_update() since this is a common
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fast page fault path. In order to easily audit the path, we see if TLBs needing
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to be flushed caused this reason in mmu_spte_update() since this is a common
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function to update spte (present -> present).
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Since the spte is "volatile" if it can be updated out of mmu-lock, we always
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atomically update the spte, the race caused by fast page fault can be avoided,
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atomically update the spte and the race caused by fast page fault can be avoided.
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See the comments in spte_has_volatile_bits() and mmu_spte_update().
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Lockless Access Tracking:
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@ -283,9 +283,9 @@ time it will be set using the Dirty tracking mechanism described above.
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:Arch: x86
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:Protects: wakeup_vcpus_on_cpu
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:Comment: This is a per-CPU lock and it is used for VT-d posted-interrupts.
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When VT-d posted-interrupts is supported and the VM has assigned
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When VT-d posted-interrupts are supported and the VM has assigned
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devices, we put the blocked vCPU on the list blocked_vcpu_on_cpu
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protected by blocked_vcpu_on_cpu_lock, when VT-d hardware issues
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protected by blocked_vcpu_on_cpu_lock. When VT-d hardware issues
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wakeup notification event since external interrupts from the
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assigned devices happens, we will find the vCPU on the list to
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wakeup.
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