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x86/cpu/topology: Move registration out of APIC code
The APIC/CPU registration sits in the middle of the APIC code. In fact this is a topology evaluation function and has nothing to do with the inner workings of the local APIC. Move it out into a file which reflects what this is about. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Michael Kelley <mhklinux@outlook.com> Tested-by: Sohil Mehta <sohil.mehta@intel.com> Link: https://lore.kernel.org/r/20240213210251.543948812@linutronix.de
This commit is contained in:
Thomas Gleixner
parent
1a5d0f62d1
commit
c0a66c2847
4 changed files with 195 additions and 188 deletions
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@ -171,6 +171,8 @@ extern bool apic_needs_pit(void);
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extern void apic_send_IPI_allbutself(unsigned int vector);
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extern void topology_register_boot_apic(u32 apic_id);
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#else /* !CONFIG_X86_LOCAL_APIC */
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static inline void lapic_shutdown(void) { }
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#define local_apic_timer_c2_ok 1
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@ -68,26 +68,12 @@
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#include "local.h"
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unsigned int num_processors;
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unsigned disabled_cpus;
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/* Processor that is doing the boot up */
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u32 boot_cpu_physical_apicid __ro_after_init = BAD_APICID;
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EXPORT_SYMBOL_GPL(boot_cpu_physical_apicid);
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u8 boot_cpu_apic_version __ro_after_init;
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/* Bitmap of physically present CPUs. */
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DECLARE_BITMAP(phys_cpu_present_map, MAX_LOCAL_APIC);
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/*
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* Processor to be disabled specified by kernel parameter
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* disable_cpu_apicid=<int>, mostly used for the kdump 2nd kernel to
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* avoid undefined behaviour caused by sending INIT from AP to BSP.
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*/
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static u32 disabled_cpu_apicid __ro_after_init = BAD_APICID;
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/*
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* This variable controls which CPUs receive external NMIs. By default,
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* external NMIs are delivered only to the BSP.
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@ -107,14 +93,6 @@ static inline bool apic_accessible(void)
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return x2apic_mode || apic_mmio_base;
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}
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/*
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* Map cpu index to physical APIC ID
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*/
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DEFINE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_apicid, BAD_APICID);
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DEFINE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_acpiid, CPU_ACPIID_INVALID);
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EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_apicid);
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EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_acpiid);
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#ifdef CONFIG_X86_32
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/* Local APIC was disabled by the BIOS and enabled by the kernel */
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static int enabled_via_apicbase __ro_after_init;
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@ -1676,8 +1654,6 @@ void apic_ap_setup(void)
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end_local_APIC_setup();
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}
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static __init void cpu_set_boot_apic(void);
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static __init void apic_read_boot_cpu_id(bool x2apic)
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{
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/*
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@ -1692,7 +1668,8 @@ static __init void apic_read_boot_cpu_id(bool x2apic)
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boot_cpu_physical_apicid = read_apic_id();
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boot_cpu_apic_version = GET_APIC_VERSION(apic_read(APIC_LVR));
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}
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cpu_set_boot_apic();
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topology_register_boot_apic(boot_cpu_physical_apicid);
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x86_32_probe_bigsmp_early();
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}
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#ifdef CONFIG_X86_X2APIC
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@ -2291,155 +2268,6 @@ void disconnect_bsp_APIC(int virt_wire_setup)
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apic_write(APIC_LVT1, value);
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}
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/*
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* The number of allocated logical CPU IDs. Since logical CPU IDs are allocated
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* contiguously, it equals to current allocated max logical CPU ID plus 1.
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* All allocated CPU IDs should be in the [0, nr_logical_cpuids) range,
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* so the maximum of nr_logical_cpuids is nr_cpu_ids.
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*
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* NOTE: Reserve 0 for BSP.
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*/
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static int nr_logical_cpuids = 1;
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/*
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* Used to store mapping between logical CPU IDs and APIC IDs.
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*/
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u32 cpuid_to_apicid[] = { [0 ... NR_CPUS - 1] = BAD_APICID, };
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bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
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{
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return phys_id == (u64)cpuid_to_apicid[cpu];
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}
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#ifdef CONFIG_SMP
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static void cpu_mark_primary_thread(unsigned int cpu, unsigned int apicid)
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{
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/* Isolate the SMT bit(s) in the APICID and check for 0 */
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u32 mask = (1U << (fls(smp_num_siblings) - 1)) - 1;
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if (smp_num_siblings == 1 || !(apicid & mask))
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cpumask_set_cpu(cpu, &__cpu_primary_thread_mask);
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}
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/*
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* Due to the utter mess of CPUID evaluation smp_num_siblings is not valid
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* during early boot. Initialize the primary thread mask before SMP
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* bringup.
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*/
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static int __init smp_init_primary_thread_mask(void)
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{
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unsigned int cpu;
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/*
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* XEN/PV provides either none or useless topology information.
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* Pretend that all vCPUs are primary threads.
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*/
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if (xen_pv_domain()) {
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cpumask_copy(&__cpu_primary_thread_mask, cpu_possible_mask);
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return 0;
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}
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for (cpu = 0; cpu < nr_logical_cpuids; cpu++)
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cpu_mark_primary_thread(cpu, cpuid_to_apicid[cpu]);
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return 0;
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}
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early_initcall(smp_init_primary_thread_mask);
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#else
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static inline void cpu_mark_primary_thread(unsigned int cpu, unsigned int apicid) { }
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#endif
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/*
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* Should use this API to allocate logical CPU IDs to keep nr_logical_cpuids
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* and cpuid_to_apicid[] synchronized.
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*/
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static int allocate_logical_cpuid(int apicid)
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{
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int i;
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/*
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* cpuid <-> apicid mapping is persistent, so when a cpu is up,
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* check if the kernel has allocated a cpuid for it.
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*/
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for (i = 0; i < nr_logical_cpuids; i++) {
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if (cpuid_to_apicid[i] == apicid)
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return i;
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}
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/* Allocate a new cpuid. */
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if (nr_logical_cpuids >= nr_cpu_ids) {
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WARN_ONCE(1, "APIC: NR_CPUS/possible_cpus limit of %u reached. "
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"Processor %d/0x%x and the rest are ignored.\n",
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nr_cpu_ids, nr_logical_cpuids, apicid);
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return -EINVAL;
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}
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cpuid_to_apicid[nr_logical_cpuids] = apicid;
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return nr_logical_cpuids++;
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}
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static void cpu_update_apic(int cpu, u32 apicid)
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{
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#if defined(CONFIG_SMP) || defined(CONFIG_X86_64)
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early_per_cpu(x86_cpu_to_apicid, cpu) = apicid;
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#endif
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set_cpu_possible(cpu, true);
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set_bit(apicid, phys_cpu_present_map);
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set_cpu_present(cpu, true);
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num_processors++;
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if (system_state != SYSTEM_BOOTING)
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cpu_mark_primary_thread(cpu, apicid);
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}
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static __init void cpu_set_boot_apic(void)
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{
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cpuid_to_apicid[0] = boot_cpu_physical_apicid;
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cpu_update_apic(0, boot_cpu_physical_apicid);
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x86_32_probe_bigsmp_early();
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}
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int generic_processor_info(int apicid)
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{
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int cpu, max = nr_cpu_ids;
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/* The boot CPU must be set before MADT/MPTABLE parsing happens */
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if (cpuid_to_apicid[0] == BAD_APICID)
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panic("Boot CPU APIC not registered yet\n");
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if (apicid == boot_cpu_physical_apicid)
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return 0;
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if (disabled_cpu_apicid == apicid) {
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int thiscpu = num_processors + disabled_cpus;
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pr_warn("APIC: Disabling requested cpu. Processor %d/0x%x ignored.\n",
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thiscpu, apicid);
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disabled_cpus++;
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return -ENODEV;
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}
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if (num_processors >= nr_cpu_ids) {
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int thiscpu = max + disabled_cpus;
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pr_warn("APIC: NR_CPUS/possible_cpus limit of %i reached. "
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"Processor %d/0x%x ignored.\n", max, thiscpu, apicid);
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disabled_cpus++;
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return -EINVAL;
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}
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cpu = allocate_logical_cpuid(apicid);
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if (cpu < 0) {
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disabled_cpus++;
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return -EINVAL;
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}
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cpu_update_apic(cpu, apicid);
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return cpu;
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}
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void __irq_msi_compose_msg(struct irq_cfg *cfg, struct msi_msg *msg,
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bool dmar)
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{
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@ -2828,15 +2656,6 @@ static int __init lapic_insert_resource(void)
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*/
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late_initcall(lapic_insert_resource);
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static int __init apic_set_disabled_cpu_apicid(char *arg)
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{
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if (!arg || !get_option(&arg, &disabled_cpu_apicid))
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return -EINVAL;
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return 0;
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}
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early_param("disable_cpu_apicid", apic_set_disabled_cpu_apicid);
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static int __init apic_set_extnmi(char *arg)
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{
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if (!arg)
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@ -26,14 +26,16 @@ obj-y += bugs.o
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obj-y += aperfmperf.o
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obj-y += cpuid-deps.o
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obj-y += umwait.o
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obj-y += capflags.o powerflags.o
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obj-$(CONFIG_PROC_FS) += proc.o
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obj-y += capflags.o powerflags.o
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obj-$(CONFIG_X86_LOCAL_APIC) += topology.o
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obj-$(CONFIG_IA32_FEAT_CTL) += feat_ctl.o
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obj-$(CONFIG_PROC_FS) += proc.o
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obj-$(CONFIG_IA32_FEAT_CTL) += feat_ctl.o
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ifdef CONFIG_CPU_SUP_INTEL
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obj-y += intel.o intel_pconfig.o tsx.o
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obj-$(CONFIG_PM) += intel_epb.o
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obj-y += intel.o intel_pconfig.o tsx.o
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obj-$(CONFIG_PM) += intel_epb.o
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endif
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obj-$(CONFIG_CPU_SUP_AMD) += amd.o
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obj-$(CONFIG_CPU_SUP_HYGON) += hygon.o
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184
arch/x86/kernel/cpu/topology.c
Normal file
184
arch/x86/kernel/cpu/topology.c
Normal file
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@ -0,0 +1,184 @@
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// SPDX-License-Identifier: GPL-2.0-only
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#include <linux/cpu.h>
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#include <xen/xen.h>
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#include <asm/apic.h>
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#include <asm/mpspec.h>
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#include <asm/smp.h>
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/*
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* Map cpu index to physical APIC ID
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*/
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DEFINE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_apicid, BAD_APICID);
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DEFINE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_acpiid, CPU_ACPIID_INVALID);
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EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_apicid);
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EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_acpiid);
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/* Bitmap of physically present CPUs. */
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DECLARE_BITMAP(phys_cpu_present_map, MAX_LOCAL_APIC) __read_mostly;
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/* Used for CPU number allocation and parallel CPU bringup */
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u32 cpuid_to_apicid[] __read_mostly = { [0 ... NR_CPUS - 1] = BAD_APICID, };
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/*
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* Processor to be disabled specified by kernel parameter
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* disable_cpu_apicid=<int>, mostly used for the kdump 2nd kernel to
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* avoid undefined behaviour caused by sending INIT from AP to BSP.
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*/
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static u32 disabled_cpu_apicid __ro_after_init = BAD_APICID;
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unsigned int num_processors;
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unsigned disabled_cpus;
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/*
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* The number of allocated logical CPU IDs. Since logical CPU IDs are allocated
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* contiguously, it equals to current allocated max logical CPU ID plus 1.
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* All allocated CPU IDs should be in the [0, nr_logical_cpuids) range,
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* so the maximum of nr_logical_cpuids is nr_cpu_ids.
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*
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* NOTE: Reserve 0 for BSP.
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*/
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static int nr_logical_cpuids = 1;
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bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
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{
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return phys_id == (u64)cpuid_to_apicid[cpu];
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}
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#ifdef CONFIG_SMP
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static void cpu_mark_primary_thread(unsigned int cpu, unsigned int apicid)
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{
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/* Isolate the SMT bit(s) in the APICID and check for 0 */
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u32 mask = (1U << (fls(smp_num_siblings) - 1)) - 1;
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if (smp_num_siblings == 1 || !(apicid & mask))
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cpumask_set_cpu(cpu, &__cpu_primary_thread_mask);
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}
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/*
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* Due to the utter mess of CPUID evaluation smp_num_siblings is not valid
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* during early boot. Initialize the primary thread mask before SMP
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* bringup.
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*/
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static int __init smp_init_primary_thread_mask(void)
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{
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unsigned int cpu;
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/*
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* XEN/PV provides either none or useless topology information.
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* Pretend that all vCPUs are primary threads.
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*/
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if (xen_pv_domain()) {
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cpumask_copy(&__cpu_primary_thread_mask, cpu_possible_mask);
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return 0;
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}
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for (cpu = 0; cpu < nr_logical_cpuids; cpu++)
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cpu_mark_primary_thread(cpu, cpuid_to_apicid[cpu]);
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return 0;
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}
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early_initcall(smp_init_primary_thread_mask);
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#else
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static inline void cpu_mark_primary_thread(unsigned int cpu, unsigned int apicid) { }
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#endif
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/*
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* Should use this API to allocate logical CPU IDs to keep nr_logical_cpuids
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* and cpuid_to_apicid[] synchronized.
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*/
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static int allocate_logical_cpuid(int apicid)
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{
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int i;
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/*
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* cpuid <-> apicid mapping is persistent, so when a cpu is up,
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* check if the kernel has allocated a cpuid for it.
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*/
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for (i = 0; i < nr_logical_cpuids; i++) {
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if (cpuid_to_apicid[i] == apicid)
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return i;
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}
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/* Allocate a new cpuid. */
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if (nr_logical_cpuids >= nr_cpu_ids) {
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WARN_ONCE(1, "APIC: NR_CPUS/possible_cpus limit of %u reached. "
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"Processor %d/0x%x and the rest are ignored.\n",
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nr_cpu_ids, nr_logical_cpuids, apicid);
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return -EINVAL;
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}
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cpuid_to_apicid[nr_logical_cpuids] = apicid;
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return nr_logical_cpuids++;
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}
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static void cpu_update_apic(int cpu, u32 apicid)
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{
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#if defined(CONFIG_SMP) || defined(CONFIG_X86_64)
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early_per_cpu(x86_cpu_to_apicid, cpu) = apicid;
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#endif
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set_cpu_possible(cpu, true);
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set_bit(apicid, phys_cpu_present_map);
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set_cpu_present(cpu, true);
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num_processors++;
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if (system_state != SYSTEM_BOOTING)
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cpu_mark_primary_thread(cpu, apicid);
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}
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void __init topology_register_boot_apic(u32 apic_id)
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{
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cpuid_to_apicid[0] = apic_id;
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cpu_update_apic(0, apic_id);
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}
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int generic_processor_info(int apicid)
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{
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int cpu, max = nr_cpu_ids;
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/* The boot CPU must be set before MADT/MPTABLE parsing happens */
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if (cpuid_to_apicid[0] == BAD_APICID)
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panic("Boot CPU APIC not registered yet\n");
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if (apicid == boot_cpu_physical_apicid)
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return 0;
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if (disabled_cpu_apicid == apicid) {
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int thiscpu = num_processors + disabled_cpus;
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pr_warn("APIC: Disabling requested cpu. Processor %d/0x%x ignored.\n",
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thiscpu, apicid);
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disabled_cpus++;
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return -ENODEV;
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}
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if (num_processors >= nr_cpu_ids) {
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int thiscpu = max + disabled_cpus;
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pr_warn("APIC: NR_CPUS/possible_cpus limit of %i reached. "
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"Processor %d/0x%x ignored.\n", max, thiscpu, apicid);
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disabled_cpus++;
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return -EINVAL;
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}
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cpu = allocate_logical_cpuid(apicid);
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if (cpu < 0) {
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disabled_cpus++;
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return -EINVAL;
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}
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||||
|
||||
cpu_update_apic(cpu, apicid);
|
||||
return cpu;
|
||||
}
|
||||
|
||||
static int __init apic_set_disabled_cpu_apicid(char *arg)
|
||||
{
|
||||
if (!arg || !get_option(&arg, &disabled_cpu_apicid))
|
||||
return -EINVAL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
early_param("disable_cpu_apicid", apic_set_disabled_cpu_apicid);
|
||||
Loading…
Add table
Reference in a new issue