arm64: dts: lg131x: Update spi clock properties

PL022 binding require two clocks to be defined but LG1312 and LG1313
platforms don't comply with bindings and define only one clock.

Update spi clocks and clocks-names property by adding appropriate clock
reference to make it compliant with bindings.

CC: Chanho Min <chanho.min@lge.com>
Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20241105-dts-spi-fixes-v2-2-623501e5d1ca@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Kuldeep Singh 2024-11-05 15:18:40 -06:00 committed by Arnd Bergmann
parent 55d0969c45
commit bdcbb3f8ab
No known key found for this signature in database
GPG key ID: 60AB47FFC9095227
2 changed files with 8 additions and 8 deletions

View file

@ -173,15 +173,15 @@
compatible = "arm,pl022", "arm,primecell";
reg = <0x0 0xfe800000 0x1000>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_bus>;
clock-names = "apb_pclk";
clocks = <&clk_bus>, <&clk_bus>;
clock-names = "sspclk", "apb_pclk";
};
spi1: spi@fe900000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x0 0xfe900000 0x1000>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_bus>;
clock-names = "apb_pclk";
clocks = <&clk_bus>, <&clk_bus>;
clock-names = "sspclk", "apb_pclk";
};
dmac0: dma-controller@c1128000 {
compatible = "arm,pl330", "arm,primecell";

View file

@ -173,15 +173,15 @@
compatible = "arm,pl022", "arm,primecell";
reg = <0x0 0xfe800000 0x1000>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_bus>;
clock-names = "apb_pclk";
clocks = <&clk_bus>, <&clk_bus>;
clock-names = "sspclk", "apb_pclk";
};
spi1: spi@fe900000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x0 0xfe900000 0x1000>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_bus>;
clock-names = "apb_pclk";
clocks = <&clk_bus>, <&clk_bus>;
clock-names = "sspclk", "apb_pclk";
};
dmac0: dma-controller@c1128000 {
compatible = "arm,pl330", "arm,primecell";