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arm64: dts: apple: s800-0-3: Add PMGR nodes
Add the two PMGR nodes and all known power state subnodes. Since there are a large number of them, put them in a separate file to include. Acked-by: Hector Martin <marcan@marcan.st> Acked-by: Neal Gompa <neal@gompa.dev> Signed-off-by: Nick Chan <towinchenmi@gmail.com> Reviewed-by: Neal Gompa <neal@gompa.dev> Signed-off-by: Sven Peter <sven@svenpeter.dev>
This commit is contained in:
Nick Chan
Sven Peter
parent
4cac0e58c9
commit
bd89a1ba30
5 changed files with 791 additions and 0 deletions
757
arch/arm64/boot/dts/apple/s800-0-3-pmgr.dtsi
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757
arch/arm64/boot/dts/apple/s800-0-3-pmgr.dtsi
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* PMGR Power domains for the Apple S8000/3 "A9" SoC
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*
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* Copyright (c) 2024 Nick Chan <towinchenmi@gmail.com>
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*/
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&pmgr {
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ps_cpu0: power-controller@80000 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80000 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "cpu0";
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apple,always-on; /* Core device */
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};
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ps_cpu1: power-controller@80008 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80008 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "cpu1";
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apple,always-on; /* Core device */
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};
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ps_cpm: power-controller@80040 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80040 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "cpm";
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apple,always-on; /* Core device */
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};
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ps_sio_busif: power-controller@80150 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80150 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "sio_busif";
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};
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ps_sio_p: power-controller@80158 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80158 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "sio_p";
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power-domains = <&ps_sio_busif>;
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};
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ps_sbr: power-controller@80100 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80100 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "sbr";
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apple,always-on; /* Apple fabric, critical block */
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};
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ps_aic: power-controller@80108 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80108 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "aic";
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apple,always-on; /* Core device */
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};
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ps_dwi: power-controller@80110 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80110 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "dwi";
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};
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ps_gpio: power-controller@80118 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80118 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "gpio";
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};
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ps_pms: power-controller@80120 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80120 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "pms";
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apple,always-on; /* Core device */
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};
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ps_pcie_ref: power-controller@80148 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80148 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "pcie_ref";
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};
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ps_mca0: power-controller@80168 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80168 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "mca0";
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power-domains = <&ps_sio_p>;
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};
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ps_mca1: power-controller@80170 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80170 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "mca1";
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power-domains = <&ps_sio_p>;
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};
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ps_mca2: power-controller@80178 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80178 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "mca2";
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power-domains = <&ps_sio_p>;
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};
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ps_mca3: power-controller@80180 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80180 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "mca3";
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power-domains = <&ps_sio_p>;
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};
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ps_mca4: power-controller@80188 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80188 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "mca4";
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power-domains = <&ps_sio_p>;
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};
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ps_pwm0: power-controller@80190 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80190 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "pwm0";
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power-domains = <&ps_sio_p>;
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};
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ps_i2c0: power-controller@80198 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80198 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "i2c0";
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power-domains = <&ps_sio_p>;
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};
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ps_i2c1: power-controller@801a0 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801a0 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "i2c1";
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power-domains = <&ps_sio_p>;
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};
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ps_i2c2: power-controller@801a8 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801a8 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "i2c2";
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power-domains = <&ps_sio_p>;
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};
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ps_i2c3: power-controller@801b0 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801b0 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "i2c3";
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power-domains = <&ps_sio_p>;
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};
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ps_spi0: power-controller@801b8 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801b8 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "spi0";
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power-domains = <&ps_sio_p>;
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};
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ps_spi1: power-controller@801c0 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801c0 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "spi1";
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power-domains = <&ps_sio_p>;
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};
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ps_spi2: power-controller@801c8 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801c8 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "spi2";
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power-domains = <&ps_sio_p>;
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};
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ps_spi3: power-controller@801d0 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801d0 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "spi3";
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power-domains = <&ps_sio_p>;
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};
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ps_uart0: power-controller@801d8 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801d8 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "uart0";
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power-domains = <&ps_sio_p>;
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};
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ps_uart1: power-controller@801e0 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801e0 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "uart1";
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power-domains = <&ps_sio_p>;
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};
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ps_uart2: power-controller@801e8 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801e8 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "uart2";
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power-domains = <&ps_sio_p>;
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};
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ps_uart3: power-controller@801f0 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801f0 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "uart3";
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power-domains = <&ps_sio_p>;
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};
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ps_uart4: power-controller@801f8 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801f8 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "uart4";
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power-domains = <&ps_sio_p>;
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};
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ps_sio: power-controller@80160 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80160 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "sio";
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power-domains = <&ps_sio_p>;
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apple,always-on; /* Core device */
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};
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ps_hsic0_phy: power-controller@80128 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80128 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "hsic0_phy";
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power-domains = <&ps_usb2host1>;
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};
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ps_hsic1_phy: power-controller@80130 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80130 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "hsic1_phy";
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power-domains = <&ps_usb2host2>;
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};
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ps_isp_sens0: power-controller@80138 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80138 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "isp_sens0";
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};
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ps_isp_sens1: power-controller@80140 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80140 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "isp_sens1";
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};
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ps_usb: power-controller@80250 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80250 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "usb";
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};
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ps_usbctrl: power-controller@80258 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80258 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "usbctrl";
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power-domains = <&ps_usb>;
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};
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ps_usb2host0: power-controller@80260 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80260 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "usb2host0";
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power-domains = <&ps_usbctrl>;
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};
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ps_usb2host1: power-controller@80270 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80270 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "usb2host1";
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power-domains = <&ps_usbctrl>;
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};
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ps_usb2host2: power-controller@80280 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80280 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "usb2host2";
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power-domains = <&ps_usbctrl>;
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};
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ps_rtmux: power-controller@802a8 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x802a8 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "rtmux";
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};
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ps_media: power-controller@802d0 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x802d0 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "media";
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};
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ps_isp: power-controller@802c8 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x802c8 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "isp";
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power-domains = <&ps_rtmux>;
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};
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ps_msr: power-controller@802e0 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x802e0 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "msr";
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power-domains = <&ps_media>;
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};
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ps_jpg: power-controller@802d8 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x802d8 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "jpg";
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power-domains = <&ps_media>;
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};
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ps_disp0: power-controller@802b0 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x802b0 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "disp0";
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power-domains = <&ps_rtmux>;
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};
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ps_pmp: power-controller@802e8 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x802e8 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "pmp";
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};
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ps_pms_sram: power-controller@802f0 {
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compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x802f0 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "pms_sram";
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};
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ps_uart5: power-controller@80200 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80200 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "uart5";
|
||||
power-domains = <&ps_sio_p>;
|
||||
};
|
||||
|
||||
ps_uart6: power-controller@80208 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80208 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "uart6";
|
||||
power-domains = <&ps_sio_p>;
|
||||
};
|
||||
|
||||
ps_uart7: power-controller@80210 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80210 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "uart7";
|
||||
power-domains = <&ps_sio_p>;
|
||||
};
|
||||
|
||||
ps_uart8: power-controller@80218 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80218 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "uart8";
|
||||
power-domains = <&ps_sio_p>;
|
||||
};
|
||||
|
||||
ps_aes0: power-controller@80220 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80220 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "aes0";
|
||||
power-domains = <&ps_sio_p>;
|
||||
};
|
||||
|
||||
ps_mcc: power-controller@80228 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80228 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "mcc";
|
||||
apple,always-on; /* Memory cache controller */
|
||||
};
|
||||
|
||||
ps_dcs0: power-controller@80230 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80230 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "dcs0";
|
||||
apple,always-on; /* LPDDR4 interface */
|
||||
};
|
||||
|
||||
ps_dcs1: power-controller@80238 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80238 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "dcs1";
|
||||
apple,always-on; /* LPDDR4 interface */
|
||||
};
|
||||
|
||||
ps_dcs2: power-controller@80240 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80240 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "dcs2";
|
||||
apple,always-on; /* LPDDR4 interface */
|
||||
};
|
||||
|
||||
ps_dcs3: power-controller@80248 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80248 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "dcs3";
|
||||
apple,always-on; /* LPDDR4 interface */
|
||||
};
|
||||
|
||||
ps_usb2host0_ohci: power-controller@80268 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80268 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "usb2host0_ohci";
|
||||
power-domains = <&ps_usb2host0>;
|
||||
};
|
||||
|
||||
ps_usb2host1_ohci: power-controller@80278 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80278 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "usb2host1_ohci";
|
||||
power-domains = <&ps_usb2host1>;
|
||||
};
|
||||
|
||||
ps_usb2host2_ohci: power-controller@80288 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80288 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "usb2host2_ohci";
|
||||
power-domains = <&ps_usb2host2>;
|
||||
};
|
||||
|
||||
ps_usbotg: power-controller@80290 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80290 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "usbotg";
|
||||
power-domains = <&ps_usbctrl>;
|
||||
};
|
||||
|
||||
ps_smx: power-controller@80298 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80298 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "smx";
|
||||
apple,always-on; /* Apple fabric, critical block */
|
||||
};
|
||||
|
||||
ps_sf: power-controller@802a0 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x802a0 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "sf";
|
||||
apple,always-on; /* Apple fabric, critical block */
|
||||
};
|
||||
|
||||
ps_mipi_dsi: power-controller@802b8 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x802b8 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "mipi_dsi";
|
||||
power-domains = <&ps_rtmux>;
|
||||
};
|
||||
|
||||
ps_dp: power-controller@802c0 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x802c0 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "dp";
|
||||
power-domains = <&ps_disp0>;
|
||||
};
|
||||
|
||||
ps_vdec: power-controller@802f8 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x802f8 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "vdec";
|
||||
power-domains = <&ps_media>;
|
||||
};
|
||||
|
||||
ps_venc: power-controller@80308 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80308 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "venc";
|
||||
power-domains = <&ps_media>;
|
||||
};
|
||||
|
||||
ps_pcie: power-controller@80310 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80310 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "pcie";
|
||||
};
|
||||
|
||||
ps_pcie_aux: power-controller@80318 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80318 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "pcie_aux";
|
||||
};
|
||||
|
||||
ps_pcie_link0: power-controller@80320 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80320 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "pcie_link0";
|
||||
power-domains = <&ps_pcie>;
|
||||
};
|
||||
|
||||
ps_pcie_link1: power-controller@80328 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80328 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "pcie_link1";
|
||||
power-domains = <&ps_pcie>;
|
||||
};
|
||||
|
||||
ps_pcie_link2: power-controller@80330 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80330 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "pcie_link2";
|
||||
power-domains = <&ps_pcie>;
|
||||
};
|
||||
|
||||
ps_pcie_link3: power-controller@80338 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80338 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "pcie_link3";
|
||||
power-domains = <&ps_pcie>;
|
||||
};
|
||||
|
||||
ps_gfx: power-controller@80340 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80340 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "gfx";
|
||||
};
|
||||
|
||||
ps_sep: power-controller@80400 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80400 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "sep";
|
||||
apple,always-on; /* Locked on */
|
||||
};
|
||||
|
||||
ps_venc_pipe: power-controller@88000 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x88000 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "venc_pipe";
|
||||
power-domains = <&ps_venc>;
|
||||
};
|
||||
|
||||
ps_venc_me0: power-controller@88008 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x88008 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "venc_me0";
|
||||
};
|
||||
|
||||
ps_venc_me1: power-controller@88010 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x88010 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "venc_me1";
|
||||
};
|
||||
};
|
||||
|
||||
&pmgr_mini {
|
||||
ps_aop: power-controller@80000 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80000 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "aop";
|
||||
power-domains = <&ps_aop_busif &ps_aop_cpu &ps_aop_filter>;
|
||||
apple,always-on; /* Always on processor */
|
||||
};
|
||||
|
||||
ps_debug: power-controller@80008 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80008 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "debug";
|
||||
};
|
||||
|
||||
ps_aop_gpio: power-controller@80010 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80010 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "aop_gpio";
|
||||
power-domains = <&ps_aop>;
|
||||
};
|
||||
|
||||
ps_aop_cpu: power-controller@80040 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80040 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "aop_cpu";
|
||||
};
|
||||
|
||||
ps_aop_filter: power-controller@80048 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80048 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "aop_filter";
|
||||
};
|
||||
|
||||
ps_aop_busif: power-controller@80050 {
|
||||
compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80050 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "aop_busif";
|
||||
};
|
||||
};
|
||||
|
|
@ -61,19 +61,30 @@
|
|||
/* Use the bootloader-enabled clocks for now. */
|
||||
clocks = <&clkref>, <&clkref>;
|
||||
clock-names = "uart", "clk_uart_baud0";
|
||||
power-domains = <&ps_uart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pmgr: power-management@20e000000 {
|
||||
compatible = "apple,s8000-pmgr", "apple,pmgr", "syscon", "simple-mfd";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
reg = <0x2 0xe000000 0 0x8c000>;
|
||||
};
|
||||
|
||||
aic: interrupt-controller@20e100000 {
|
||||
compatible = "apple,s8000-aic", "apple,aic";
|
||||
reg = <0x2 0x0e100000 0x0 0x100000>;
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-controller;
|
||||
power-domains = <&ps_aic>;
|
||||
};
|
||||
|
||||
pinctrl_ap: pinctrl@20f100000 {
|
||||
compatible = "apple,s8000-pinctrl", "apple,pinctrl";
|
||||
reg = <0x2 0x0f100000 0x0 0x100000>;
|
||||
power-domains = <&ps_gpio>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
|
@ -95,6 +106,7 @@
|
|||
pinctrl_aop: pinctrl@2100f0000 {
|
||||
compatible = "apple,s8000-pinctrl", "apple,pinctrl";
|
||||
reg = <0x2 0x100f0000 0x0 0x100000>;
|
||||
power-domains = <&ps_aop_gpio>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
|
@ -113,6 +125,14 @@
|
|||
<AIC_IRQ 119 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
pmgr_mini: power-management@210200000 {
|
||||
compatible = "apple,s8000-pmgr", "apple,pmgr", "syscon", "simple-mfd";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
reg = <0x2 0x10200000 0 0x84000>;
|
||||
};
|
||||
|
||||
wdt: watchdog@2102b0000 {
|
||||
compatible = "apple,s8000-wdt", "apple,wdt";
|
||||
reg = <0x2 0x102b0000 0x0 0x4000>;
|
||||
|
|
@ -132,6 +152,8 @@
|
|||
};
|
||||
};
|
||||
|
||||
#include "s800-0-3-pmgr.dtsi"
|
||||
|
||||
/*
|
||||
* The A9 was made by two separate fabs on two different process
|
||||
* nodes: Samsung made the S8000 (APL0898) on 14nm and TSMC made
|
||||
|
|
|
|||
|
|
@ -47,3 +47,7 @@
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
&framebuffer0 {
|
||||
power-domains = <&ps_disp0 &ps_mipi_dsi>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -41,3 +41,7 @@
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
&framebuffer0 {
|
||||
power-domains = <&ps_disp0 &ps_dp>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -47,3 +47,7 @@
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
&framebuffer0 {
|
||||
power-domains = <&ps_disp0 &ps_mipi_dsi>;
|
||||
};
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue