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LoongArch: BPF: Avoid declare variables in switch-case
Not all compilers support declare variables in switch-case, so move declarations to the beginning of a function. Otherwise we may get such build errors: arch/loongarch/net/bpf_jit.c: In function ‘emit_atomic’: arch/loongarch/net/bpf_jit.c:362:3: error: a label can only be part of a statement and a declaration is not a statement u8 r0 = regmap[BPF_REG_0]; ^~ arch/loongarch/net/bpf_jit.c: In function ‘build_insn’: arch/loongarch/net/bpf_jit.c:727:3: error: a label can only be part of a statement and a declaration is not a statement u8 t7 = -1; ^~ arch/loongarch/net/bpf_jit.c:778:3: error: a label can only be part of a statement and a declaration is not a statement int ret; ^~~ arch/loongarch/net/bpf_jit.c:779:3: error: expected expression before ‘u64’ u64 func_addr; ^~~ arch/loongarch/net/bpf_jit.c:780:3: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement] bool func_addr_fixed; ^~~~ arch/loongarch/net/bpf_jit.c:784:11: error: ‘func_addr’ undeclared (first use in this function); did you mean ‘in_addr’? &func_addr, &func_addr_fixed); ^~~~~~~~~ in_addr arch/loongarch/net/bpf_jit.c:784:11: note: each undeclared identifier is reported only once for each function it appears in arch/loongarch/net/bpf_jit.c:814:3: error: a label can only be part of a statement and a declaration is not a statement u64 imm64 = (u64)(insn + 1)->imm << 32 | (u32)insn->imm; ^~~ Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
This commit is contained in:
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4805a13d54
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bbfddb904d
1 changed files with 13 additions and 18 deletions
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@ -279,6 +279,7 @@ static void emit_atomic(const struct bpf_insn *insn, struct jit_ctx *ctx)
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const u8 t1 = LOONGARCH_GPR_T1;
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const u8 t1 = LOONGARCH_GPR_T1;
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const u8 t2 = LOONGARCH_GPR_T2;
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const u8 t2 = LOONGARCH_GPR_T2;
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const u8 t3 = LOONGARCH_GPR_T3;
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const u8 t3 = LOONGARCH_GPR_T3;
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const u8 r0 = regmap[BPF_REG_0];
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const u8 src = regmap[insn->src_reg];
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const u8 src = regmap[insn->src_reg];
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const u8 dst = regmap[insn->dst_reg];
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const u8 dst = regmap[insn->dst_reg];
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const s16 off = insn->off;
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const s16 off = insn->off;
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@ -359,8 +360,6 @@ static void emit_atomic(const struct bpf_insn *insn, struct jit_ctx *ctx)
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break;
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break;
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/* r0 = atomic_cmpxchg(dst + off, r0, src); */
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/* r0 = atomic_cmpxchg(dst + off, r0, src); */
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case BPF_CMPXCHG:
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case BPF_CMPXCHG:
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u8 r0 = regmap[BPF_REG_0];
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move_reg(ctx, t2, r0);
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move_reg(ctx, t2, r0);
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if (isdw) {
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if (isdw) {
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emit_insn(ctx, lld, r0, t1, 0);
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emit_insn(ctx, lld, r0, t1, 0);
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@ -390,8 +389,11 @@ static bool is_signed_bpf_cond(u8 cond)
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static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool extra_pass)
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static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool extra_pass)
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{
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{
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const bool is32 = BPF_CLASS(insn->code) == BPF_ALU ||
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u8 tm = -1;
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BPF_CLASS(insn->code) == BPF_JMP32;
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u64 func_addr;
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bool func_addr_fixed;
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int i = insn - ctx->prog->insnsi;
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int ret, jmp_offset;
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const u8 code = insn->code;
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const u8 code = insn->code;
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const u8 cond = BPF_OP(code);
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const u8 cond = BPF_OP(code);
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const u8 t1 = LOONGARCH_GPR_T1;
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const u8 t1 = LOONGARCH_GPR_T1;
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@ -400,8 +402,8 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
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const u8 dst = regmap[insn->dst_reg];
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const u8 dst = regmap[insn->dst_reg];
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const s16 off = insn->off;
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const s16 off = insn->off;
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const s32 imm = insn->imm;
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const s32 imm = insn->imm;
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int jmp_offset;
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const u64 imm64 = (u64)(insn + 1)->imm << 32 | (u32)insn->imm;
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int i = insn - ctx->prog->insnsi;
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const bool is32 = BPF_CLASS(insn->code) == BPF_ALU || BPF_CLASS(insn->code) == BPF_JMP32;
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switch (code) {
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switch (code) {
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/* dst = src */
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/* dst = src */
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@ -724,24 +726,23 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
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case BPF_JMP32 | BPF_JSGE | BPF_K:
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case BPF_JMP32 | BPF_JSGE | BPF_K:
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case BPF_JMP32 | BPF_JSLT | BPF_K:
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case BPF_JMP32 | BPF_JSLT | BPF_K:
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case BPF_JMP32 | BPF_JSLE | BPF_K:
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case BPF_JMP32 | BPF_JSLE | BPF_K:
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u8 t7 = -1;
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jmp_offset = bpf2la_offset(i, off, ctx);
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jmp_offset = bpf2la_offset(i, off, ctx);
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if (imm) {
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if (imm) {
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move_imm(ctx, t1, imm, false);
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move_imm(ctx, t1, imm, false);
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t7 = t1;
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tm = t1;
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} else {
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} else {
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/* If imm is 0, simply use zero register. */
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/* If imm is 0, simply use zero register. */
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t7 = LOONGARCH_GPR_ZERO;
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tm = LOONGARCH_GPR_ZERO;
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}
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}
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move_reg(ctx, t2, dst);
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move_reg(ctx, t2, dst);
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if (is_signed_bpf_cond(BPF_OP(code))) {
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if (is_signed_bpf_cond(BPF_OP(code))) {
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emit_sext_32(ctx, t7, is32);
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emit_sext_32(ctx, tm, is32);
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emit_sext_32(ctx, t2, is32);
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emit_sext_32(ctx, t2, is32);
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} else {
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} else {
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emit_zext_32(ctx, t7, is32);
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emit_zext_32(ctx, tm, is32);
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emit_zext_32(ctx, t2, is32);
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emit_zext_32(ctx, t2, is32);
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}
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}
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if (emit_cond_jmp(ctx, cond, t2, t7, jmp_offset) < 0)
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if (emit_cond_jmp(ctx, cond, t2, tm, jmp_offset) < 0)
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goto toofar;
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goto toofar;
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break;
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break;
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@ -775,10 +776,6 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
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/* function call */
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/* function call */
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case BPF_JMP | BPF_CALL:
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case BPF_JMP | BPF_CALL:
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int ret;
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u64 func_addr;
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bool func_addr_fixed;
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mark_call(ctx);
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mark_call(ctx);
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ret = bpf_jit_get_func_addr(ctx->prog, insn, extra_pass,
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ret = bpf_jit_get_func_addr(ctx->prog, insn, extra_pass,
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&func_addr, &func_addr_fixed);
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&func_addr, &func_addr_fixed);
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@ -811,8 +808,6 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
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/* dst = imm64 */
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/* dst = imm64 */
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case BPF_LD | BPF_IMM | BPF_DW:
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case BPF_LD | BPF_IMM | BPF_DW:
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u64 imm64 = (u64)(insn + 1)->imm << 32 | (u32)insn->imm;
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move_imm(ctx, dst, imm64, is32);
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move_imm(ctx, dst, imm64, is32);
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return 1;
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return 1;
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