net: hns3: add support for registering devlink for PF

Add devlink register support for HNS3 ethernet PF driver.

Signed-off-by: Yufeng Mo <moyufeng@huawei.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Yufeng Mo 2021-07-26 10:47:02 +08:00 committed by David S. Miller
parent 6149ab604c
commit b741269b27
6 changed files with 82 additions and 2 deletions

View file

@ -90,6 +90,7 @@ config HNS_ENET
config HNS3 config HNS3
tristate "Hisilicon Network Subsystem Support HNS3 (Framework)" tristate "Hisilicon Network Subsystem Support HNS3 (Framework)"
depends on PCI depends on PCI
select NET_DEVLINK
help help
This selects the framework support for Hisilicon Network Subsystem 3. This selects the framework support for Hisilicon Network Subsystem 3.
This layer facilitates clients like ENET, RoCE and user-space ethernet This layer facilitates clients like ENET, RoCE and user-space ethernet

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@ -7,6 +7,6 @@ ccflags-y := -I $(srctree)/drivers/net/ethernet/hisilicon/hns3
ccflags-y += -I $(srctree)/$(src) ccflags-y += -I $(srctree)/$(src)
obj-$(CONFIG_HNS3_HCLGE) += hclge.o obj-$(CONFIG_HNS3_HCLGE) += hclge.o
hclge-objs = hclge_main.o hclge_cmd.o hclge_mdio.o hclge_tm.o hclge_mbx.o hclge_err.o hclge_debugfs.o hclge_ptp.o hclge-objs = hclge_main.o hclge_cmd.o hclge_mdio.o hclge_tm.o hclge_mbx.o hclge_err.o hclge_debugfs.o hclge_ptp.o hclge_devlink.o
hclge-$(CONFIG_HNS3_DCB) += hclge_dcb.o hclge-$(CONFIG_HNS3_DCB) += hclge_dcb.o

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@ -0,0 +1,54 @@
// SPDX-License-Identifier: GPL-2.0+
/* Copyright (c) 2021 Hisilicon Limited. */
#include <net/devlink.h>
#include "hclge_devlink.h"
static const struct devlink_ops hclge_devlink_ops = {
};
int hclge_devlink_init(struct hclge_dev *hdev)
{
struct pci_dev *pdev = hdev->pdev;
struct hclge_devlink_priv *priv;
struct devlink *devlink;
int ret;
devlink = devlink_alloc(&hclge_devlink_ops,
sizeof(struct hclge_devlink_priv));
if (!devlink)
return -ENOMEM;
priv = devlink_priv(devlink);
priv->hdev = hdev;
ret = devlink_register(devlink, &pdev->dev);
if (ret) {
dev_err(&pdev->dev, "failed to register devlink, ret = %d\n",
ret);
goto out_reg_fail;
}
hdev->devlink = devlink;
return 0;
out_reg_fail:
devlink_free(devlink);
return ret;
}
void hclge_devlink_uninit(struct hclge_dev *hdev)
{
struct devlink *devlink = hdev->devlink;
if (!devlink)
return;
devlink_unregister(devlink);
devlink_free(devlink);
hdev->devlink = NULL;
}

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@ -0,0 +1,15 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/* Copyright (c) 2021 Hisilicon Limited. */
#ifndef __HCLGE_DEVLINK_H
#define __HCLGE_DEVLINK_H
#include "hclge_main.h"
struct hclge_devlink_priv {
struct hclge_dev *hdev;
};
int hclge_devlink_init(struct hclge_dev *hdev);
void hclge_devlink_uninit(struct hclge_dev *hdev);
#endif

View file

@ -23,6 +23,7 @@
#include "hclge_tm.h" #include "hclge_tm.h"
#include "hclge_err.h" #include "hclge_err.h"
#include "hnae3.h" #include "hnae3.h"
#include "hclge_devlink.h"
#define HCLGE_NAME "hclge" #define HCLGE_NAME "hclge"
#define HCLGE_STATS_READ(p, offset) (*(u64 *)((u8 *)(p) + (offset))) #define HCLGE_STATS_READ(p, offset) (*(u64 *)((u8 *)(p) + (offset)))
@ -11482,10 +11483,14 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)
if (ret) if (ret)
goto out; goto out;
ret = hclge_devlink_init(hdev);
if (ret)
goto err_pci_uninit;
/* Firmware command queue initialize */ /* Firmware command queue initialize */
ret = hclge_cmd_queue_init(hdev); ret = hclge_cmd_queue_init(hdev);
if (ret) if (ret)
goto err_pci_uninit; goto err_devlink_uninit;
/* Firmware command initialize */ /* Firmware command initialize */
ret = hclge_cmd_init(hdev); ret = hclge_cmd_init(hdev);
@ -11658,6 +11663,8 @@ err_msi_uninit:
pci_free_irq_vectors(pdev); pci_free_irq_vectors(pdev);
err_cmd_uninit: err_cmd_uninit:
hclge_cmd_uninit(hdev); hclge_cmd_uninit(hdev);
err_devlink_uninit:
hclge_devlink_uninit(hdev);
err_pci_uninit: err_pci_uninit:
pcim_iounmap(pdev, hdev->hw.io_base); pcim_iounmap(pdev, hdev->hw.io_base);
pci_clear_master(pdev); pci_clear_master(pdev);
@ -12048,6 +12055,7 @@ static void hclge_uninit_ae_dev(struct hnae3_ae_dev *ae_dev)
hclge_cmd_uninit(hdev); hclge_cmd_uninit(hdev);
hclge_misc_irq_uninit(hdev); hclge_misc_irq_uninit(hdev);
hclge_devlink_uninit(hdev);
hclge_pci_uninit(hdev); hclge_pci_uninit(hdev);
mutex_destroy(&hdev->vport_lock); mutex_destroy(&hdev->vport_lock);
hclge_uninit_vport_vlan_table(hdev); hclge_uninit_vport_vlan_table(hdev);

View file

@ -8,6 +8,7 @@
#include <linux/phy.h> #include <linux/phy.h>
#include <linux/if_vlan.h> #include <linux/if_vlan.h>
#include <linux/kfifo.h> #include <linux/kfifo.h>
#include <net/devlink.h>
#include "hclge_cmd.h" #include "hclge_cmd.h"
#include "hclge_ptp.h" #include "hclge_ptp.h"
@ -943,6 +944,7 @@ struct hclge_dev {
cpumask_t affinity_mask; cpumask_t affinity_mask;
struct irq_affinity_notify affinity_notify; struct irq_affinity_notify affinity_notify;
struct hclge_ptp *ptp; struct hclge_ptp *ptp;
struct devlink *devlink;
}; };
/* VPort level vlan tag configuration for TX direction */ /* VPort level vlan tag configuration for TX direction */