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arm64: dts: imx8dxl-evk: add audio nodes
Add audio nodes for imx8dxl-evk boards. Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Frank Li
Shawn Guo
parent
3c9622455e
commit
b41c45eb99
1 changed files with 229 additions and 0 deletions
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@ -137,6 +137,76 @@
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enable-active-high;
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regulator-always-on;
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};
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bt_sco_codec: audio-codec-bt {
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compatible = "linux,bt-sco";
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#sound-dai-cells = <1>;
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};
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sound-bt-sco {
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compatible = "simple-audio-card";
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simple-audio-card,name = "bt-sco-audio";
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simple-audio-card,format = "dsp_a";
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simple-audio-card,bitclock-inversion;
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simple-audio-card,frame-master = <&btcpu>;
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simple-audio-card,bitclock-master = <&btcpu>;
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btcpu: simple-audio-card,cpu {
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sound-dai = <&sai0>;
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dai-tdm-slot-num = <2>;
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dai-tdm-slot-width = <16>;
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};
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simple-audio-card,codec {
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sound-dai = <&bt_sco_codec 1>;
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};
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};
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sound-wm8960-1 {
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compatible = "fsl,imx-audio-wm8960";
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model = "wm8960-audio";
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audio-cpu = <&sai1>;
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audio-codec = <&wm8960_1>;
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audio-asrc = <&asrc0>;
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audio-routing = "Headphone Jack", "HP_L",
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"Headphone Jack", "HP_R",
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"Ext Spk", "SPK_LP",
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"Ext Spk", "SPK_LN",
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"Ext Spk", "SPK_RP",
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"Ext Spk", "SPK_RN",
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"LINPUT1", "Mic Jack",
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"Mic Jack", "MICB";
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};
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sound-wm8960-2 {
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compatible = "fsl,imx-audio-wm8960";
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model = "wm8960-audio-2";
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audio-cpu = <&sai2>;
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audio-codec = <&wm8960_2>;
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audio-routing = "Headphone Jack", "HP_L",
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"Headphone Jack", "HP_R",
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"Ext Spk", "SPK_LP",
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"Ext Spk", "SPK_LN",
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"Ext Spk", "SPK_RP",
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"Ext Spk", "SPK_RN",
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"LINPUT1", "Mic Jack",
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"Mic Jack", "MICB";
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};
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sound-wm8960-3 {
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compatible = "fsl,imx-audio-wm8960";
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model = "wm8960-audio-3";
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audio-cpu = <&sai3>;
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audio-codec = <&wm8960_3>;
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audio-routing = "Headphone Jack", "HP_L",
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"Headphone Jack", "HP_R",
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"Ext Spk", "SPK_LP",
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"Ext Spk", "SPK_LN",
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"Ext Spk", "SPK_RP",
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"Ext Spk", "SPK_RN",
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"LINPUT1", "Mic Jack",
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"Mic Jack", "MICB";
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};
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};
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&adc0 {
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@ -144,6 +214,11 @@
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status = "okay";
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};
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&asrc0 {
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fsl,asrc-rate = <48000>;
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status = "okay";
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};
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&eqos {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_eqos>;
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@ -271,6 +346,78 @@
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};
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};
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i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x1>;
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wm8960_1: audio-codec@1a {
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compatible = "wlf,wm8960";
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reg = <0x1a>;
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clocks = <&mclkout1_lpcg IMX_LPCG_CLK_0>;
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clock-names = "mclk";
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assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
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<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
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<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
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<&mclkout1_lpcg IMX_LPCG_CLK_0>;
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assigned-clock-rates = <786432000>,
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<49152000>,
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<12288000>,
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<12288000>;
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wlf,shared-lrclk;
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wlf,hp-cfg = <2 2 3>;
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wlf,gpio-cfg = <1 3>;
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};
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};
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i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x2>;
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wm8960_2: audio-codec@1a {
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compatible = "wlf,wm8960";
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reg = <0x1a>;
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clocks = <&mclkout1_lpcg IMX_LPCG_CLK_0>;
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clock-names = "mclk";
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assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
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<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
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<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
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<&mclkout1_lpcg IMX_LPCG_CLK_0>;
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assigned-clock-rates = <786432000>,
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<49152000>,
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<12288000>,
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<12288000>;
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wlf,shared-lrclk;
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wlf,hp-cfg = <2 2 3>;
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wlf,gpio-cfg = <1 3>;
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};
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};
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i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x3>;
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wm8960_3: audio-codec@1a {
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compatible = "wlf,wm8960";
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reg = <0x1a>;
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clocks = <&mclkout1_lpcg IMX_LPCG_CLK_0>;
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clock-names = "mclk";
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assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
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<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
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<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
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<&mclkout1_lpcg IMX_LPCG_CLK_0>;
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assigned-clock-rates = <786432000>,
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<49152000>,
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<12288000>,
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<12288000>;
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wlf,shared-lrclk;
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wlf,hp-cfg = <2 2 3>;
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wlf,gpio-cfg = <1 3>;
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};
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};
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i2c@4 {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -390,6 +537,53 @@
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status = "okay";
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};
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&sai0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai0>;
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#sound-dai-cells = <0>;
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assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
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<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
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<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
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<&sai0_lpcg IMX_LPCG_CLK_0>;
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assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>;
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status = "okay";
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};
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&sai1 {
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assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
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<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
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<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
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<&sai1_lpcg IMX_LPCG_CLK_0>;
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assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai1>;
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status = "okay";
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};
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&sai2 {
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assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
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<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
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<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
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<&sai2_lpcg IMX_LPCG_CLK_0>;
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assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai2>;
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fsl,sai-asynchronous;
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status = "okay";
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};
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&sai3 {
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assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
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<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
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<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
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<&sai3_lpcg IMX_LPCG_CLK_0>;
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assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai3>;
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fsl,sai-asynchronous;
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status = "okay";
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};
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&thermal_zones {
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pmic-thermal {
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polling-delay-passive = <250>;
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@ -632,6 +826,41 @@
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>;
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};
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pinctrl_sai0: sai0grp {
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fsl,pins = <
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IMX8DXL_SPI0_CS0_ADMA_SAI0_RXD 0x06000060
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IMX8DXL_SPI0_CS1_ADMA_SAI0_RXC 0x06000040
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IMX8DXL_SPI0_SCK_ADMA_SAI0_TXC 0x06000060
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IMX8DXL_SPI0_SDI_ADMA_SAI0_TXD 0x06000060
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IMX8DXL_SPI0_SDO_ADMA_SAI0_TXFS 0x06000040
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>;
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};
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pinctrl_sai1: sai1grp {
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fsl,pins = <
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IMX8DXL_FLEXCAN0_RX_ADMA_SAI1_TXC 0x06000040
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IMX8DXL_FLEXCAN0_TX_ADMA_SAI1_TXFS 0x06000040
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IMX8DXL_FLEXCAN1_RX_ADMA_SAI1_TXD 0x06000060
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IMX8DXL_FLEXCAN1_TX_ADMA_SAI1_RXD 0x06000060
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>;
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};
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pinctrl_sai2: sai2grp {
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fsl,pins = <
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IMX8DXL_SNVS_TAMPER_OUT3_ADMA_SAI2_RXC 0x06000040
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IMX8DXL_SNVS_TAMPER_IN0_ADMA_SAI2_RXFS 0x06000040
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IMX8DXL_SNVS_TAMPER_OUT4_ADMA_SAI2_RXD 0x06000060
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>;
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};
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pinctrl_sai3: sai3grp {
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fsl,pins = <
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IMX8DXL_SNVS_TAMPER_IN1_ADMA_SAI3_RXC 0x06000040
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IMX8DXL_SNVS_TAMPER_IN3_ADMA_SAI3_RXFS 0x06000040
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IMX8DXL_SNVS_TAMPER_IN2_ADMA_SAI3_RXD 0x06000060
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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IMX8DXL_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041
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