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iwlwifi: add support for 6-7 GHz channels

Browse source 
Add UHB (ultra high band) channels and use 16 bit variables
to fit the new channels.

Signed-off-by: Shaul Triebitz <shaul.triebitz@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
This commit is contained in:
Shaul Triebitz 2019-01-31 15:38:31 +02:00 • committed by Luca Coelho
parent 8636ca769c
commit b15ef67c0e
3 changed files with 49 additions and 31 deletions
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2
drivers/net/wireless/intel/iwlwifi/cfg/22000.c
View file

@ -427,12 +427,14 @@ const struct iwl_cfg iwlax210_2ax_cfg_so_hr_a0 = {
const struct iwl_cfg iwlax210_2ax_cfg_so_gf_a0 = { const struct iwl_cfg iwlax210_2ax_cfg_so_gf_a0 = {
.name = "Intel(R) Wi-Fi 7 AX211 160MHz", .name = "Intel(R) Wi-Fi 7 AX211 160MHz",
.fw_name_pre = IWL_22000_SO_A_GF_A_FW_PRE, .fw_name_pre = IWL_22000_SO_A_GF_A_FW_PRE,
.uhb_supported = true,
IWL_DEVICE_AX210, IWL_DEVICE_AX210,
}; };
const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0 = { const struct iwl_cfg iwlax210_2ax_cfg_ty_gf_a0 = {
.name = "Intel(R) Wi-Fi 7 AX210 160MHz", .name = "Intel(R) Wi-Fi 7 AX210 160MHz",
.fw_name_pre = IWL_22000_TY_A_GF_A_FW_PRE, .fw_name_pre = IWL_22000_TY_A_GF_A_FW_PRE,
.uhb_supported = true,
IWL_DEVICE_AX210, IWL_DEVICE_AX210,
}; };

4
drivers/net/wireless/intel/iwlwifi/iwl-config.h
View file

@ -383,6 +383,7 @@ struct iwl_csr_params {
* @bisr_workaround: BISR hardware workaround (for 22260 series devices) * @bisr_workaround: BISR hardware workaround (for 22260 series devices)
* @min_txq_size: minimum number of slots required in a TX queue * @min_txq_size: minimum number of slots required in a TX queue
* @umac_prph_offset: offset to add to UMAC periphery address * @umac_prph_offset: offset to add to UMAC periphery address
* @uhb_supported: ultra high band channels supported
* *
* We enable the driver to be backward compatible wrt. hardware features. * We enable the driver to be backward compatible wrt. hardware features.
* API differences in uCode shouldn't be handled here but through TLVs * API differences in uCode shouldn't be handled here but through TLVs
@ -433,7 +434,8 @@ struct iwl_cfg {
gen2:1, gen2:1,
cdb:1, cdb:1,
dbgc_supported:1, dbgc_supported:1,
bisr_workaround:1; bisr_workaround:1,
uhb_supported:1;
u8 valid_tx_ant; u8 valid_tx_ant;
u8 valid_rx_ant; u8 valid_rx_ant;
u8 non_shared_ant; u8 non_shared_ant;

74
drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c
View file

@ -130,7 +130,7 @@ enum nvm_sku_bits {
/* /*
* These are the channel numbers in the order that they are stored in the NVM * These are the channel numbers in the order that they are stored in the NVM
*/ */
static const u8 iwl_nvm_channels[] = { static const u16 iwl_nvm_channels[] = {
/* 2.4 GHz */ /* 2.4 GHz */
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
/* 5 GHz */ /* 5 GHz */
@ -139,7 +139,7 @@ static const u8 iwl_nvm_channels[] = {
149, 153, 157, 161, 165 149, 153, 157, 161, 165
}; };
static const u8 iwl_ext_nvm_channels[] = { static const u16 iwl_ext_nvm_channels[] = {
/* 2.4 GHz */ /* 2.4 GHz */
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
/* 5 GHz */ /* 5 GHz */
@ -148,14 +148,27 @@ static const u8 iwl_ext_nvm_channels[] = {
149, 153, 157, 161, 165, 169, 173, 177, 181 149, 153, 157, 161, 165, 169, 173, 177, 181
}; };
static const u16 iwl_uhb_nvm_channels[] = {
/* 2.4 GHz */
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
/* 5 GHz */
36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92,
96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
149, 153, 157, 161, 165, 169, 173, 177, 181,
/* 6-7 GHz */
189, 193, 197, 201, 205, 209, 213, 217, 221, 225, 229, 233, 237, 241,
245, 249, 253, 257, 261, 265, 269, 273, 277, 281, 285, 289, 293, 297,
301, 305, 309, 313, 317, 321, 325, 329, 333, 337, 341, 345, 349, 353,
357, 361, 365, 369, 373, 377, 381, 385, 389, 393, 397, 401, 405, 409,
413, 417, 421
};
#define IWL_NVM_NUM_CHANNELS ARRAY_SIZE(iwl_nvm_channels) #define IWL_NVM_NUM_CHANNELS ARRAY_SIZE(iwl_nvm_channels)
#define IWL_NVM_NUM_CHANNELS_EXT ARRAY_SIZE(iwl_ext_nvm_channels) #define IWL_NVM_NUM_CHANNELS_EXT ARRAY_SIZE(iwl_ext_nvm_channels)
#define IWL_NVM_NUM_CHANNELS_UHB ARRAY_SIZE(iwl_uhb_nvm_channels)
#define NUM_2GHZ_CHANNELS 14 #define NUM_2GHZ_CHANNELS 14
#define NUM_2GHZ_CHANNELS_EXT 14
#define FIRST_2GHZ_HT_MINUS 5 #define FIRST_2GHZ_HT_MINUS 5
#define LAST_2GHZ_HT_PLUS 9 #define LAST_2GHZ_HT_PLUS 9
#define LAST_5GHZ_HT 165
#define LAST_5GHZ_HT_FAMILY_8000 181
#define N_HW_ADDR_MASK 0xF #define N_HW_ADDR_MASK 0xF
/* rate data (static) */ /* rate data (static) */
@ -247,17 +260,13 @@ static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, bool is_5ghz,
u16 nvm_flags, const struct iwl_cfg *cfg) u16 nvm_flags, const struct iwl_cfg *cfg)
{ {
u32 flags = IEEE80211_CHAN_NO_HT40; u32 flags = IEEE80211_CHAN_NO_HT40;
u32 last_5ghz_ht = LAST_5GHZ_HT;
if (cfg->nvm_type == IWL_NVM_EXT)
last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
if (!is_5ghz && (nvm_flags & NVM_CHANNEL_40MHZ)) { if (!is_5ghz && (nvm_flags & NVM_CHANNEL_40MHZ)) {
if (ch_num <= LAST_2GHZ_HT_PLUS) if (ch_num <= LAST_2GHZ_HT_PLUS)
flags &= ~IEEE80211_CHAN_NO_HT40PLUS; flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
if (ch_num >= FIRST_2GHZ_HT_MINUS) if (ch_num >= FIRST_2GHZ_HT_MINUS)
flags &= ~IEEE80211_CHAN_NO_HT40MINUS; flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
} else if (ch_num <= last_5ghz_ht && (nvm_flags & NVM_CHANNEL_40MHZ)) { } else if (nvm_flags & NVM_CHANNEL_40MHZ) {
if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0) if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
flags &= ~IEEE80211_CHAN_NO_HT40PLUS; flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
else else
@ -299,17 +308,18 @@ static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
int n_channels = 0; int n_channels = 0;
struct ieee80211_channel *channel; struct ieee80211_channel *channel;
u16 ch_flags; u16 ch_flags;
int num_of_ch, num_2ghz_channels; int num_of_ch, num_2ghz_channels = NUM_2GHZ_CHANNELS;
const u8 *nvm_chan; const u16 *nvm_chan;
if (cfg->nvm_type != IWL_NVM_EXT) { if (cfg->uhb_supported) {
num_of_ch = IWL_NVM_NUM_CHANNELS; num_of_ch = IWL_NVM_NUM_CHANNELS_UHB;
nvm_chan = &iwl_nvm_channels[0]; nvm_chan = iwl_uhb_nvm_channels;
num_2ghz_channels = NUM_2GHZ_CHANNELS; } else if (cfg->nvm_type == IWL_NVM_EXT) {
} else {
num_of_ch = IWL_NVM_NUM_CHANNELS_EXT; num_of_ch = IWL_NVM_NUM_CHANNELS_EXT;
nvm_chan = &iwl_ext_nvm_channels[0]; nvm_chan = iwl_ext_nvm_channels;
num_2ghz_channels = NUM_2GHZ_CHANNELS_EXT; } else {
num_of_ch = IWL_NVM_NUM_CHANNELS;
nvm_chan = iwl_nvm_channels;
} }
for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) { for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
@ -1013,15 +1023,11 @@ iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
} }
IWL_EXPORT_SYMBOL(iwl_parse_nvm_data); IWL_EXPORT_SYMBOL(iwl_parse_nvm_data);
static u32 iwl_nvm_get_regdom_bw_flags(const u8 *nvm_chan, static u32 iwl_nvm_get_regdom_bw_flags(const u16 *nvm_chan,
int ch_idx, u16 nvm_flags, int ch_idx, u16 nvm_flags,
const struct iwl_cfg *cfg) const struct iwl_cfg *cfg)
{ {
u32 flags = NL80211_RRF_NO_HT40; u32 flags = NL80211_RRF_NO_HT40;
u32 last_5ghz_ht = LAST_5GHZ_HT;
if (cfg->nvm_type == IWL_NVM_EXT)
last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
if (ch_idx < NUM_2GHZ_CHANNELS && if (ch_idx < NUM_2GHZ_CHANNELS &&
(nvm_flags & NVM_CHANNEL_40MHZ)) { (nvm_flags & NVM_CHANNEL_40MHZ)) {
@ -1029,8 +1035,7 @@ static u32 iwl_nvm_get_regdom_bw_flags(const u8 *nvm_chan,
flags &= ~NL80211_RRF_NO_HT40PLUS; flags &= ~NL80211_RRF_NO_HT40PLUS;
if (nvm_chan[ch_idx] >= FIRST_2GHZ_HT_MINUS) if (nvm_chan[ch_idx] >= FIRST_2GHZ_HT_MINUS)
flags &= ~NL80211_RRF_NO_HT40MINUS; flags &= ~NL80211_RRF_NO_HT40MINUS;
} else if (nvm_chan[ch_idx] <= last_5ghz_ht && } else if (nvm_flags & NVM_CHANNEL_40MHZ) {
(nvm_flags & NVM_CHANNEL_40MHZ)) {
if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0) if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
flags &= ~NL80211_RRF_NO_HT40PLUS; flags &= ~NL80211_RRF_NO_HT40PLUS;
else else
@ -1074,8 +1079,7 @@ iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
int ch_idx; int ch_idx;
u16 ch_flags; u16 ch_flags;
u32 reg_rule_flags, prev_reg_rule_flags = 0; u32 reg_rule_flags, prev_reg_rule_flags = 0;
const u8 *nvm_chan = cfg->nvm_type == IWL_NVM_EXT ? const u16 *nvm_chan;
iwl_ext_nvm_channels : iwl_nvm_channels;
struct ieee80211_regdomain *regd, *copy_rd; struct ieee80211_regdomain *regd, *copy_rd;
int size_of_regd, regd_to_copy; int size_of_regd, regd_to_copy;
struct ieee80211_reg_rule *rule; struct ieee80211_reg_rule *rule;
@ -1084,8 +1088,18 @@ iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
int center_freq, prev_center_freq = 0; int center_freq, prev_center_freq = 0;
int valid_rules = 0; int valid_rules = 0;
bool new_rule; bool new_rule;
int max_num_ch = cfg->nvm_type == IWL_NVM_EXT ? int max_num_ch;
IWL_NVM_NUM_CHANNELS_EXT : IWL_NVM_NUM_CHANNELS;
if (cfg->uhb_supported) {
max_num_ch = IWL_NVM_NUM_CHANNELS_UHB;
nvm_chan = iwl_uhb_nvm_channels;
} else if (cfg->nvm_type == IWL_NVM_EXT) {
max_num_ch = IWL_NVM_NUM_CHANNELS_EXT;
nvm_chan = iwl_ext_nvm_channels;
} else {
max_num_ch = IWL_NVM_NUM_CHANNELS;
nvm_chan = iwl_nvm_channels;
}
if (WARN_ON(num_of_ch > max_num_ch)) if (WARN_ON(num_of_ch > max_num_ch))
num_of_ch = max_num_ch; num_of_ch = max_num_ch;