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serial: 8250: Move CE4100 quirks to a module under 8250 driver
There is inconvenient for maintainers and maintainership to have some quirks under architectural code. Move it to the specific quirk file like other 8250-compatible drivers do. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20250627182743.1273326-1-andriy.shevchenko@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
5e40169f7a
commit
acc902de05
4 changed files with 105 additions and 98 deletions
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@ -4,4 +4,10 @@
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int ce4100_pci_init(void);
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#ifdef CONFIG_SERIAL_8250
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void __init sdv_serial_fixup(void);
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#else
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static inline void sdv_serial_fixup(void) {};
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#endif
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#endif
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@ -5,19 +5,12 @@
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* (C) Copyright 2010 Intel Corporation
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/irq.h>
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#include <linux/reboot.h>
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#include <linux/serial_reg.h>
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#include <linux/serial_8250.h>
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#include <asm/ce4100.h>
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#include <asm/prom.h>
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#include <asm/setup.h>
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#include <asm/i8259.h>
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#include <asm/io.h>
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#include <asm/io_apic.h>
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#include <asm/emergency-restart.h>
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/*
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* The CE4100 platform has an internal 8051 Microcontroller which is
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@ -31,97 +24,6 @@ static void ce4100_power_off(void)
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outb(0x4, 0xcf9);
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}
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#ifdef CONFIG_SERIAL_8250
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static unsigned int mem_serial_in(struct uart_port *p, int offset)
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{
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offset = offset << p->regshift;
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return readl(p->membase + offset);
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}
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/*
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* The UART Tx interrupts are not set under some conditions and therefore serial
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* transmission hangs. This is a silicon issue and has not been root caused. The
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* workaround for this silicon issue checks UART_LSR_THRE bit and UART_LSR_TEMT
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* bit of LSR register in interrupt handler to see whether at least one of these
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* two bits is set, if so then process the transmit request. If this workaround
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* is not applied, then the serial transmission may hang. This workaround is for
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* errata number 9 in Errata - B step.
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*/
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static u32 ce4100_mem_serial_in(struct uart_port *p, unsigned int offset)
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{
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u32 ret, ier, lsr;
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if (offset != UART_IIR)
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return mem_serial_in(p, offset);
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offset <<= p->regshift;
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ret = readl(p->membase + offset);
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if (!(ret & UART_IIR_NO_INT))
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return ret;
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/* see if the TX interrupt should have really set */
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ier = mem_serial_in(p, UART_IER);
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/* see if the UART's XMIT interrupt is enabled */
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if (!(ier & UART_IER_THRI))
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return ret;
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lsr = mem_serial_in(p, UART_LSR);
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/* now check to see if the UART should be generating an interrupt (but isn't) */
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if (lsr & (UART_LSR_THRE | UART_LSR_TEMT))
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ret &= ~UART_IIR_NO_INT;
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return ret;
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}
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static void ce4100_mem_serial_out(struct uart_port *p, unsigned int offset, u32 value)
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{
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offset <<= p->regshift;
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writel(value, p->membase + offset);
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}
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static void ce4100_serial_fixup(int port, struct uart_port *up,
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u32 *capabilities)
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{
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#ifdef CONFIG_EARLY_PRINTK
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/*
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* Over ride the legacy port configuration that comes from
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* asm/serial.h. Using the ioport driver then switching to the
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* PCI memmaped driver hangs the IOAPIC
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*/
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if (up->iotype != UPIO_MEM32) {
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up->uartclk = 14745600;
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up->mapbase = 0xdffe0200;
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set_fixmap_nocache(FIX_EARLYCON_MEM_BASE,
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up->mapbase & PAGE_MASK);
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up->membase =
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(void __iomem *)__fix_to_virt(FIX_EARLYCON_MEM_BASE);
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up->membase += up->mapbase & ~PAGE_MASK;
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up->mapbase += port * 0x100;
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up->membase += port * 0x100;
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up->iotype = UPIO_MEM32;
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up->regshift = 2;
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up->irq = 4;
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}
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#endif
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up->iobase = 0;
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up->serial_in = ce4100_mem_serial_in;
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up->serial_out = ce4100_mem_serial_out;
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*capabilities |= (1 << 12);
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}
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static __init void sdv_serial_fixup(void)
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{
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serial8250_set_isa_configurator(ce4100_serial_fixup);
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}
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#else
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static inline void sdv_serial_fixup(void) {};
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#endif
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static void __init sdv_arch_setup(void)
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{
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sdv_serial_fixup();
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98
drivers/tty/serial/8250/8250_ce4100.c
Normal file
98
drivers/tty/serial/8250/8250_ce4100.c
Normal file
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@ -0,0 +1,98 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Intel CE4100 platform specific setup code
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*
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* (C) Copyright 2010 Intel Corporation
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*/
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/types.h>
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#include <asm/ce4100.h>
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#include <asm/fixmap.h>
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#include <asm/page.h>
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#include <linux/serial_reg.h>
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#include <linux/serial_8250.h>
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static unsigned int mem_serial_in(struct uart_port *p, int offset)
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{
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offset = offset << p->regshift;
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return readl(p->membase + offset);
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}
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/*
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* The UART Tx interrupts are not set under some conditions and therefore serial
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* transmission hangs. This is a silicon issue and has not been root caused. The
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* workaround for this silicon issue checks UART_LSR_THRE bit and UART_LSR_TEMT
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* bit of LSR register in interrupt handler to see whether at least one of these
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* two bits is set, if so then process the transmit request. If this workaround
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* is not applied, then the serial transmission may hang. This workaround is for
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* errata number 9 in Errata - B step.
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*/
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static u32 ce4100_mem_serial_in(struct uart_port *p, unsigned int offset)
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{
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u32 ret, ier, lsr;
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if (offset != UART_IIR)
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return mem_serial_in(p, offset);
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offset <<= p->regshift;
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ret = readl(p->membase + offset);
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if (!(ret & UART_IIR_NO_INT))
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return ret;
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/* see if the TX interrupt should have really set */
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ier = mem_serial_in(p, UART_IER);
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/* see if the UART's XMIT interrupt is enabled */
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if (!(ier & UART_IER_THRI))
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return ret;
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lsr = mem_serial_in(p, UART_LSR);
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/* now check to see if the UART should be generating an interrupt (but isn't) */
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if (lsr & (UART_LSR_THRE | UART_LSR_TEMT))
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ret &= ~UART_IIR_NO_INT;
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return ret;
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}
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static void ce4100_mem_serial_out(struct uart_port *p, unsigned int offset, u32 value)
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{
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offset <<= p->regshift;
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writel(value, p->membase + offset);
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}
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static void ce4100_serial_fixup(int port, struct uart_port *up, u32 *capabilities)
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{
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#ifdef CONFIG_EARLY_PRINTK
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/*
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* Override the legacy port configuration that comes from
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* asm/serial.h. Using the ioport driver then switching to the
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* PCI memmaped driver hangs the IOAPIC.
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*/
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if (up->iotype != UPIO_MEM32) {
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up->uartclk = 14745600;
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up->mapbase = 0xdffe0200;
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set_fixmap_nocache(FIX_EARLYCON_MEM_BASE, up->mapbase & PAGE_MASK);
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up->membase = (void __iomem *)__fix_to_virt(FIX_EARLYCON_MEM_BASE);
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up->membase += up->mapbase & ~PAGE_MASK;
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up->mapbase += port * 0x100;
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up->membase += port * 0x100;
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up->iotype = UPIO_MEM32;
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up->regshift = 2;
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up->irq = 4;
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}
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#endif
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up->iobase = 0;
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up->serial_in = ce4100_mem_serial_in;
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up->serial_out = ce4100_mem_serial_out;
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*capabilities |= (1 << 12);
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}
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void __init sdv_serial_fixup(void)
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{
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serial8250_set_isa_configurator(ce4100_serial_fixup);
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}
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@ -24,6 +24,7 @@ obj-$(CONFIG_SERIAL_8250_ASPEED_VUART) += 8250_aspeed_vuart.o
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obj-$(CONFIG_SERIAL_8250_BCM2835AUX) += 8250_bcm2835aux.o
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obj-$(CONFIG_SERIAL_8250_BCM7271) += 8250_bcm7271.o
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obj-$(CONFIG_SERIAL_8250_BOCA) += 8250_boca.o
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obj-$(CONFIG_X86_INTEL_CE) += 8250_ce4100.o
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obj-$(CONFIG_SERIAL_8250_DFL) += 8250_dfl.o
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obj-$(CONFIG_SERIAL_8250_DW) += 8250_dw.o
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obj-$(CONFIG_SERIAL_8250_EM) += 8250_em.o
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