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[MIPS] Alchemy PCI code style cleanup
Fix 15 errors and 4 warnings given by checkpatch.pl: - space between the asterisk and variable name; - space after opening and before closing parentheses; - leading spaces instead of tabs; - printk() without KERN_* facility level; - unnecessary braces for single-statement block; - line over 80 characters. In addition to these changes, also do the following: - combine the nested 'if' statements into one when possible; - remove needless parentheses; - add missing and remove excess spaces between operator and its operands; - fix printk() format specifiers mismatching the argument types; - put the function's result type and name/parameters on the same line; - insert missing and remove excess new lines; - properly indent multi-line expressions; - make the multi-line comment style consistent with the kernel style elsewhere by adding empty first line; - fix typos, capitalize acronyms, etc. in the comments; - update MontaVista copyright; - remove Pete Popov's old email address... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Sergei Shtylyov
Ralf Baechle
parent
c1dcb14ec2
commit
a9633279cf
2 changed files with 56 additions and 66 deletions
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@ -1,10 +1,9 @@
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/*
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* BRIEF MODULE DESCRIPTION
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* Board specific pci fixups.
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* Board specific PCI fixups.
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*
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* Copyright 2001-2003 MontaVista Software Inc.
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* Author: MontaVista Software, Inc.
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* ppopov@mvista.com or source@mvista.com
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* Copyright 2001-2003, 2008 MontaVista Software Inc.
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* Author: MontaVista Software, Inc. <source@mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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@ -1,10 +1,9 @@
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/*
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* BRIEF MODULE DESCRIPTION
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* Alchemy/AMD Au1x00 PCI support.
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* Alchemy/AMD Au1xx0 PCI support.
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*
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* Copyright 2001-2003, 2007 MontaVista Software Inc.
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* Author: MontaVista Software, Inc.
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* ppopov@mvista.com or source@mvista.com
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* Copyright 2001-2003, 2007-2008 MontaVista Software Inc.
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* Author: MontaVista Software, Inc. <source@mvista.com>
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*
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* Support for all devices (greater than 16) added by David Gathright.
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*
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@ -28,6 +27,7 @@
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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@ -36,9 +36,9 @@
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#include <asm/mach-au1x00/au1000.h>
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(x...) printk(x)
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(x...) printk(KERN_DEBUG x)
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#else
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#define DBG(x...)
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#endif
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@ -46,7 +46,6 @@
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#define PCI_ACCESS_READ 0
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#define PCI_ACCESS_WRITE 1
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int (*board_pci_idsel)(unsigned int devsel, int assert);
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void mod_wired_entry(int entry, unsigned long entrylo0,
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@ -92,10 +91,9 @@ void __init au1x_pci_cfg_init(void)
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}
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static int config_access(unsigned char access_type, struct pci_bus *bus,
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unsigned int dev_fn, unsigned char where,
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u32 * data)
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unsigned int dev_fn, unsigned char where, u32 *data)
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{
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#if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 )
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#if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
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unsigned int device = PCI_SLOT(dev_fn);
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unsigned int function = PCI_FUNC(dev_fn);
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unsigned long offset, status;
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@ -114,38 +112,36 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
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Au1500_PCI_STATCMD);
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au_sync_udelay(1);
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/* Allow board vendors to implement their own off-chip idsel.
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/*
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* Allow board vendors to implement their own off-chip IDSEL.
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* If it doesn't succeed, may as well bail out at this point.
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*/
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if (board_pci_idsel) {
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if (board_pci_idsel(device, 1) == 0) {
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*data = 0xffffffff;
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local_irq_restore(flags);
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return -1;
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}
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if (board_pci_idsel && board_pci_idsel(device, 1) == 0) {
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*data = 0xffffffff;
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local_irq_restore(flags);
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return -1;
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}
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/* setup the config window */
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if (bus->number == 0) {
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cfg_base = ((1<<device)<<11);
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} else {
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cfg_base = 0x80000000 | (bus->number<<16) | (device<<11);
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}
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/* Setup the config window */
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if (bus->number == 0)
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cfg_base = (1 << device) << 11;
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else
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cfg_base = 0x80000000 | (bus->number << 16) | (device << 11);
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/* setup the lower bits of the 36 bit address */
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offset = (function << 8) | (where & ~0x3);
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/* pick up any address that falls below the page mask */
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/* Setup the lower bits of the 36-bit address */
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offset = (function << 8) | (where & ~0x3);
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/* Pick up any address that falls below the page mask */
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offset |= cfg_base & ~PAGE_MASK;
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/* page boundary */
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/* Page boundary */
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cfg_base = cfg_base & PAGE_MASK;
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/*
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* To improve performance, if the current device is the same as
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* the last device accessed, we don't touch the TLB.
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*/
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entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7;
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entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7;
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entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7;
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entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7;
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if ((entryLo0 != last_entryLo0) || (entryLo1 != last_entryLo1)) {
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mod_wired_entry(pci_cfg_wired_entry, entryLo0, entryLo1,
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(unsigned long)pci_cfg_vm->addr, PM_4K);
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@ -153,38 +149,37 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
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last_entryLo1 = entryLo1;
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}
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if (access_type == PCI_ACCESS_WRITE) {
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if (access_type == PCI_ACCESS_WRITE)
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au_writel(*data, (int)(pci_cfg_vm->addr + offset));
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} else {
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else
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*data = au_readl((int)(pci_cfg_vm->addr + offset));
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}
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au_sync_udelay(2);
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DBG("cfg_access %d bus->number %d dev %d at %x *data %x conf %x\n",
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access_type, bus->number, device, where, *data, offset);
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DBG("cfg_access %d bus->number %u dev %u at %x *data %x conf %lx\n",
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access_type, bus->number, device, where, *data, offset);
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/* check master abort */
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/* Check master abort */
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status = au_readl(Au1500_PCI_STATCMD);
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if (status & (1<<29)) {
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if (status & (1 << 29)) {
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*data = 0xffffffff;
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error = -1;
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DBG("Au1x Master Abort\n");
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} else if ((status >> 28) & 0xf) {
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DBG("PCI ERR detected: device %d, status %x\n", device, ((status >> 28) & 0xf));
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DBG("PCI ERR detected: device %u, status %lx\n",
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device, (status >> 28) & 0xf);
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/* clear errors */
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/* Clear errors */
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au_writel(status & 0xf000ffff, Au1500_PCI_STATCMD);
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*data = 0xffffffff;
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error = -1;
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}
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/* Take away the idsel.
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*/
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if (board_pci_idsel) {
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/* Take away the IDSEL. */
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if (board_pci_idsel)
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(void)board_pci_idsel(device, 0);
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}
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local_irq_restore(flags);
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return error;
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@ -192,7 +187,7 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
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}
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static int read_config_byte(struct pci_bus *bus, unsigned int devfn,
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int where, u8 * val)
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int where, u8 *val)
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{
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u32 data;
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int ret;
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@ -206,9 +201,8 @@ static int read_config_byte(struct pci_bus *bus, unsigned int devfn,
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return ret;
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}
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static int read_config_word(struct pci_bus *bus, unsigned int devfn,
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int where, u16 * val)
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int where, u16 *val)
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{
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u32 data;
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int ret;
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@ -221,7 +215,7 @@ static int read_config_word(struct pci_bus *bus, unsigned int devfn,
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}
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static int read_config_dword(struct pci_bus *bus, unsigned int devfn,
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int where, u32 * val)
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int where, u32 *val)
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{
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int ret;
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@ -229,9 +223,8 @@ static int read_config_dword(struct pci_bus *bus, unsigned int devfn,
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return ret;
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}
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static int
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write_config_byte(struct pci_bus *bus, unsigned int devfn, int where,
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u8 val)
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static int write_config_byte(struct pci_bus *bus, unsigned int devfn,
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int where, u8 val)
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{
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u32 data = 0;
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@ -239,7 +232,7 @@ write_config_byte(struct pci_bus *bus, unsigned int devfn, int where,
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return -1;
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data = (data & ~(0xff << ((where & 3) << 3))) |
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(val << ((where & 3) << 3));
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(val << ((where & 3) << 3));
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if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
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return -1;
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@ -247,9 +240,8 @@ write_config_byte(struct pci_bus *bus, unsigned int devfn, int where,
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return PCIBIOS_SUCCESSFUL;
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}
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static int
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write_config_word(struct pci_bus *bus, unsigned int devfn, int where,
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u16 val)
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static int write_config_word(struct pci_bus *bus, unsigned int devfn,
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int where, u16 val)
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{
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u32 data = 0;
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@ -257,18 +249,16 @@ write_config_word(struct pci_bus *bus, unsigned int devfn, int where,
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return -1;
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data = (data & ~(0xffff << ((where & 3) << 3))) |
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(val << ((where & 3) << 3));
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(val << ((where & 3) << 3));
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if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
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return -1;
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return PCIBIOS_SUCCESSFUL;
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}
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static int
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write_config_dword(struct pci_bus *bus, unsigned int devfn, int where,
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u32 val)
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static int write_config_dword(struct pci_bus *bus, unsigned int devfn,
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int where, u32 val)
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{
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if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val))
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return -1;
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@ -277,18 +267,20 @@ write_config_dword(struct pci_bus *bus, unsigned int devfn, int where,
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}
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static int config_read(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 * val)
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int where, int size, u32 *val)
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{
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switch (size) {
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case 1: {
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u8 _val;
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int rc = read_config_byte(bus, devfn, where, &_val);
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*val = _val;
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return rc;
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}
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case 2: {
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case 2: {
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u16 _val;
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int rc = read_config_word(bus, devfn, where, &_val);
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*val = _val;
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return rc;
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}
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@ -310,7 +302,6 @@ static int config_write(struct pci_bus *bus, unsigned int devfn,
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}
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}
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struct pci_ops au1x_pci_ops = {
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config_read,
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config_write
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