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sparc32: Fix truncated relocation errors when linking large kernels
Use jumps instead of branches when jumping from one section to another
to avoid branches to addresses further away than 22 bit offsets can
handle that results in errors such as
arch/sparc/kernel/signal_32.o:(.fixup+0x0): relocation truncated to fit: R_SPARC_WDISP22 against `.text'
This is the same approach that was taken for sparc64 in commit
52eb053b71
("[SPARC64]: Fix linkage of enormous kernels.")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202405080936.tWaJdO3P-lkp@intel.com/
Closes: https://lore.kernel.org/oe-kbuild-all/202406240441.5zaoshVX-lkp@intel.com/
Link: https://lore.kernel.org/r/20240710092341.457591-1-andreas@gaisler.com
Signed-off-by: Andreas Larsson <andreas@gaisler.com>
This commit is contained in:
parent
e51f125b10
commit
a7ec177ebc
2 changed files with 15 additions and 6 deletions
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@ -95,7 +95,8 @@ __asm__ __volatile__( \
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".section .fixup,#alloc,#execinstr\n\t" \
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".align 4\n" \
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"3:\n\t" \
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"b 2b\n\t" \
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"sethi %%hi(2b), %0\n\t" \
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"jmpl %0 + %%lo(2b), %%g0\n\t" \
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" mov %3, %0\n\t" \
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".previous\n\n\t" \
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".section __ex_table,#alloc\n\t" \
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@ -163,8 +164,9 @@ __asm__ __volatile__( \
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".section .fixup,#alloc,#execinstr\n\t" \
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".align 4\n" \
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"3:\n\t" \
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"sethi %%hi(2b), %0\n\t" \
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"clr %1\n\t" \
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"b 2b\n\t" \
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"jmpl %0 + %%lo(2b), %%g0\n\t" \
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" mov %3, %0\n\n\t" \
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".previous\n\t" \
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".section __ex_table,#alloc\n\t" \
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@ -118,9 +118,12 @@ current_pc:
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mov %o7, %g3
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tst %o0
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be no_sun4u_here
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bne 2f
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mov %g4, %o7 /* Previous %o7. */
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sethi %hi(no_sun4u_here), %l1
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jmpl %l1 + %lo(no_sun4u_here), %g0
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nop
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2:
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mov %o0, %l0 ! stash away romvec
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mov %o0, %g7 ! put it here too
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mov %o1, %l1 ! stash away debug_vec too
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@ -195,7 +198,8 @@ halt_notsup:
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sub %o0, %l6, %o0
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call %o1
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nop
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ba halt_me
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sethi %hi(halt_me), %o0
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jmpl %o0 + %lo(halt_me), %g0
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nop
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not_a_sun4:
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@ -431,8 +435,11 @@ leon_init:
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#ifdef CONFIG_SMP
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ldub [%g2 + %lo(boot_cpu_id)], %g1
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cmp %g1, 0xff ! unset means first CPU
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bne leon_smp_cpu_startup ! continue only with master
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be 1f
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sethi %hi(leon_smp_cpu_startup), %g1
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jmpl %g1 + %lo(leon_smp_cpu_startup), %g0
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nop
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1:
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#endif
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/* Get CPU-ID from most significant 4-bit of ASR17 */
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rd %asr17, %g1
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