From a5a6ce8a7abd48a266c0478b6ca457f7c99692b7 Mon Sep 17 00:00:00 2001 From: Nick Chan Date: Thu, 20 Feb 2025 20:21:46 +0800 Subject: [PATCH] arm64: dts: apple: s8001: Add CPU caches Add information about CPU caches in Apple A9X SoC. Signed-off-by: Nick Chan Link: https://lore.kernel.org/r/20250220-caches-v1-5-2c7011097768@gmail.com Signed-off-by: Sven Peter --- arch/arm64/boot/dts/apple/s8001.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/apple/s8001.dtsi b/arch/arm64/boot/dts/apple/s8001.dtsi index d56d49c048bb..fee350765894 100644 --- a/arch/arm64/boot/dts/apple/s8001.dtsi +++ b/arch/arm64/boot/dts/apple/s8001.dtsi @@ -36,6 +36,9 @@ performance-domains = <&cpufreq>; enable-method = "spin-table"; device_type = "cpu"; + next-level-cache = <&l2_cache>; + i-cache-size = <0x10000>; + d-cache-size = <0x10000>; }; cpu1: cpu@1 { @@ -46,6 +49,16 @@ performance-domains = <&cpufreq>; enable-method = "spin-table"; device_type = "cpu"; + next-level-cache = <&l2_cache>; + i-cache-size = <0x10000>; + d-cache-size = <0x10000>; + }; + + l2_cache: l2-cache { + compatible = "cache"; + cache-level = <2>; + cache-unified; + cache-size = <0x300000>; }; };