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MIPS: ralink: cleanup early_printk

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Add support for the new MT7621/8 SoC and kill ifdefs.
Cleanup some whitespace error while we are at it.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/8028/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
John Crispin 2014-01-24 17:01:17 +01:00 • committed by Ralf Baechle
parent f576fb6a07
commit a097b13c52
1 changed files with 30 additions and 15 deletions
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45
arch/mips/ralink/early_printk.c
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@ -12,21 +12,24 @@
#include <asm/addrspace.h> #include <asm/addrspace.h>
#ifdef CONFIG_SOC_RT288X #ifdef CONFIG_SOC_RT288X
#define EARLY_UART_BASE 0x300c00 #define EARLY_UART_BASE 0x300c00
#define CHIPID_BASE 0x300004
#elif defined(CONFIG_SOC_MT7621)
#define EARLY_UART_BASE 0x1E000c00
#define CHIPID_BASE 0x1E000004
#else #else
#define EARLY_UART_BASE 0x10000c00 #define EARLY_UART_BASE 0x10000c00
#define CHIPID_BASE 0x10000004
#endif #endif
#define UART_REG_RX 0x00 #define MT7628_CHIP_NAME1 0x20203832
#define UART_REG_TX 0x04
#define UART_REG_IER 0x08 #define UART_REG_TX 0x04
#define UART_REG_IIR 0x0c #define UART_REG_LSR 0x14
#define UART_REG_FCR 0x10 #define UART_REG_LSR_RT2880 0x1c
#define UART_REG_LCR 0x14
#define UART_REG_MCR 0x18
#define UART_REG_LSR 0x1c
static __iomem void *uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE); static __iomem void *uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE);
static __iomem void *chipid_membase = (__iomem void *) KSEG1ADDR(CHIPID_BASE);
static inline void uart_w32(u32 val, unsigned reg) static inline void uart_w32(u32 val, unsigned reg)
{ {
@ -38,11 +41,23 @@ static inline u32 uart_r32(unsigned reg)
return __raw_readl(uart_membase + reg); return __raw_readl(uart_membase + reg);
} }
static inline int soc_is_mt7628(void)
{
return IS_ENABLED(CONFIG_SOC_MT7620) &&
(__raw_readl(chipid_membase) == MT7628_CHIP_NAME1);
}
void prom_putchar(unsigned char ch) void prom_putchar(unsigned char ch)
{ {
while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0) if (IS_ENABLED(CONFIG_SOC_MT7621) || soc_is_mt7628()) {
; uart_w32(ch, UART_TX);
uart_w32(ch, UART_REG_TX); while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0)
while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0) ;
; } else {
while ((uart_r32(UART_REG_LSR_RT2880) & UART_LSR_THRE) == 0)
;
uart_w32(ch, UART_REG_TX);
while ((uart_r32(UART_REG_LSR_RT2880) & UART_LSR_THRE) == 0)
;
}
} }