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clk: renesas: cpg-mssr: Add du1 clock to R8A7745
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -129,6 +129,7 @@ static const struct mssr_mod_clk r8a7745_mod_clks[] __initconst = {
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DEF_MOD("scif2", 719, R8A7745_CLK_P),
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DEF_MOD("scif1", 720, R8A7745_CLK_P),
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DEF_MOD("scif0", 721, R8A7745_CLK_P),
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DEF_MOD("du1", 723, R8A7745_CLK_ZX),
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DEF_MOD("du0", 724, R8A7745_CLK_ZX),
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DEF_MOD("ipmmu-sgx", 800, R8A7745_CLK_ZX),
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DEF_MOD("vin1", 810, R8A7745_CLK_ZG),
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