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drm/amd/display: Poll pending DOWN_REP before enabling the link

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[Why]
With special monitor combination on MST, the UP_REQ could come
after clear payload table. It makes the pending DOWN_REP fail
to be handled after link training and the new DOWN_REQ will be queued
until time out .

[How]
To move the current polling pending DOWN_REP procedure to after
clear payload table to make sure the pending DOWN_REP can be
done before enabling the link.

Signed-off-by: Martin Tsai <martin.tsai@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Martin Tsai 2019-02-11 15:26:21 +08:00 • committed by Alex Deucher
parent 55c374e9eb
commit 9cc032b239
3 changed files with 7 additions and 7 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
View file

@ -264,7 +264,7 @@ bool dm_helpers_dp_mst_write_payload_allocation_table(
} }
/* /*
* poll pending down reply before clear payload allocation table * poll pending down reply
*/ */
void dm_helpers_dp_mst_poll_pending_down_reply( void dm_helpers_dp_mst_poll_pending_down_reply(
struct dc_context *ctx, struct dc_context *ctx,

10
drivers/gpu/drm/amd/display/dc/core/dc_link.c
View file

@ -1466,14 +1466,14 @@ static enum dc_status enable_link_dp_mst(
if (link->cur_link_settings.lane_count != LANE_COUNT_UNKNOWN) if (link->cur_link_settings.lane_count != LANE_COUNT_UNKNOWN)
return DC_OK; return DC_OK;
/* to make sure the pending down rep can be processed
* before clear payload table
*/
dm_helpers_dp_mst_poll_pending_down_reply(link->ctx, link);
/* clear payload table */ /* clear payload table */
dm_helpers_dp_mst_clear_payload_allocation_table(link->ctx, link); dm_helpers_dp_mst_clear_payload_allocation_table(link->ctx, link);
/* to make sure the pending down rep can be processed
* before enabling the link
*/
dm_helpers_dp_mst_poll_pending_down_reply(link->ctx, link);
/* set the sink to MST mode before enabling the link */ /* set the sink to MST mode before enabling the link */
dp_enable_mst_on_sink(link, true); dp_enable_mst_on_sink(link, true);

2
drivers/gpu/drm/amd/display/dc/dm_helpers.h
View file

@ -58,7 +58,7 @@ bool dm_helpers_dp_mst_write_payload_allocation_table(
bool enable); bool enable);
/* /*
* poll pending down reply before clear payload allocation table * poll pending down reply
*/ */
void dm_helpers_dp_mst_poll_pending_down_reply( void dm_helpers_dp_mst_poll_pending_down_reply(
struct dc_context *ctx, struct dc_context *ctx,