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atl1c: add module parameter for l1c_wait_until_idle
l1c_wait_until_idle is called for serval modules (TXQ/RXQ/TXMAC/RXMAC). specific moudle have specific idle/busy status in reg REG_IDLE_STATUS. the previous code return wrongly if all modules are in idle status, regardless the 'stop' action is applied on individual module. Refine the reg REG_IDLE_STATUS definition as well. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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9c5282180b
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2 changed files with 24 additions and 15 deletions
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@ -227,17 +227,25 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
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GPHY_CTRL_HIB_PULSE |\
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GPHY_CTRL_HIB_PULSE |\
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GPHY_CTRL_PWDOWN_HW |\
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GPHY_CTRL_PWDOWN_HW |\
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GPHY_CTRL_PHY_IDDQ)
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GPHY_CTRL_PHY_IDDQ)
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/* Block IDLE Status Register */
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/* Block IDLE Status Register */
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#define REG_IDLE_STATUS 0x1410
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#define REG_IDLE_STATUS 0x1410
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#define IDLE_STATUS_MASK 0x00FF
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#define IDLE_STATUS_SFORCE_MASK 0xFUL
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#define IDLE_STATUS_RXMAC_NO_IDLE 0x1
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#define IDLE_STATUS_SFORCE_SHIFT 14
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#define IDLE_STATUS_TXMAC_NO_IDLE 0x2
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#define IDLE_STATUS_CALIB_DONE BIT(13)
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#define IDLE_STATUS_RXQ_NO_IDLE 0x4
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#define IDLE_STATUS_CALIB_RES_MASK 0x1FUL
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#define IDLE_STATUS_TXQ_NO_IDLE 0x8
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#define IDLE_STATUS_CALIB_RES_SHIFT 8
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#define IDLE_STATUS_DMAR_NO_IDLE 0x10
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#define IDLE_STATUS_CALIBERR_MASK 0xFUL
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#define IDLE_STATUS_DMAW_NO_IDLE 0x20
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#define IDLE_STATUS_CALIBERR_SHIFT 4
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#define IDLE_STATUS_SMB_NO_IDLE 0x40
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#define IDLE_STATUS_TXQ_BUSY BIT(3)
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#define IDLE_STATUS_CMB_NO_IDLE 0x80
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#define IDLE_STATUS_RXQ_BUSY BIT(2)
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#define IDLE_STATUS_TXMAC_BUSY BIT(1)
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#define IDLE_STATUS_RXMAC_BUSY BIT(0)
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#define IDLE_STATUS_MASK (\
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IDLE_STATUS_TXQ_BUSY |\
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IDLE_STATUS_RXQ_BUSY |\
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IDLE_STATUS_TXMAC_BUSY |\
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IDLE_STATUS_RXMAC_BUSY)
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/* MDIO Control Register */
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/* MDIO Control Register */
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#define REG_MDIO_CTRL 0x1414
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#define REG_MDIO_CTRL 0x1414
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@ -185,14 +185,14 @@ static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
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* atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
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* atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
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* of the idle status register until the device is actually idle
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* of the idle status register until the device is actually idle
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*/
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*/
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static u32 atl1c_wait_until_idle(struct atl1c_hw *hw)
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static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl)
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{
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{
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int timeout;
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int timeout;
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u32 data;
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u32 data;
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for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
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for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
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AT_READ_REG(hw, REG_IDLE_STATUS, &data);
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AT_READ_REG(hw, REG_IDLE_STATUS, &data);
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if ((data & IDLE_STATUS_MASK) == 0)
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if ((data & modu_ctrl) == 0)
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return 0;
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return 0;
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msleep(1);
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msleep(1);
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}
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}
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@ -1119,13 +1119,14 @@ static int atl1c_stop_mac(struct atl1c_hw *hw)
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data &= ~TXQ_CTRL_EN;
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data &= ~TXQ_CTRL_EN;
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AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
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AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
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atl1c_wait_until_idle(hw);
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atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY);
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AT_READ_REG(hw, REG_MAC_CTRL, &data);
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AT_READ_REG(hw, REG_MAC_CTRL, &data);
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data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
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data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
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AT_WRITE_REG(hw, REG_MAC_CTRL, data);
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AT_WRITE_REG(hw, REG_MAC_CTRL, data);
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return (int)atl1c_wait_until_idle(hw);
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return (int)atl1c_wait_until_idle(hw,
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IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY);
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}
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}
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static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
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static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
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@ -1176,7 +1177,7 @@ static int atl1c_reset_mac(struct atl1c_hw *hw)
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msleep(10);
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msleep(10);
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/* Wait at least 10ms for All module to be Idle */
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/* Wait at least 10ms for All module to be Idle */
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if (atl1c_wait_until_idle(hw)) {
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if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) {
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dev_err(&pdev->dev,
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dev_err(&pdev->dev,
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"MAC state machine can't be idle since"
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"MAC state machine can't be idle since"
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" disabled for 10ms second\n");
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" disabled for 10ms second\n");
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