dt-bindings: net: Add Realtek MDIO controller

Add dtschema for the MDIO controller found in the RTL9300 Ethernet
switch. The controller is slightly unusual in that direct MDIO
communication is not possible. We model the MDIO controller with the
MDIO buses as child nodes and the PHYs as children of the buses. The
mapping of switch port number to MDIO bus/addr requires the
ethernet-ports sibling to provide the mapping via the phy-handle
property.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20250218195216.1034220-4-chris.packham@alliedtelesis.co.nz
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Chris Packham 2025-02-19 08:52:14 +13:00 committed by Jakub Kicinski
parent 92575a2182
commit 96757457da
2 changed files with 117 additions and 0 deletions

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@ -0,0 +1,86 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/realtek,rtl9301-mdio.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Realtek RTL9300 MDIO Controller
maintainers:
- Chris Packham <chris.packham@alliedtelesis.co.nz>
properties:
compatible:
oneOf:
- items:
- enum:
- realtek,rtl9302b-mdio
- realtek,rtl9302c-mdio
- realtek,rtl9303-mdio
- const: realtek,rtl9301-mdio
- const: realtek,rtl9301-mdio
'#address-cells':
const: 1
'#size-cells':
const: 0
reg:
maxItems: 1
patternProperties:
'^mdio-bus@[0-3]$':
$ref: mdio.yaml#
properties:
reg:
maxItems: 1
required:
- reg
patternProperties:
'^ethernet-phy@[a-f0-9]+$':
type: object
$ref: ethernet-phy.yaml#
unevaluatedProperties: false
unevaluatedProperties: false
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
mdio-controller@ca00 {
compatible = "realtek,rtl9301-mdio";
reg = <0xca00 0x200>;
#address-cells = <1>;
#size-cells = <0>;
mdio-bus@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0>;
};
};
mdio-bus@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0>;
};
};
};

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@ -54,6 +54,9 @@ patternProperties:
'i2c@[0-9a-f]+$':
$ref: /schemas/i2c/realtek,rtl9301-i2c.yaml#
'mdio-controller@[0-9a-f]+$':
$ref: realtek,rtl9301-mdio.yaml#
required:
- compatible
- reg
@ -129,15 +132,43 @@ examples:
};
};
mdio-controller@ca00 {
compatible = "realtek,rtl9301-mdio";
reg = <0xca00 0x200>;
#address-cells = <1>;
#size-cells = <0>;
mdio-bus@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
phy1: ethernet-phy@0 {
reg = <0>;
};
};
mdio-bus@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
phy2: ethernet-phy@0 {
reg = <0>;
};
};
};
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
phy-handle = <&phy1>;
};
port@1 {
reg = <1>;
phy-handle = <&phy2>;
};
};
};