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drm/bridge: synopsys: dw-mipi-dsi: Fix hcomponent lbcc for burst mode

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In order to support burst mode, vendor drivers set lane_mbps higher than
bandwidth through DPI interface.  So, calculate horizontal component lane
byte clock cycle(lbcc) based on lane_mbps instead of pixel clock rate for
burst mode.

Fixes: ac87d23694 ("drm/bridge: synopsys: dw-mipi-dsi: Use pixel clock rate to calculate lbcc")
Reported-by: Heiko Stübner <heiko@sntech.de>
Closes: https://lore.kernel.org/linux-arm-kernel/5979575.UjTJXf6HLC@diego/T/#u
Tested-by: Heiko Stübner <heiko@sntech.de> # px30 minievb with xinpeng xpp055c272
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231018035212.1778767-1-victor.liu@nxp.com
This commit is contained in:
Liu Ying 2023-10-18 11:52:12 +08:00 • committed by Heiko Stuebner
parent 6ae2ff23aa
commit 93e82bb4de
1 changed files with 12 additions and 6 deletions
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6
drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c
View file

@ -774,6 +774,11 @@ static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
u32 frac, lbcc, minimum_lbcc;
int bpp;
if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) {
/* lbcc based on lane_mbps */
lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8;
} else {
/* lbcc based on pixel clock rate */
bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
if (bpp < 0) {
dev_err(dsi->dev, "failed to get bpp\n");
@ -781,6 +786,7 @@ static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
}
lbcc = div_u64((u64)hcomponent * mode->clock * bpp, dsi->lanes * 8);
}
frac = lbcc % mode->clock;
lbcc = lbcc / mode->clock;