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iio: dac: ad3530r: Add driver for AD3530R and AD3531R
The AD3530/AD3530R (8-channel) and AD3531/AD3531R (4-channel) are low-power, 16-bit, buffered voltage output DACs with software- programmable gain controls, providing full-scale output spans of 2.5V or 5V for reference voltages of 2.5V. These devices operate from a single 2.7V to 5.5V supply and are guaranteed monotonic by design. The "R" variants include a 2.5V, 5ppm/°C internal reference, which is disabled by default. Support for monitoring internal die temperature, output voltages, and current of a selected channel via the MUXOUT pin using an external ADC is currently not implemented. Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Kim Seer Paller <kimseer.paller@analog.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Link: https://patch.msgid.link/20250429-togreg-v7-3-0af9c543b545@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
parent
6856e36171
commit
93583174a3
4 changed files with 530 additions and 0 deletions
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@ -1306,6 +1306,7 @@ L: linux-iio@vger.kernel.org
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S: Supported
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W: https://ez.analog.com/linux-software-drivers
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F: Documentation/devicetree/bindings/iio/dac/adi,ad3530r.yaml
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F: drivers/iio/dac/ad3530r.c
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ANALOG DEVICES INC AD3552R DRIVER
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M: Nuno Sá <nuno.sa@analog.com>
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@ -6,6 +6,17 @@
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menu "Digital to analog converters"
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config AD3530R
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tristate "Analog Devices AD3530R and Similar DACs driver"
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depends on SPI
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select REGMAP_SPI
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help
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Say yes here to build support for Analog Devices AD3530R, AD3531R
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Digital to Analog Converter.
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To compile this driver as a module, choose M here: the
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module will be called ad3530r.
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config AD3552R_HS
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tristate "Analog Devices AD3552R DAC High Speed driver"
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select AD3552R_LIB
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@ -4,6 +4,7 @@
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#
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# When adding new entries keep the list in alphabetical order
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obj-$(CONFIG_AD3530R) += ad3530r.o
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obj-$(CONFIG_AD3552R_HS) += ad3552r-hs.o
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obj-$(CONFIG_AD3552R_LIB) += ad3552r-common.o
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obj-$(CONFIG_AD3552R) += ad3552r.o
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517
drivers/iio/dac/ad3530r.c
Normal file
517
drivers/iio/dac/ad3530r.c
Normal file
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@ -0,0 +1,517 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* AD3530R/AD3530 8-channel, 16-bit Voltage Output DAC Driver
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* AD3531R/AD3531 4-channel, 16-bit Voltage Output DAC Driver
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*
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* Copyright 2025 Analog Devices Inc.
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*/
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#include <linux/array_size.h>
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#include <linux/bitfield.h>
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#include <linux/bits.h>
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#include <linux/cleanup.h>
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#include <linux/delay.h>
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#include <linux/dev_printk.h>
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#include <linux/err.h>
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#include <linux/gpio/consumer.h>
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#include <linux/iio/iio.h>
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#include <linux/kstrtox.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/property.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include <linux/spi/spi.h>
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#include <linux/sysfs.h>
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#include <linux/types.h>
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#include <linux/units.h>
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#define AD3530R_INTERFACE_CONFIG_A 0x00
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#define AD3530R_OUTPUT_OPERATING_MODE_0 0x20
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#define AD3530R_OUTPUT_OPERATING_MODE_1 0x21
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#define AD3530R_OUTPUT_CONTROL_0 0x2A
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#define AD3530R_REFERENCE_CONTROL_0 0x3C
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#define AD3530R_SW_LDAC_TRIG_A 0xE5
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#define AD3530R_INPUT_CH 0xEB
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#define AD3530R_MAX_REG_ADDR 0xF9
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#define AD3531R_SW_LDAC_TRIG_A 0xDD
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#define AD3531R_INPUT_CH 0xE3
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#define AD3530R_SLD_TRIG_A BIT(7)
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#define AD3530R_OUTPUT_CONTROL_RANGE BIT(2)
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#define AD3530R_REFERENCE_CONTROL_SEL BIT(0)
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#define AD3530R_REG_VAL_MASK GENMASK(15, 0)
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#define AD3530R_OP_MODE_CHAN_MSK(chan) (GENMASK(1, 0) << 2 * (chan))
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#define AD3530R_SW_RESET (BIT(7) | BIT(0))
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#define AD3530R_INTERNAL_VREF_mV 2500
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#define AD3530R_LDAC_PULSE_US 100
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#define AD3530R_DAC_MAX_VAL GENMASK(15, 0)
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#define AD3530R_MAX_CHANNELS 8
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#define AD3531R_MAX_CHANNELS 4
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/* Non-constant mask variant of FIELD_PREP() */
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#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask))
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enum ad3530r_mode {
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AD3530R_NORMAL_OP,
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AD3530R_POWERDOWN_1K,
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AD3530R_POWERDOWN_7K7,
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AD3530R_POWERDOWN_32K,
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};
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struct ad3530r_chan {
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enum ad3530r_mode powerdown_mode;
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bool powerdown;
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};
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struct ad3530r_chip_info {
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const char *name;
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const struct iio_chan_spec *channels;
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int (*input_ch_reg)(unsigned int channel);
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unsigned int num_channels;
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unsigned int sw_ldac_trig_reg;
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bool internal_ref_support;
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};
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struct ad3530r_state {
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struct regmap *regmap;
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/* lock to protect against multiple access to the device and shared data */
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struct mutex lock;
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struct ad3530r_chan chan[AD3530R_MAX_CHANNELS];
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const struct ad3530r_chip_info *chip_info;
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struct gpio_desc *ldac_gpio;
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int vref_mV;
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/*
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* DMA (thus cache coherency maintenance) may require the transfer
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* buffers to live in their own cache lines.
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*/
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__be16 buf __aligned(IIO_DMA_MINALIGN);
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};
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static int ad3530r_input_ch_reg(unsigned int channel)
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{
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return 2 * channel + AD3530R_INPUT_CH;
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}
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static int ad3531r_input_ch_reg(unsigned int channel)
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{
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return 2 * channel + AD3531R_INPUT_CH;
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}
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static const char * const ad3530r_powerdown_modes[] = {
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"1kohm_to_gnd",
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"7.7kohm_to_gnd",
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"32kohm_to_gnd",
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};
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static int ad3530r_get_powerdown_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan)
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{
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struct ad3530r_state *st = iio_priv(indio_dev);
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guard(mutex)(&st->lock);
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return st->chan[chan->channel].powerdown_mode - 1;
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}
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static int ad3530r_set_powerdown_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan,
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unsigned int mode)
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{
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struct ad3530r_state *st = iio_priv(indio_dev);
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guard(mutex)(&st->lock);
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st->chan[chan->channel].powerdown_mode = mode + 1;
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return 0;
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}
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static const struct iio_enum ad3530r_powerdown_mode_enum = {
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.items = ad3530r_powerdown_modes,
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.num_items = ARRAY_SIZE(ad3530r_powerdown_modes),
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.get = ad3530r_get_powerdown_mode,
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.set = ad3530r_set_powerdown_mode,
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};
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static ssize_t ad3530r_get_dac_powerdown(struct iio_dev *indio_dev,
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uintptr_t private,
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const struct iio_chan_spec *chan,
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char *buf)
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{
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struct ad3530r_state *st = iio_priv(indio_dev);
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guard(mutex)(&st->lock);
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return sysfs_emit(buf, "%d\n", st->chan[chan->channel].powerdown);
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}
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static ssize_t ad3530r_set_dac_powerdown(struct iio_dev *indio_dev,
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uintptr_t private,
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const struct iio_chan_spec *chan,
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const char *buf, size_t len)
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{
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struct ad3530r_state *st = iio_priv(indio_dev);
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int ret;
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unsigned int reg, pdmode, mask, val;
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bool powerdown;
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ret = kstrtobool(buf, &powerdown);
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if (ret)
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return ret;
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guard(mutex)(&st->lock);
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reg = chan->channel < AD3531R_MAX_CHANNELS ?
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AD3530R_OUTPUT_OPERATING_MODE_0 :
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AD3530R_OUTPUT_OPERATING_MODE_1;
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pdmode = powerdown ? st->chan[chan->channel].powerdown_mode : 0;
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mask = AD3530R_OP_MODE_CHAN_MSK(chan->channel);
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val = field_prep(mask, pdmode);
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ret = regmap_update_bits(st->regmap, reg, mask, val);
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if (ret)
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return ret;
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st->chan[chan->channel].powerdown = powerdown;
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return len;
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}
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static int ad3530r_trigger_hw_ldac(struct gpio_desc *ldac_gpio)
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{
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gpiod_set_value_cansleep(ldac_gpio, 1);
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fsleep(AD3530R_LDAC_PULSE_US);
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gpiod_set_value_cansleep(ldac_gpio, 0);
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return 0;
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}
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static int ad3530r_dac_write(struct ad3530r_state *st, unsigned int chan,
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unsigned int val)
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{
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int ret;
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guard(mutex)(&st->lock);
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st->buf = cpu_to_be16(val);
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ret = regmap_bulk_write(st->regmap, st->chip_info->input_ch_reg(chan),
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&st->buf, sizeof(st->buf));
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if (ret)
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return ret;
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if (st->ldac_gpio)
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return ad3530r_trigger_hw_ldac(st->ldac_gpio);
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return regmap_set_bits(st->regmap, st->chip_info->sw_ldac_trig_reg,
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AD3530R_SLD_TRIG_A);
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}
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static int ad3530r_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long info)
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{
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struct ad3530r_state *st = iio_priv(indio_dev);
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int ret;
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guard(mutex)(&st->lock);
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switch (info) {
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case IIO_CHAN_INFO_RAW:
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ret = regmap_bulk_read(st->regmap,
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st->chip_info->input_ch_reg(chan->channel),
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&st->buf, sizeof(st->buf));
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if (ret)
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return ret;
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*val = FIELD_GET(AD3530R_REG_VAL_MASK, be16_to_cpu(st->buf));
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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*val = st->vref_mV;
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*val2 = 16;
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return IIO_VAL_FRACTIONAL_LOG2;
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default:
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return -EINVAL;
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}
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}
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static int ad3530r_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long info)
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{
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struct ad3530r_state *st = iio_priv(indio_dev);
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switch (info) {
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case IIO_CHAN_INFO_RAW:
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if (val < 0 || val > AD3530R_DAC_MAX_VAL)
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return -EINVAL;
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return ad3530r_dac_write(st, chan->channel, val);
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default:
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return -EINVAL;
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}
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}
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static int ad3530r_reg_access(struct iio_dev *indio_dev, unsigned int reg,
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unsigned int writeval, unsigned int *readval)
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{
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struct ad3530r_state *st = iio_priv(indio_dev);
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if (readval)
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return regmap_read(st->regmap, reg, readval);
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return regmap_write(st->regmap, reg, writeval);
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}
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static const struct iio_chan_spec_ext_info ad3530r_ext_info[] = {
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{
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.name = "powerdown",
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.shared = IIO_SEPARATE,
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.read = ad3530r_get_dac_powerdown,
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.write = ad3530r_set_dac_powerdown,
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},
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IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad3530r_powerdown_mode_enum),
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IIO_ENUM_AVAILABLE("powerdown_mode", IIO_SHARED_BY_TYPE,
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&ad3530r_powerdown_mode_enum),
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{ }
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};
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#define AD3530R_CHAN(_chan) \
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{ \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = _chan, \
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.output = 1, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
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BIT(IIO_CHAN_INFO_SCALE), \
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.ext_info = ad3530r_ext_info, \
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}
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static const struct iio_chan_spec ad3530r_channels[] = {
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AD3530R_CHAN(0),
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AD3530R_CHAN(1),
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AD3530R_CHAN(2),
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AD3530R_CHAN(3),
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AD3530R_CHAN(4),
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AD3530R_CHAN(5),
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AD3530R_CHAN(6),
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AD3530R_CHAN(7),
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};
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static const struct iio_chan_spec ad3531r_channels[] = {
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AD3530R_CHAN(0),
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AD3530R_CHAN(1),
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AD3530R_CHAN(2),
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AD3530R_CHAN(3),
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};
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static const struct ad3530r_chip_info ad3530_chip = {
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.name = "ad3530",
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.channels = ad3530r_channels,
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.num_channels = ARRAY_SIZE(ad3530r_channels),
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.sw_ldac_trig_reg = AD3530R_SW_LDAC_TRIG_A,
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.input_ch_reg = ad3530r_input_ch_reg,
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.internal_ref_support = false,
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};
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static const struct ad3530r_chip_info ad3530r_chip = {
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.name = "ad3530r",
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.channels = ad3530r_channels,
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.num_channels = ARRAY_SIZE(ad3530r_channels),
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.sw_ldac_trig_reg = AD3530R_SW_LDAC_TRIG_A,
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.input_ch_reg = ad3530r_input_ch_reg,
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.internal_ref_support = true,
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};
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static const struct ad3530r_chip_info ad3531_chip = {
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.name = "ad3531",
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.channels = ad3531r_channels,
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.num_channels = ARRAY_SIZE(ad3531r_channels),
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.sw_ldac_trig_reg = AD3531R_SW_LDAC_TRIG_A,
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.input_ch_reg = ad3531r_input_ch_reg,
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.internal_ref_support = false,
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};
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static const struct ad3530r_chip_info ad3531r_chip = {
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.name = "ad3531r",
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.channels = ad3531r_channels,
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.num_channels = ARRAY_SIZE(ad3531r_channels),
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.sw_ldac_trig_reg = AD3531R_SW_LDAC_TRIG_A,
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.input_ch_reg = ad3531r_input_ch_reg,
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.internal_ref_support = true,
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};
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static int ad3530r_setup(struct ad3530r_state *st, int external_vref_uV)
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{
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struct device *dev = regmap_get_device(st->regmap);
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struct gpio_desc *reset_gpio;
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int i, ret;
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u8 range_multiplier, val;
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reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
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if (IS_ERR(reset_gpio))
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return dev_err_probe(dev, PTR_ERR(reset_gpio),
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"Failed to get reset GPIO\n");
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if (reset_gpio) {
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/* Perform hardware reset */
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fsleep(1 * USEC_PER_MSEC);
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gpiod_set_value_cansleep(reset_gpio, 0);
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} else {
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/* Perform software reset */
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ret = regmap_update_bits(st->regmap, AD3530R_INTERFACE_CONFIG_A,
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AD3530R_SW_RESET, AD3530R_SW_RESET);
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if (ret)
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return ret;
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}
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fsleep(10 * USEC_PER_MSEC);
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range_multiplier = 1;
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if (device_property_read_bool(dev, "adi,range-double")) {
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ret = regmap_set_bits(st->regmap, AD3530R_OUTPUT_CONTROL_0,
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AD3530R_OUTPUT_CONTROL_RANGE);
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if (ret)
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return ret;
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range_multiplier = 2;
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}
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if (external_vref_uV) {
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st->vref_mV = range_multiplier * external_vref_uV / MILLI;
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} else {
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ret = regmap_set_bits(st->regmap, AD3530R_REFERENCE_CONTROL_0,
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AD3530R_REFERENCE_CONTROL_SEL);
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if (ret)
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return ret;
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st->vref_mV = range_multiplier * AD3530R_INTERNAL_VREF_mV;
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}
|
||||
|
||||
/* Set normal operating mode for all channels */
|
||||
val = FIELD_PREP(AD3530R_OP_MODE_CHAN_MSK(0), AD3530R_NORMAL_OP) |
|
||||
FIELD_PREP(AD3530R_OP_MODE_CHAN_MSK(1), AD3530R_NORMAL_OP) |
|
||||
FIELD_PREP(AD3530R_OP_MODE_CHAN_MSK(2), AD3530R_NORMAL_OP) |
|
||||
FIELD_PREP(AD3530R_OP_MODE_CHAN_MSK(3), AD3530R_NORMAL_OP);
|
||||
|
||||
ret = regmap_write(st->regmap, AD3530R_OUTPUT_OPERATING_MODE_0, val);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (st->chip_info->num_channels > 4) {
|
||||
ret = regmap_write(st->regmap, AD3530R_OUTPUT_OPERATING_MODE_1,
|
||||
val);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
for (i = 0; i < st->chip_info->num_channels; i++)
|
||||
st->chan[i].powerdown_mode = AD3530R_POWERDOWN_32K;
|
||||
|
||||
st->ldac_gpio = devm_gpiod_get_optional(dev, "ldac", GPIOD_OUT_LOW);
|
||||
if (IS_ERR(st->ldac_gpio))
|
||||
return dev_err_probe(dev, PTR_ERR(st->ldac_gpio),
|
||||
"Failed to get ldac GPIO\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct regmap_config ad3530r_regmap_config = {
|
||||
.reg_bits = 16,
|
||||
.val_bits = 8,
|
||||
.max_register = AD3530R_MAX_REG_ADDR,
|
||||
};
|
||||
|
||||
static const struct iio_info ad3530r_info = {
|
||||
.read_raw = ad3530r_read_raw,
|
||||
.write_raw = ad3530r_write_raw,
|
||||
.debugfs_reg_access = ad3530r_reg_access,
|
||||
};
|
||||
|
||||
static int ad3530r_probe(struct spi_device *spi)
|
||||
{
|
||||
static const char * const regulators[] = { "vdd", "iovdd" };
|
||||
struct device *dev = &spi->dev;
|
||||
struct iio_dev *indio_dev;
|
||||
struct ad3530r_state *st;
|
||||
int ret, external_vref_uV;
|
||||
|
||||
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
|
||||
if (!indio_dev)
|
||||
return -ENOMEM;
|
||||
|
||||
st = iio_priv(indio_dev);
|
||||
|
||||
st->regmap = devm_regmap_init_spi(spi, &ad3530r_regmap_config);
|
||||
if (IS_ERR(st->regmap))
|
||||
return dev_err_probe(dev, PTR_ERR(st->regmap),
|
||||
"Failed to init regmap");
|
||||
|
||||
ret = devm_mutex_init(dev, &st->lock);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
st->chip_info = spi_get_device_match_data(spi);
|
||||
if (!st->chip_info)
|
||||
return -ENODEV;
|
||||
|
||||
ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulators),
|
||||
regulators);
|
||||
if (ret)
|
||||
return dev_err_probe(dev, ret, "Failed to enable regulators\n");
|
||||
|
||||
external_vref_uV = devm_regulator_get_enable_read_voltage(dev, "ref");
|
||||
if (external_vref_uV < 0 && external_vref_uV != -ENODEV)
|
||||
return external_vref_uV;
|
||||
|
||||
if (external_vref_uV == -ENODEV)
|
||||
external_vref_uV = 0;
|
||||
|
||||
if (!st->chip_info->internal_ref_support && external_vref_uV == 0)
|
||||
return -ENODEV;
|
||||
|
||||
ret = ad3530r_setup(st, external_vref_uV);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
indio_dev->name = st->chip_info->name;
|
||||
indio_dev->info = &ad3530r_info;
|
||||
indio_dev->modes = INDIO_DIRECT_MODE;
|
||||
indio_dev->channels = st->chip_info->channels;
|
||||
indio_dev->num_channels = st->chip_info->num_channels;
|
||||
|
||||
return devm_iio_device_register(&spi->dev, indio_dev);
|
||||
}
|
||||
|
||||
static const struct spi_device_id ad3530r_id[] = {
|
||||
{ "ad3530", (kernel_ulong_t)&ad3530_chip },
|
||||
{ "ad3530r", (kernel_ulong_t)&ad3530r_chip },
|
||||
{ "ad3531", (kernel_ulong_t)&ad3531_chip },
|
||||
{ "ad3531r", (kernel_ulong_t)&ad3531r_chip },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(spi, ad3530r_id);
|
||||
|
||||
static const struct of_device_id ad3530r_of_match[] = {
|
||||
{ .compatible = "adi,ad3530", .data = &ad3530_chip },
|
||||
{ .compatible = "adi,ad3530r", .data = &ad3530r_chip },
|
||||
{ .compatible = "adi,ad3531", .data = &ad3531_chip },
|
||||
{ .compatible = "adi,ad3531r", .data = &ad3531r_chip },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, ad3530r_of_match);
|
||||
|
||||
static struct spi_driver ad3530r_driver = {
|
||||
.driver = {
|
||||
.name = "ad3530r",
|
||||
.of_match_table = ad3530r_of_match,
|
||||
},
|
||||
.probe = ad3530r_probe,
|
||||
.id_table = ad3530r_id,
|
||||
};
|
||||
module_spi_driver(ad3530r_driver);
|
||||
|
||||
MODULE_AUTHOR("Kim Seer Paller <kimseer.paller@analog.com>");
|
||||
MODULE_DESCRIPTION("Analog Devices AD3530R and Similar DACs Driver");
|
||||
MODULE_LICENSE("GPL");
|
Loading…
Add table
Reference in a new issue