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	arm64: dts: layerscape: add num-viewport property for PCIe DT nodes
Add num-viewport property for PCIe DT nodes to specify how many viewports are implemented. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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					 5 changed files with 14 additions and 0 deletions
				
			
		|  | @ -486,6 +486,7 @@ | |||
| 			#size-cells = <2>; | ||||
| 			device_type = "pci"; | ||||
| 			num-lanes = <4>; | ||||
| 			num-viewport = <2>; | ||||
| 			bus-range = <0x0 0xff>; | ||||
| 			ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */ | ||||
| 				  0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ | ||||
|  |  | |||
|  | @ -675,6 +675,7 @@ | |||
| 			device_type = "pci"; | ||||
| 			dma-coherent; | ||||
| 			num-lanes = <4>; | ||||
| 			num-viewport = <6>; | ||||
| 			bus-range = <0x0 0xff>; | ||||
| 			ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */ | ||||
| 				  0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ | ||||
|  | @ -701,6 +702,7 @@ | |||
| 			device_type = "pci"; | ||||
| 			dma-coherent; | ||||
| 			num-lanes = <2>; | ||||
| 			num-viewport = <6>; | ||||
| 			bus-range = <0x0 0xff>; | ||||
| 			ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000   /* downstream I/O */ | ||||
| 				  0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ | ||||
|  | @ -727,6 +729,7 @@ | |||
| 			device_type = "pci"; | ||||
| 			dma-coherent; | ||||
| 			num-lanes = <2>; | ||||
| 			num-viewport = <6>; | ||||
| 			bus-range = <0x0 0xff>; | ||||
| 			ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000   /* downstream I/O */ | ||||
| 				  0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ | ||||
|  |  | |||
|  | @ -644,6 +644,7 @@ | |||
| 			device_type = "pci"; | ||||
| 			dma-coherent; | ||||
| 			num-lanes = <4>; | ||||
| 			num-viewport = <8>; | ||||
| 			bus-range = <0x0 0xff>; | ||||
| 			ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */ | ||||
| 				  0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ | ||||
|  | @ -670,6 +671,7 @@ | |||
| 			device_type = "pci"; | ||||
| 			dma-coherent; | ||||
| 			num-lanes = <2>; | ||||
| 			num-viewport = <8>; | ||||
| 			bus-range = <0x0 0xff>; | ||||
| 			ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000   /* downstream I/O */ | ||||
| 				  0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ | ||||
|  | @ -696,6 +698,7 @@ | |||
| 			device_type = "pci"; | ||||
| 			dma-coherent; | ||||
| 			num-lanes = <2>; | ||||
| 			num-viewport = <8>; | ||||
| 			bus-range = <0x0 0xff>; | ||||
| 			ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000   /* downstream I/O */ | ||||
| 				  0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ | ||||
|  |  | |||
|  | @ -452,6 +452,7 @@ | |||
| 			device_type = "pci"; | ||||
| 			dma-coherent; | ||||
| 			num-lanes = <4>; | ||||
| 			num-viewport = <256>; | ||||
| 			bus-range = <0x0 0xff>; | ||||
| 			ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000   /* downstream I/O */ | ||||
| 				  0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ | ||||
|  | @ -477,6 +478,7 @@ | |||
| 			device_type = "pci"; | ||||
| 			dma-coherent; | ||||
| 			num-lanes = <4>; | ||||
| 			num-viewport = <6>; | ||||
| 			bus-range = <0x0 0xff>; | ||||
| 			ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000   /* downstream I/O */ | ||||
| 				  0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ | ||||
|  | @ -502,6 +504,7 @@ | |||
| 			device_type = "pci"; | ||||
| 			dma-coherent; | ||||
| 			num-lanes = <8>; | ||||
| 			num-viewport = <6>; | ||||
| 			bus-range = <0x0 0xff>; | ||||
| 			ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000   /* downstream I/O */ | ||||
| 				  0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ | ||||
|  |  | |||
|  | @ -627,6 +627,7 @@ | |||
| 			device_type = "pci"; | ||||
| 			dma-coherent; | ||||
| 			num-lanes = <4>; | ||||
| 			num-viewport = <6>; | ||||
| 			bus-range = <0x0 0xff>; | ||||
| 			msi-parent = <&its>; | ||||
| 			#interrupt-cells = <1>; | ||||
|  | @ -648,6 +649,7 @@ | |||
| 			device_type = "pci"; | ||||
| 			dma-coherent; | ||||
| 			num-lanes = <4>; | ||||
| 			num-viewport = <6>; | ||||
| 			bus-range = <0x0 0xff>; | ||||
| 			msi-parent = <&its>; | ||||
| 			#interrupt-cells = <1>; | ||||
|  | @ -669,6 +671,7 @@ | |||
| 			device_type = "pci"; | ||||
| 			dma-coherent; | ||||
| 			num-lanes = <8>; | ||||
| 			num-viewport = <256>; | ||||
| 			bus-range = <0x0 0xff>; | ||||
| 			msi-parent = <&its>; | ||||
| 			#interrupt-cells = <1>; | ||||
|  | @ -690,6 +693,7 @@ | |||
| 			device_type = "pci"; | ||||
| 			dma-coherent; | ||||
| 			num-lanes = <4>; | ||||
| 			num-viewport = <6>; | ||||
| 			bus-range = <0x0 0xff>; | ||||
| 			msi-parent = <&its>; | ||||
| 			#interrupt-cells = <1>; | ||||
|  |  | |||
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	 Hou Zhiqiang
						Hou Zhiqiang