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arm64: dts: freescale: verdin-imx8mp: dahlia: add sound card

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Add WM8904 based analog sound card to Dahlia carrier board.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Tested-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Francesco Dolcini 2023-07-19 14:54:29 +02:00 • committed by Shawn Guo
parent 43df69fc07
commit 8749589168
1 changed files with 53 additions and 3 deletions
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56
arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi
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@ -3,7 +3,36 @@
* Copyright 2022 Toradex * Copyright 2022 Toradex
*/ */
/* TODO: Audio Codec */ / {
sound {
compatible = "simple-audio-card";
simple-audio-card,bitclock-master = <&codec_dai>;
simple-audio-card,format = "i2s";
simple-audio-card,frame-master = <&codec_dai>;
simple-audio-card,mclk-fs = <256>;
simple-audio-card,name = "imx8mp-wm8904";
simple-audio-card,routing =
"Headphone Jack", "HPOUTL",
"Headphone Jack", "HPOUTR",
"IN2L", "Line In Jack",
"IN2R", "Line In Jack",
"Headphone Jack", "MICBIAS",
"IN1L", "Headphone Jack";
simple-audio-card,widgets =
"Microphone", "Headphone Jack",
"Headphone", "Headphone Jack",
"Line", "Line In Jack";
codec_dai: simple-audio-card,codec {
clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1>;
sound-dai = <&wm8904_1a>;
};
simple-audio-card,cpu {
sound-dai = <&sai1>;
};
};
};
&backlight { &backlight {
power-supply = <&reg_3p3v>; power-supply = <&reg_3p3v>;
@ -64,7 +93,21 @@
&i2c4 { &i2c4 {
status = "okay"; status = "okay";
/* TODO: Audio Codec */ /* Audio Codec */
wm8904_1a: audio-codec@1a {
compatible = "wlf,wm8904";
reg = <0x1a>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai1>;
#sound-dai-cells = <0>;
clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1>;
clock-names = "mclk";
AVDD-supply = <&reg_1p8v>;
CPVDD-supply = <&reg_1p8v>;
DBVDD-supply = <&reg_1p8v>;
DCVDD-supply = <&reg_1p8v>;
MICVDD-supply = <&reg_1p8v>;
};
}; };
/* Verdin PCIE_1 */ /* Verdin PCIE_1 */
@ -95,7 +138,14 @@
vin-supply = <&reg_3p3v>; vin-supply = <&reg_3p3v>;
}; };
/* TODO: Verdin I2S_1 */ /* Verdin I2S_1 */
&sai1 {
assigned-clocks = <&clk IMX8MP_CLK_SAI1>;
assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
assigned-clock-rates = <24576000>;
fsl,sai-mclk-direction-output;
status = "okay";
};
/* Verdin UART_1 */ /* Verdin UART_1 */
&uart1 { &uart1 {