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arm64: dts: renesas: Add IOMMU related properties into PCIe host nodes

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Add iommu-map and iommu-map-mask properties to the PCIe host nodes.
Note that iommu-map-mask should be zero because the IPMMU assigns
one micro TLB ID only, to the PCIe host.

Also change the dma-ranges arguments for IOMMU.  Note that dma-ranges
can be used if the IOMMU is disabled.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230510090358.261266-1-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Yoshihiro Shimoda 2023-05-10 18:03:58 +09:00 • committed by Geert Uytterhoeven
parent 18cbbdd846
commit 86d904b6ef
10 changed files with 68 additions and 33 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

12
arch/arm64/boot/dts/renesas/r8a774a1.dtsi
View file

@ -2359,8 +2359,8 @@
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
<0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
<0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
/* Map all possible DDR/IOMMU as inbound ranges */
dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
@ -2371,6 +2371,8 @@
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 319>;
iommu-map = <0 &ipmmu_hc 0 1>;
iommu-map-mask = <0>;
status = "disabled";
};
@ -2386,8 +2388,8 @@
<0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
<0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
<0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
/* Map all possible DDR/IOMMU as inbound ranges */
dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
@ -2398,6 +2400,8 @@
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 318>;
iommu-map = <0 &ipmmu_hc 1 1>;
iommu-map-mask = <0>;
status = "disabled";
};

12
arch/arm64/boot/dts/renesas/r8a774b1.dtsi
View file

@ -2238,8 +2238,8 @@
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
<0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
<0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
/* Map all possible DDR/IOMMU as inbound ranges */
dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
@ -2250,6 +2250,8 @@
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
resets = <&cpg 319>;
iommu-map = <0 &ipmmu_hc 0 1>;
iommu-map-mask = <0>;
status = "disabled";
};
@ -2265,8 +2267,8 @@
<0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
<0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
<0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
/* Map all possible DDR/IOMMU as inbound ranges */
dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
@ -2277,6 +2279,8 @@
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
resets = <&cpg 318>;
iommu-map = <0 &ipmmu_hc 1 1>;
iommu-map-mask = <0>;
status = "disabled";
};

6
arch/arm64/boot/dts/renesas/r8a774c0.dtsi
View file

@ -1704,8 +1704,8 @@
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
<0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
<0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
/* Map all possible DDR/IOMMU as inbound ranges */
dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
@ -1716,6 +1716,8 @@
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
resets = <&cpg 319>;
iommu-map = <0 &ipmmu_hc 0 1>;
iommu-map-mask = <0>;
status = "disabled";
};

12
arch/arm64/boot/dts/renesas/r8a774e1.dtsi
View file

@ -2471,8 +2471,8 @@
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
<0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
<0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
/* Map all possible DDR/IOMMU as inbound ranges */
dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
@ -2483,6 +2483,8 @@
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
resets = <&cpg 319>;
iommu-map = <0 &ipmmu_hc 0 1>;
iommu-map-mask = <0>;
status = "disabled";
};
@ -2498,8 +2500,8 @@
<0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
<0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
<0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
/* Map all possible DDR/IOMMU as inbound ranges */
dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
@ -2510,6 +2512,8 @@
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
resets = <&cpg 318>;
iommu-map = <0 &ipmmu_hc 1 1>;
iommu-map-mask = <0>;
status = "disabled";
};

12
arch/arm64/boot/dts/renesas/r8a77951.dtsi
View file

@ -2778,8 +2778,8 @@
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
<0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
<0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
/* Map all possible DDR/IOMMU as inbound ranges */
dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
@ -2790,6 +2790,8 @@
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 319>;
iommu-map = <0 &ipmmu_hc 0 1>;
iommu-map-mask = <0>;
status = "disabled";
};
@ -2805,8 +2807,8 @@
<0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
<0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
<0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
/* Map all possible DDR/IOMMU as inbound ranges */
dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
@ -2817,6 +2819,8 @@
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 318>;
iommu-map = <0 &ipmmu_hc 1 1>;
iommu-map-mask = <0>;
status = "disabled";
};

12
arch/arm64/boot/dts/renesas/r8a77960.dtsi
View file

@ -2565,8 +2565,8 @@
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
<0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
<0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
/* Map all possible DDR/IOMMU as inbound ranges */
dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
@ -2577,6 +2577,8 @@
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
resets = <&cpg 319>;
iommu-map = <0 &ipmmu_hc 0 1>;
iommu-map-mask = <0>;
status = "disabled";
};
@ -2592,8 +2594,8 @@
<0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
<0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
<0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
/* Map all possible DDR/IOMMU as inbound ranges */
dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
@ -2604,6 +2606,8 @@
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
resets = <&cpg 318>;
iommu-map = <0 &ipmmu_hc 1 1>;
iommu-map-mask = <0>;
status = "disabled";
};

12
arch/arm64/boot/dts/renesas/r8a77961.dtsi
View file

@ -2445,8 +2445,8 @@
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
<0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
<0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
/* Map all possible DDR/IOMMU as inbound ranges */
dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
@ -2457,6 +2457,8 @@
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
resets = <&cpg 319>;
iommu-map = <0 &ipmmu_hc 0 1>;
iommu-map-mask = <0>;
status = "disabled";
};
@ -2472,8 +2474,8 @@
<0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
<0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
<0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
/* Map all possible DDR/IOMMU as inbound ranges */
dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
@ -2484,6 +2486,8 @@
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
resets = <&cpg 318>;
iommu-map = <0 &ipmmu_hc 1 1>;
iommu-map-mask = <0>;
status = "disabled";
};

12
arch/arm64/boot/dts/renesas/r8a77965.dtsi
View file

@ -2423,8 +2423,8 @@
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
<0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
<0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
/* Map all possible DDR/IOMMU as inbound ranges */
dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
@ -2435,6 +2435,8 @@
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 319>;
iommu-map = <0 &ipmmu_hc 0 1>;
iommu-map-mask = <0>;
status = "disabled";
};
@ -2450,8 +2452,8 @@
<0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
<0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
<0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
/* Map all possible DDR/IOMMU as inbound ranges */
dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
@ -2462,6 +2464,8 @@
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 318>;
iommu-map = <0 &ipmmu_hc 1 1>;
iommu-map-mask = <0>;
status = "disabled";
};

5
arch/arm64/boot/dts/renesas/r8a77980.dtsi
View file

@ -1386,7 +1386,8 @@
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000>,
<0x02000000 0 0x30000000 0 0x30000000 0 0x8000000>,
<0x42000000 0 0x38000000 0 0x38000000 0 0x8000000>;
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
/* Map all possible DDR/IOMMU as inbound ranges */
dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
@ -1399,6 +1400,8 @@
resets = <&cpg 319>;
phys = <&pcie_phy>;
phy-names = "pcie";
iommu-map = <0 &ipmmu_vi0 5 1>;
iommu-map-mask = <0>;
status = "disabled";
};

6
arch/arm64/boot/dts/renesas/r8a77990.dtsi
View file

@ -1870,8 +1870,8 @@
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
<0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
<0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
/* Map all possible DDR/IOMMU as inbound ranges */
dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
@ -1882,6 +1882,8 @@
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
resets = <&cpg 319>;
iommu-map = <0 &ipmmu_hc 0 1>;
iommu-map-mask = <0>;
status = "disabled";
};