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ARM: Device-tree updates

Browse source 
Device-tree continues to see lots of updates. The majority of patches
 here are smaller changes for new hardware on existing platforms, and
 there are a few larger changes worth pointing out.
 
 Major new platforms:
 
  - Gemini has been ported to DT, so a handful of "new" platforms moved over
    from board files
  - Rockchip RK3288 support for Tinkerboard and Phytec phyCORE-RK3288 SoM and RDK
  - A bunch of embedded platforms, several Linksys platforms, Synology DS116,
  - Motorola Droid4 (really old OMAP-based phone) support is added.
 
 Some refactorings, i.e. Allwinner H3/H5 support is commonalized.
 
 And lots of smaller changes, cleanups, etc. See shortlog for more description
 
 We're adding ability to cross-include DT files between arm and arm64,
 by creating appropriate links in the dt-include directory, and using arm/
 and arm64/ as include prefixes. This will avoid other local hacks such as
 per-file links between the two arch trees (this broke for external mirroring
 of DT contents). Now they can just provide their own appropriate dt-include
 hierarcy per platform.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM Device-tree updates from Olof Johansson:
 "Device-tree continues to see lots of updates. The majority of patches
  here are smaller changes for new hardware on existing platforms, and
  there are a few larger changes worth pointing out.

  Major new platforms:

   - Gemini has been ported to DT, so a handful of "new" platforms moved
     over from board files

   - Rockchip RK3288 support for Tinkerboard and Phytec phyCORE-RK3288
     SoM and RDK

   - A bunch of embedded platforms, several Linksys platforms, Synology
     DS116,

   - Motorola Droid4 (really old OMAP-based phone) support is added.

  Some refactorings, i.e. Allwinner H3/H5 support is commonalized.

  And lots of smaller changes, cleanups, etc. See shortlog for more
  description

  We're adding ability to cross-include DT files between arm and arm64,
  by creating appropriate links in the dt-include directory, and using
  arm/ and arm64/ as include prefixes. This will avoid other local hacks
  such as per-file links between the two arch trees (this broke for
  external mirroring of DT contents). Now they can just provide their
  own appropriate dt-include hierarcy per platform"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (349 commits)
  ARM: dts: exynos: Use - instead of @ for DT OPP entries
  arm: spear6xx: add DT description of the ADC on SPEAr600
  arm: spear6xx: remove unneeded pinctrl properties in spear600-evb
  arm: spear6xx: switch spear600-evb to the new flash partition DT binding
  arm: spear6xx: fix spaces in spear600-evb.dts
  arm: spear6xx: use node labels in spear600-evb.dts
  arm: spear6xx: add labels to various nodes in spear600.dtsi
  ARM: dts: vexpress: fix few unit address format warnings
  ARM: dts: at91: sama5d3_xplained: not all ADC channels are available
  ARM: dts: at91: sama5d3_xplained: fix ADC vref
  ARM: dts: at91: add envelope detector mux to the Axentia TSE-850
  ARM: dts: armada-38x: label USB and SATA nodes
  ARM: dts: imx6q-utilite-pro: add hpd gpio
  ARM: dts: imx6qp-sabresd: Set reg_arm regulator supply
  ARM: dts: imx6qdl-sabresd: Set LDO regulator supply
  ARM: dts: imx: add Gateworks Ventana GW5903 support
  ARM: dts: i.MX25: add AIPS control registers
  ARM: dts: imx7-colibri: add Carrier Board 3.3V/5V regulators
  ARM: dts: imx7-colibri: remove 1.8V fixed regulator
  ARM: dts: imx7-colibri: allow to disable Ethernet rail
  ...
This commit is contained in:
Linus Torvalds 2017-05-09 09:54:39 -07:00
commit 85d604902e
378 changed files with 13144 additions and 2823 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
Documentation/devicetree/bindings/arm/atmel-at91.txt
View file

@ -217,7 +217,8 @@ memory, bridge implementations, processor and other functionality not controlled
elsewhere.
required properties:
- compatible: Should be "atmel,<chip>-sfr", "syscon".
- compatible: Should be "atmel,<chip>-sfr", "syscon" or
"atmel,<chip>-sfrbu", "syscon"
<chip> can be "sama5d3", "sama5d4" or "sama5d2".
- reg: Should contain registers location and length

86
Documentation/devicetree/bindings/arm/gemini.txt Normal file
View file

@ -0,0 +1,86 @@
Cortina systems Gemini platforms
The Gemini SoC is the project name for an ARMv4 FA525-based SoC originally
produced by Storlink Semiconductor around 2005. The company was renamed
later renamed Storm Semiconductor. The chip product name is Storlink SL3516.
It was derived from earlier products from Storm named SL3316 (Centroid) and
SL3512 (Bulverde).
Storm Semiconductor was acquired by Cortina Systems in 2008 and the SoC was
produced and used for NAS and similar usecases. In 2014 Cortina Systems was
in turn acquired by Inphi, who seem to have discontinued this product family.
Many of the IP blocks used in the SoC comes from Faraday Technology.
Required properties (in root node):
compatible = "cortina,gemini";
Required nodes:
- soc: the SoC should be represented by a simple bus encompassing all the
onchip devices, this is referred to as the soc bus node.
- syscon: the soc bus node must have a system controller node pointing to the
global control registers, with the compatible string
"cortina,gemini-syscon", "syscon";
- timer: the soc bus node must have a timer node pointing to the SoC timer
block, with the compatible string "cortina,gemini-timer"
See: clocksource/cortina,gemini-timer.txt
- interrupt-controller: the sob bus node must have an interrupt controller
node pointing to the SoC interrupt controller block, with the compatible
string "cortina,gemini-interrupt-controller"
See interrupt-controller/cortina,gemini-interrupt-controller.txt
Example:
/ {
model = "Foo Gemini Machine";
compatible = "cortina,gemini";
#address-cells = <1>;
#size-cells = <1>;
memory {
device_type = "memory";
reg = <0x00000000 0x8000000>;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
ranges;
compatible = "simple-bus";
interrupt-parent = <&intcon>;
syscon: syscon@40000000 {
compatible = "cortina,gemini-syscon", "syscon";
reg = <0x40000000 0x1000>;
};
uart0: serial@42000000 {
compatible = "ns16550a";
reg = <0x42000000 0x100>;
clock-frequency = <48000000>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
};
timer@43000000 {
compatible = "cortina,gemini-timer";
reg = <0x43000000 0x1000>;
interrupt-parent = <&intcon>;
interrupts = <14 IRQ_TYPE_EDGE_FALLING>, /* Timer 1 */
<15 IRQ_TYPE_EDGE_FALLING>, /* Timer 2 */
<16 IRQ_TYPE_EDGE_FALLING>; /* Timer 3 */
syscon = <&syscon>;
};
intcon: interrupt-controller@48000000 {
compatible = "cortina,gemini-interrupt-controller";
reg = <0x48000000 0x1000>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};

22
Documentation/devicetree/bindings/arm/i2se.txt Normal file
View file

@ -0,0 +1,22 @@
I2SE Device Tree Bindings
-------------------------
Duckbill Board
Required root node properties:
- compatible = "i2se,duckbill", "fsl,imx28";
Duckbill 2 Board
Required root node properties:
- compatible = "i2se,duckbill-2", "fsl,imx28";
Duckbill 2 485 Board
Required root node properties:
- compatible = "i2se,duckbill-2-485", "i2se,duckbill-2", "fsl,imx28";
Duckbill 2 EnOcean Board
Required root node properties:
- compatible = "i2se,duckbill-2-enocean", "i2se,duckbill-2", "fsl,imx28";
Duckbill 2 SPI Board
Required root node properties:
- compatible = "i2se,duckbill-2-spi", "i2se,duckbill-2", "fsl,imx28";

7
Documentation/devicetree/bindings/arm/rockchip.txt
View file

@ -1,5 +1,8 @@
Rockchip platforms device tree bindings
---------------------------------------
- Asus Tinker board
Required root node properties:
- compatible = "asus,rk3288-tinker", "rockchip,rk3288";
- Kylin RK3036 board:
Required root node properties:
@ -103,6 +106,10 @@ Rockchip platforms device tree bindings
Required root node properties:
- compatible = "mqmaker,miqi", "rockchip,rk3288";
- Phytec phyCORE-RK3288: Rapid Development Kit
Required root node properties:
- compatible = "phytec,rk3288-pcm-947", "phytec,rk3288-phycore-som", "rockchip,rk3288";
- Rockchip PX3 Evaluation board:
Required root node properties:
- compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188";

4
Documentation/devicetree/bindings/arm/shmobile.txt
View file

@ -13,8 +13,12 @@ SoCs:
compatible = "renesas,r8a73a4"
- R-Mobile A1 (R8A77400)
compatible = "renesas,r8a7740"
- RZ/G1H (R8A77420)
compatible = "renesas,r8a7742"
- RZ/G1M (R8A77430)
compatible = "renesas,r8a7743"
- RZ/G1N (R8A77440)
compatible = "renesas,r8a7744"
- RZ/G1E (R8A77450)
compatible = "renesas,r8a7745"
- R-Car M1A (R8A77781)

8
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-flowctrl.txt
View file

@ -1,7 +1,13 @@
NVIDIA Tegra Flow Controller
Required properties:
- compatible: Should be "nvidia,tegra<chip>-flowctrl"
- compatible: Should contain one of the following:
- "nvidia,tegra20-flowctrl": for Tegra20
- "nvidia,tegra30-flowctrl": for Tegra30
- "nvidia,tegra114-flowctrl": for Tegra114
- "nvidia,tegra124-flowctrl": for Tegra124
- "nvidia,tegra132-flowctrl", "nvidia,tegra124-flowctrl": for Tegra132
- "nvidia,tegra210-flowctrl": for Tegra210
- reg: Should contain one register range (address and length)
Example:

7
Documentation/devicetree/bindings/clock/mvebu-core-clock.txt
View file

@ -31,6 +31,12 @@ The following is a list of provided IDs and clock names on Armada 39x:
4 = dclk (SDRAM Interface Clock)
5 = refclk (Reference Clock)
The following is a list of provided IDs and clock names on 98dx3236:
0 = tclk (Internal Bus clock)
1 = cpuclk (CPU clock)
2 = ddrclk (DDR clock)
3 = mpll (MPLL Clock)
The following is a list of provided IDs and clock names on Kirkwood and Dove:
0 = tclk (Internal Bus clock)
1 = cpuclk (CPU0 clock)
@ -49,6 +55,7 @@ Required properties:
"marvell,armada-380-core-clock" - For Armada 380/385 SoC core clocks
"marvell,armada-390-core-clock" - For Armada 39x SoC core clocks
"marvell,armada-xp-core-clock" - For Armada XP SoC core clocks
"marvell,mv98dx3236-core-clock" - For 98dx3236 family SoC core clocks
"marvell,dove-core-clock" - for Dove SoC core clocks
"marvell,kirkwood-core-clock" - for Kirkwood SoC (except mv88f6180)
"marvell,mv88f6180-core-clock" - for Kirkwood MV88f6180 SoC

11
Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt
View file

@ -119,6 +119,16 @@ ID Clock Peripheral
29 sata1lnk
30 sata1 SATA Host 1
The following is a list of provided IDs for 98dx3236:
ID Clock Peripheral
-----------------------------------
3 ge1 Gigabit Ethernet 1
4 ge0 Gigabit Ethernet 0
5 pex0 PCIe Cntrl 0
17 sdio SDHCI Host
18 usb0 USB Host 0
22 xor0 XOR DMA 0
The following is a list of provided IDs for Dove:
ID Clock Peripheral
-----------------------------------
@ -169,6 +179,7 @@ Required properties:
"marvell,armada-380-gating-clock" - for Armada 380/385 SoC clock gating
"marvell,armada-390-gating-clock" - for Armada 39x SoC clock gating
"marvell,armada-xp-gating-clock" - for Armada XP SoC clock gating
"marvell,mv98dx3236-gating-clock" - for 98dx3236 SoC clock gating
"marvell,dove-gating-clock" - for Dove SoC clock gating
"marvell,kirkwood-gating-clock" - for Kirkwood SoC clock gating
- reg : shall be the register address of the Clock Gating Control register

46
Documentation/devicetree/bindings/devfreq/exynos-bus.txt
View file

@ -202,23 +202,23 @@ Example2 :
compatible = "operating-points-v2";
opp-shared;
opp@50000000 {
opp-50000000 {
opp-hz = /bits/ 64 <50000000>;
opp-microvolt = <800000>;
};
opp@100000000 {
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
opp-microvolt = <800000>;
};
opp@134000000 {
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
opp-microvolt = <800000>;
};
opp@200000000 {
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <825000>;
};
opp@400000000 {
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <875000>;
};
@ -292,23 +292,23 @@ Example2 :
compatible = "operating-points-v2";
opp-shared;
opp@50000000 {
opp-50000000 {
opp-hz = /bits/ 64 <50000000>;
opp-microvolt = <900000>;
};
opp@80000000 {
opp-80000000 {
opp-hz = /bits/ 64 <80000000>;
opp-microvolt = <900000>;
};
opp@100000000 {
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
opp-microvolt = <1000000>;
};
opp@134000000 {
opp-134000000 {
opp-hz = /bits/ 64 <134000000>;
opp-microvolt = <1000000>;
};
opp@200000000 {
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <1000000>;
};
@ -318,19 +318,19 @@ Example2 :
compatible = "operating-points-v2";
opp-shared;
opp@50000000 {
opp-50000000 {
opp-hz = /bits/ 64 <50000000>;
};
opp@80000000 {
opp-80000000 {
opp-hz = /bits/ 64 <80000000>;
};
opp@100000000 {
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
};
opp@200000000 {
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
};
opp@400000000 {
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
};
};
@ -339,19 +339,19 @@ Example2 :
compatible = "operating-points-v2";
opp-shared;
opp@50000000 {
opp-50000000 {
opp-hz = /bits/ 64 <50000000>;
};
opp@80000000 {
opp-80000000 {
opp-hz = /bits/ 64 <80000000>;
};
opp@100000000 {
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
};
opp@200000000 {
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
};
opp@300000000 {
opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
};
};
@ -360,13 +360,13 @@ Example2 :
compatible = "operating-points-v2";
opp-shared;
opp@50000000 {
opp-50000000 {
opp-hz = /bits/ 64 <50000000>;
};
opp@80000000 {
opp-80000000 {
opp-hz = /bits/ 64 <80000000>;
};
opp@100000000 {
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
};
};

2
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
View file

@ -94,6 +94,7 @@ Required properties:
* allwinner,sun6i-a31-display-backend
* allwinner,sun8i-a33-display-backend
- reg: base address and size of the memory-mapped region.
- interrupts: interrupt associated to this IP
- clocks: phandles to the clocks feeding the frontend and backend
* ahb: the backend interface clock
* mod: the backend module clock
@ -265,6 +266,7 @@ fe0: display-frontend@1e00000 {
be0: display-backend@1e60000 {
compatible = "allwinner,sun5i-a13-display-backend";
reg = <0x01e60000 0x10000>;
interrupts = <47>;
clocks = <&ahb_gates 44>, <&de_be_clk>,
<&dram_gates 26>;
clock-names = "ahb", "mod",

8
Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
View file

@ -35,6 +35,14 @@ Optional properties:
- interrupt-names and interrupts:
* pmu: Power Management Unit interrupt, if implemented in hardware
- memory-region:
Memory region to allocate from, as defined in
Documentation/devicetree/bindi/reserved-memory/reserved-memory.txt
- operating-points-v2:
Operating Points for the GPU, as defined in
Documentation/devicetree/bindings/opp/opp.txt
Vendor-specific bindings
------------------------

25
Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
View file

@ -5,6 +5,7 @@ Required properties:
Currently recognized values:
- nvidia,gk20a
- nvidia,gm20b
- nvidia,gp10b
- reg: Physical base address and length of the controller's registers.
Must contain two entries:
- first entry for bar0
@ -14,7 +15,8 @@ Required properties:
- interrupt-names: Must include the following entries:
- stall
- nonstall
- vdd-supply: regulator for supply voltage.
- vdd-supply: regulator for supply voltage. Only required for GPUs not using
power domains.
- clocks: Must contain an entry for each entry in clock-names.
See ../clocks/clock-bindings.txt for details.
- clock-names: Must include the following entries:
@ -27,6 +29,8 @@ is also required:
See ../reset/reset.txt for details.
- reset-names: Must include the following entries:
- gpu
- power-domains: GPUs that make use of power domains can define this property
instead of vdd-supply. Currently "nvidia,gp10b" makes use of this.
Optional properties:
- iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details.
@ -68,3 +72,22 @@ Example for GM20B:
iommus = <&mc TEGRA_SWGROUP_GPU>;
status = "disabled";
};
Example for GP10B:
gpu@17000000 {
compatible = "nvidia,gp10b";
reg = <0x0 0x17000000 0x0 0x1000000>,
<0x0 0x18000000 0x0 0x1000000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "stall", "nonstall";
clocks = <&bpmp TEGRA186_CLK_GPCCLK>,
<&bpmp TEGRA186_CLK_GPU>;
clock-names = "gpu", "pwr";
resets = <&bpmp TEGRA186_RESET_GPU>;
reset-names = "gpu";
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_GPU>;
iommus = <&smmu TEGRA186_SID_GPU>;
status = "disabled";
};

1
Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt
View file

@ -40,6 +40,7 @@ Required properties:
w25x80
w25x32
w25q32
w25q64
w25q32dw
w25q80bl
w25q128

13
Documentation/devicetree/bindings/net/marvell,prestera.txt
View file

@ -32,19 +32,16 @@ DFX Server bindings
-------------------
Required properties:
- compatible: must be "marvell,dfx-server"
- compatible: must be "marvell,dfx-server", "simple-bus"
- ranges: describes the address mapping of a memory-mapped bus.
- reg: address and length of the register set for the device.
Example:
dfx-registers {
compatible = "simple-bus";
dfx-server {
compatible = "marvell,dfx-server", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 MBUS_ID(0x08, 0x00) 0 0x100000>;
dfx: dfx@0 {
compatible = "marvell,dfx-server";
reg = <0 0x100000>;
};
reg = <MBUS_ID(0x08, 0x00) 0 0x100000>;
};

4
Documentation/devicetree/bindings/usb/dwc2.txt
View file

@ -14,6 +14,10 @@ Required properties:
- "amlogic,meson-gxbb-usb": The DWC2 USB controller instance in Amlogic S905 SoCs;
- "amcc,dwc-otg": The DWC2 USB controller instance in AMCC Canyonlands 460EX SoCs;
- snps,dwc2: A generic DWC2 USB controller with default parameters.
- "st,stm32f4x9-fsotg": The DWC2 USB FS/HS controller instance in STM32F4x9 SoCs
configured in FS mode;
- "st,stm32f4x9-hsotg": The DWC2 USB HS controller instance in STM32F4x9 SoCs
configured in HS mode;
- reg : Should contain 1 register range (address and length)
- interrupts : Should contain 1 interrupt
- clocks: clock provider specifier

17
Documentation/devicetree/bindings/watchdog/cortina,gemini-watchdog.txt Normal file
View file

@ -0,0 +1,17 @@
Cortina Systems Gemini SoC Watchdog
Required properties:
- compatible : must be "cortina,gemini-watchdog"
- reg : shall contain base register location and length
- interrupts : shall contain the interrupt for the watchdog
Optional properties:
- timeout-sec : the default watchdog timeout in seconds.
Example:
watchdog@41000000 {
compatible = "cortina,gemini-watchdog";
reg = <0x41000000 0x1000>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
};

73
arch/arm/boot/dts/Makefile
View file

@ -77,6 +77,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
bcm4708-asus-rt-ac56u.dtb \
bcm4708-asus-rt-ac68u.dtb \
bcm4708-buffalo-wzr-1750dhp.dtb \
bcm4708-linksys-ea6300-v1.dtb \
bcm4708-luxul-xap-1510.dtb \
bcm4708-luxul-xwc-1000.dtb \
bcm4708-netgear-r6250.dtb \
@ -87,17 +88,21 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
bcm47081-buffalo-wzr-900dhp.dtb \
bcm47081-luxul-xap-1410.dtb \
bcm47081-luxul-xwr-1200.dtb \
bcm47081-tplink-archer-c5-v2.dtb \
bcm4709-asus-rt-ac87u.dtb \
bcm4709-buffalo-wxr-1900dhp.dtb \
bcm4709-linksys-ea9200.dtb \
bcm4709-netgear-r7000.dtb \
bcm4709-netgear-r8000.dtb \
bcm4709-tplink-archer-c9-v1.dtb \
bcm47094-dlink-dir-885l.dtb \
bcm47094-linksys-panamera.dtb \
bcm47094-luxul-xwr-3100.dtb \
bcm47094-netgear-r8500.dtb \
bcm94708.dtb \
bcm94709.dtb \
bcm953012er.dtb \
bcm953012hr.dtb \
bcm953012k.dtb
dtb-$(CONFIG_ARCH_BCM_53573) += \
bcm47189-tenda-ac9.dtb
@ -173,6 +178,12 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
exynos5440-sd5v1.dtb \
exynos5440-ssdk5440.dtb \
exynos5800-peach-pi.dtb
dtb-$(CONFIG_ARCH_GEMINI) += \
gemini-nas4220b.dtb \
gemini-rut1xx.dtb \
gemini-sq201.dtb \
gemini-wbd111.dtb \
gemini-wbd222.dtb
dtb-$(CONFIG_ARCH_HI3xxx) += \
hi3620-hi4511.dtb
dtb-$(CONFIG_ARCH_HIGHBANK) += \
@ -352,6 +363,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-gw551x.dtb \
imx6dl-gw552x.dtb \
imx6dl-gw553x.dtb \
imx6dl-gw5903.dtb \
imx6dl-gw5904.dtb \
imx6dl-hummingboard.dtb \
imx6dl-icore.dtb \
imx6dl-icore-rqs.dtb \
@ -395,9 +408,13 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-gw551x.dtb \
imx6q-gw552x.dtb \
imx6q-gw553x.dtb \
imx6q-gw5903.dtb \
imx6q-gw5904.dtb \
imx6q-h100.dtb \
imx6q-hummingboard.dtb \
imx6q-icore.dtb \
imx6q-icore-ofcap10.dtb \
imx6q-icore-ofcap12.dtb \
imx6q-icore-rqs.dtb \
imx6q-marsboard.dtb \
imx6q-mccmon6.dtb \
@ -425,9 +442,12 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-utilite-pro.dtb \
imx6q-wandboard.dtb \
imx6q-wandboard-revb1.dtb \
imx6q-zii-rdu2.dtb \
imx6qp-nitrogen6_max.dtb \
imx6qp-nitrogen6_som2.dtb \
imx6qp-sabreauto.dtb \
imx6qp-sabresd.dtb
imx6qp-sabresd.dtb \
imx6qp-zii-rdu2.dtb
dtb-$(CONFIG_SOC_IMX6SL) += \
imx6sl-evk.dtb \
imx6sl-warp.dtb
@ -458,6 +478,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-nitrogen7.dtb \
imx7d-sbc-imx7.dtb \
imx7d-sdb.dtb \
imx7d-sdb-sht11.dtb \
imx7s-colibri-eval-v3.dtb \
imx7s-warp.dtb
dtb-$(CONFIG_SOC_LS1021A) += \
@ -488,6 +509,10 @@ dtb-$(CONFIG_ARCH_MXS) += \
imx28-cfa10056.dtb \
imx28-cfa10057.dtb \
imx28-cfa10058.dtb \
imx28-duckbill-2-485.dtb \
imx28-duckbill-2.dtb \
imx28-duckbill-2-enocean.dtb \
imx28-duckbill-2-spi.dtb \
imx28-duckbill.dtb \
imx28-eukrea-mbmx283lc.dtb \
imx28-eukrea-mbmx287lc.dtb \
@ -673,6 +698,25 @@ dtb-$(CONFIG_ARCH_REALVIEW) += \
arm-realview-eb-a9mp-bbrevd.dtb \
arm-realview-pba8.dtb \
arm-realview-pbx-a9.dtb
dtb-$(CONFIG_ARCH_RENESAS) += \
emev2-kzm9d.dtb \
r7s72100-genmai.dtb \
r7s72100-rskrza1.dtb \
r8a73a4-ape6evm.dtb \
r8a7740-armadillo800eva.dtb \
r8a7743-sk-rzg1m.dtb \
r8a7745-sk-rzg1e.dtb \
r8a7778-bockw.dtb \
r8a7779-marzen.dtb \
r8a7790-lager.dtb \
r8a7791-koelsch.dtb \
r8a7791-porter.dtb \
r8a7792-blanche.dtb \
r8a7792-wheat.dtb \
r8a7793-gose.dtb \
r8a7794-alt.dtb \
r8a7794-silk.dtb \
sh73a0-kzm9g.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk1108-evb.dtb \
rk3036-evb.dtb \
@ -692,9 +736,11 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-firefly.dtb \
rk3288-firefly-reload.dtb \
rk3288-miqi.dtb \
rk3288-phycore-rdk.dtb \
rk3288-popmetal.dtb \
rk3288-r89.dtb \
rk3288-rock2-square.dtb \
rk3288-tinker.dtb \
rk3288-veyron-brain.dtb \
rk3288-veyron-jaq.dtb \
rk3288-veyron-jerry.dtb \
@ -713,25 +759,6 @@ dtb-$(CONFIG_ARCH_S5PV210) += \
s5pv210-smdkc110.dtb \
s5pv210-smdkv210.dtb \
s5pv210-torbreck.dtb
dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
emev2-kzm9d.dtb \
r7s72100-genmai.dtb \
r7s72100-rskrza1.dtb \
r8a73a4-ape6evm.dtb \
r8a7740-armadillo800eva.dtb \
r8a7743-sk-rzg1m.dtb \
r8a7745-sk-rzg1e.dtb \
r8a7778-bockw.dtb \
r8a7779-marzen.dtb \
r8a7790-lager.dtb \
r8a7791-koelsch.dtb \
r8a7791-porter.dtb \
r8a7792-blanche.dtb \
r8a7792-wheat.dtb \
r8a7793-gose.dtb \
r8a7794-alt.dtb \
r8a7794-silk.dtb \
sh73a0-kzm9g.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_arria5_socdk.dtb \
socfpga_arria10_socdk_nand.dtb \
@ -764,7 +791,8 @@ dtb-$(CONFIG_ARCH_STM32)+= \
stm32f429-disco.dtb \
stm32f469-disco.dtb \
stm32429i-eval.dtb \
stm32746g-eval.dtb
stm32746g-eval.dtb \
stm32h743i-eval.dtb
dtb-$(CONFIG_MACH_SUN4I) += \
sun4i-a10-a1000.dtb \
sun4i-a10-ba10-tvbox.dtb \
@ -868,6 +896,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-h3-beelink-x2.dtb \
sun8i-h3-nanopi-m1.dtb \
sun8i-h3-nanopi-neo.dtb \
sun8i-h3-nanopi-neo-air.dtb \
sun8i-h3-orangepi-2.dtb \
sun8i-h3-orangepi-lite.dtb \
sun8i-h3-orangepi-one.dtb \
@ -970,6 +999,8 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \
armada-385-db-ap.dtb \
armada-385-linksys-caiman.dtb \
armada-385-linksys-cobra.dtb \
armada-385-linksys-shelby.dtb \
armada-385-synology-ds116.dtb \
armada-385-turris-omnia.dtb \
armada-388-clearfog.dtb \
armada-388-clearfog-base.dtb \

20
arch/arm/boot/dts/alpine.dtsi
View file

@ -41,28 +41,28 @@
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <0>;
clock-frequency = <0>; /* Filled by loader */
clock-frequency = <1700000000>;
};
cpu@1 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <1>;
clock-frequency = <0>; /* Filled by loader */
clock-frequency = <1700000000>;
};
cpu@2 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <2>;
clock-frequency = <0>; /* Filled by loader */
clock-frequency = <1700000000>;
};
cpu@3 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <3>;
clock-frequency = <0>; /* Filled by loader */
clock-frequency = <1700000000>;
};
};
@ -81,7 +81,7 @@
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
clock-frequency = <0>; /* Filled by loader */
clock-frequency = <50000000>;
};
/* Interrupt Controller */
@ -120,26 +120,26 @@
<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
};
uart0:uart@fd883000 {
uart0: uart@fd883000 {
compatible = "ns16550a";
reg = <0x0 0xfd883000 0x0 0x1000>;
clock-frequency = <0>; /* Filled by loader */
clock-frequency = <375000000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
};
uart1:uart@0xfd884000 {
uart1: uart@fd884000 {
compatible = "ns16550a";
reg = <0x0 0xfd884000 0x0 0x1000>;
clock-frequency = <0>; /* Filled by loader */
clock-frequency = <375000000>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
};
/* Internal PCIe Controller */
pcie-internal@0xfbc00000 {
pcie@fbc00000 {
compatible = "pci-host-ecam-generic";
device_type = "pci";
#size-cells = <2>;

1
arch/arm/boot/dts/am335x-baltos-ir2110.dts
View file

@ -14,6 +14,7 @@
/dts-v1/;
#include "am335x-baltos.dtsi"
#include "am335x-baltos-leds.dtsi"
/ {
model = "OnRISC Baltos iR 2110";

1
arch/arm/boot/dts/am335x-baltos-ir3220.dts
View file

@ -14,6 +14,7 @@
/dts-v1/;
#include "am335x-baltos.dtsi"
#include "am335x-baltos-leds.dtsi"
/ {
model = "OnRISC Baltos iR 3220";

1
arch/arm/boot/dts/am335x-baltos-ir5221.dts
View file

@ -14,6 +14,7 @@
/dts-v1/;
#include "am335x-baltos.dtsi"
#include "am335x-baltos-leds.dtsi"
/ {
model = "OnRISC Baltos iR 5221";

50
arch/arm/boot/dts/am335x-baltos-leds.dtsi Normal file
View file

@ -0,0 +1,50 @@
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/*
* VScom OnRISC
* http://www.vscom.de
*/
/*#include "am33xx.dtsi"*/
/ {
leds {
pinctrl-names = "default";
pinctrl-0 = <&user_leds>;
compatible = "gpio-leds";
power {
label = "onrisc:red:power";
linux,default-trigger = "default-on";
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
default-state = "on";
};
wlan {
label = "onrisc:blue:wlan";
gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
app {
label = "onrisc:green:app";
gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
};
&am33xx_pinmux {
user_leds: pinmux_user_leds {
pinctrl-single,pins = <
AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mii1_col.gpio3_0 PWR LED */
AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mii1_txd3.gpio0_16 WLAN LED */
AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mii1_txd2.gpio0_17 APP LED */
>;
};
};

11
arch/arm/boot/dts/am335x-boneblack.dts
View file

@ -15,3 +15,14 @@
model = "TI AM335x BeagleBone Black";
compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
};
&cpu0_opp_table {
/*
* All PG 2.0 silicon may not support 1GHz but some of the early
* BeagleBone Blacks have PG 2.0 silicon which is guaranteed
* to support 1GHz OPP so enable it for PG 2.0 on this board.
*/
oppnitro@1000000000 {
opp-supported-hw = <0x06 0x0100>;
};
};

154
arch/arm/boot/dts/am335x-icev2.dts
View file

@ -201,6 +201,69 @@
AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLUP | MUX_MODE1) /* (L16) gmii1_rxd2.uart3_txd */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1, RMII mode */
AM33XX_IOPAD(0x90c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_crs.rmii1_crs_dv */
AM33XX_IOPAD(0x944, (PIN_INPUT_PULLUP | MUX_MODE0)) /* rmii1_refclk.rmii1_refclk */
AM33XX_IOPAD(0x940, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxd0.rmii1_rxd0 */
AM33XX_IOPAD(0x93c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxd1.rmii1_rxd1 */
AM33XX_IOPAD(0x910, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxerr.rmii1_rxerr */
AM33XX_IOPAD(0x928, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txd0.rmii1_txd0 */
AM33XX_IOPAD(0x924, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txd1.rmii1_txd1 */
AM33XX_IOPAD(0x914, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txen.rmii1_txen */
/* Slave 2, RMII mode */
AM33XX_IOPAD(0x870, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_wait0.rmii2_crs_dv */
AM33XX_IOPAD(0x908, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_col.rmii2_refclk */
AM33XX_IOPAD(0x86c, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_a11.rmii2_rxd0 */
AM33XX_IOPAD(0x868, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_a10.rmii2_rxd1 */
AM33XX_IOPAD(0x874, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_wpn.rmii2_rxerr */
AM33XX_IOPAD(0x854, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a5.rmii2_txd0 */
AM33XX_IOPAD(0x850, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a4.rmii2_txd1 */
AM33XX_IOPAD(0x840, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a0.rmii2_txen */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
AM33XX_IOPAD(0x90c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
AM33XX_IOPAD(0x944, (PIN_INPUT_PULLDOWN | MUX_MODE7))
AM33XX_IOPAD(0x940, (PIN_INPUT_PULLDOWN | MUX_MODE7))
AM33XX_IOPAD(0x93c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
AM33XX_IOPAD(0x910, (PIN_INPUT_PULLDOWN | MUX_MODE7))
AM33XX_IOPAD(0x928, (PIN_INPUT_PULLDOWN | MUX_MODE7))
AM33XX_IOPAD(0x924, (PIN_INPUT_PULLDOWN | MUX_MODE7))
AM33XX_IOPAD(0x914, (PIN_INPUT_PULLDOWN | MUX_MODE7))
/* Slave 2 reset value */
AM33XX_IOPAD(0x870, (PIN_INPUT_PULLDOWN | MUX_MODE7))
AM33XX_IOPAD(0x908, (PIN_INPUT_PULLDOWN | MUX_MODE7))
AM33XX_IOPAD(0x86c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
AM33XX_IOPAD(0x868, (PIN_INPUT_PULLDOWN | MUX_MODE7))
AM33XX_IOPAD(0x874, (PIN_INPUT_PULLDOWN | MUX_MODE7))
AM33XX_IOPAD(0x854, (PIN_INPUT_PULLDOWN | MUX_MODE7))
AM33XX_IOPAD(0x850, (PIN_INPUT_PULLDOWN | MUX_MODE7))
AM33XX_IOPAD(0x840, (PIN_INPUT_PULLDOWN | MUX_MODE7))
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
AM33XX_IOPAD(0x948, (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)) /* mdio_data.mdio_data */
AM33XX_IOPAD(0x94c, (PIN_OUTPUT_PULLUP | MUX_MODE0)) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
AM33XX_IOPAD(0x948, (PIN_INPUT_PULLDOWN | MUX_MODE7))
AM33XX_IOPAD(0x94c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
>;
};
};
&i2c0 {
@ -245,6 +308,39 @@
spi-max-frequency = <1000000>;
spi-cpol;
};
spi_nor: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "winbond,w25q64", "jedec,spi-nor";
spi-max-frequency = <80000000>;
m25p,fast-read;
reg = <0>;
partition@0 {
label = "u-boot-spl";
reg = <0x0 0x80000>;
read-only;
};
partition@1 {
label = "u-boot";
reg = <0x80000 0x100000>;
read-only;
};
partition@2 {
label = "u-boot-env";
reg = <0x180000 0x20000>;
read-only;
};
partition@3 {
label = "misc";
reg = <0x1A0000 0x660000>;
};
};
};
&tscadc {
@ -350,3 +446,61 @@
pinctrl-0 = <&uart3_pins_default>;
status = "okay";
};
&gpio3 {
p4 {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PR1_MII_CTRL";
};
p10 {
gpio-hog;
gpios = <10 GPIO_ACTIVE_HIGH>;
/* ETH1 mux: Low for MII-PRU, high for RMII-CPSW */
output-high;
line-name = "MUX_MII_CTL1";
};
};
&cpsw_emac0 {
phy-handle = <&ethphy0>;
phy-mode = "rmii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy-handle = <&ethphy1>;
phy-mode = "rmii";
dual_emac_res_vlan = <2>;
};
&mac {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
status = "okay";
dual_emac;
};
&phy_sel {
rmii-clock-ext;
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
reset-delay-us = <2>; /* PHY datasheet states 1uS min */
ethphy0: ethernet-phy@1 {
reg = <1>;
};
ethphy1: ethernet-phy@3 {
reg = <3>;
};
};

87
arch/arm/boot/dts/am33xx.dtsi
View file

@ -46,19 +46,7 @@
device_type = "cpu";
reg = <0>;
/*
* To consider voltage drop between PMIC and SoC,
* tolerance value is reduced to 2% from 4% and
* voltage value is increased as a precaution.
*/
operating-points = <
/* kHz uV */
720000 1285000
600000 1225000
500000 1125000
275000 1125000
>;
voltage-tolerance = <2>; /* 2 percentage */
operating-points-v2 = <&cpu0_opp_table>;
clocks = <&dpll_mpu_ck>;
clock-names = "cpu";
@ -67,6 +55,79 @@
};
};
cpu0_opp_table: opp-table {
compatible = "operating-points-v2-ti-cpu";
syscon = <&scm_conf>;
/*
* The three following nodes are marked with opp-suspend
* because the can not be enabled simultaneously on a
* single SoC.
*/
opp50@300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <950000 931000 969000>;
opp-supported-hw = <0x06 0x0010>;
opp-suspend;
};
opp100@275000000 {
opp-hz = /bits/ 64 <275000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x01 0x00FF>;
opp-suspend;
};
opp100@300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x06 0x0020>;
opp-suspend;
};
opp100@500000000 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x01 0xFFFF>;
};
opp100@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1100000 1078000 1122000>;
opp-supported-hw = <0x06 0x0040>;
};
opp120@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1200000 1176000 1224000>;
opp-supported-hw = <0x01 0xFFFF>;
};
opp120@720000000 {
opp-hz = /bits/ 64 <720000000>;
opp-microvolt = <1200000 1176000 1224000>;
opp-supported-hw = <0x06 0x0080>;
};
oppturbo@720000000 {
opp-hz = /bits/ 64 <720000000>;
opp-microvolt = <1260000 1234800 1285200>;
opp-supported-hw = <0x01 0xFFFF>;
};
oppturbo@800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <1260000 1234800 1285200>;
opp-supported-hw = <0x06 0x0100>;
};
oppnitro@1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <1325000 1298500 1351500>;
opp-supported-hw = <0x04 0x0200>;
};
};
pmu {
compatible = "arm,cortex-a8-pmu";
interrupts = <3>;

12
arch/arm/boot/dts/am3517.dtsi
View file

@ -13,6 +13,7 @@
/ {
aliases {
serial3 = &uart4;
can = &hecc;
};
ocp@68000000 {
@ -72,6 +73,17 @@
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0xff1f>;
};
hecc: can@5c050000 {
compatible = "ti,am3517-hecc";
status = "disabled";
reg = <0x5c050000 0x80>,
<0x5c053000 0x180>,
<0x5c052000 0x200>;
reg-names = "hecc", "hecc-ram", "mbx";
interrupts = <24>;
clocks = <&hecc_ck>;
};
};
};

7
arch/arm/boot/dts/am4372.dtsi
View file

@ -50,15 +50,14 @@
clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
ti,syscon-efuse = <&scm_conf 0x610 0x3f 0>;
ti,syscon-rev = <&scm_conf 0x600>;
clock-latency = <300000>; /* From omap-cpufreq driver */
};
};
cpu0_opp_table: opp_table0 {
compatible = "operating-points-v2";
cpu0_opp_table: opp-table {
compatible = "operating-points-v2-ti-cpu";
syscon = <&scm_conf>;
opp50@300000000 {
opp-hz = /bits/ 64 <300000000>;

15
arch/arm/boot/dts/am437x-gp-evm.dts
View file

@ -501,6 +501,21 @@
AM4372_IOPAD(0x884, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.gpio1_31 */
>;
};
uart0_pins_default: uart0_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x968, PIN_INPUT | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */
AM4372_IOPAD(0x96C, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */
AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
AM4372_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
};
&uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_default>;
};
&i2c0 {

24
arch/arm/boot/dts/am57xx-idk-common.dtsi
View file

@ -101,6 +101,22 @@
};
};
&dra7_pmx_core {
dcan1_pins_default: dcan1_pins_default {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
DRA7XX_CORE_IOPAD(0x37d4, PIN_INPUT_PULLUP | MUX_MODE0) /* dcan1_rx */
>;
};
dcan1_pins_sleep: dcan1_pins_sleep {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
DRA7XX_CORE_IOPAD(0x37d4, MUX_MODE15 | PULL_UP) /* dcan1_rx.off */
>;
};
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
@ -391,6 +407,14 @@
max-frequency = <96000000>;
};
&dcan1 {
status = "okay";
pinctrl-names = "default", "sleep", "active";
pinctrl-0 = <&dcan1_pins_sleep>;
pinctrl-1 = <&dcan1_pins_sleep>;
pinctrl-2 = <&dcan1_pins_default>;
};
&qspi {
status = "okay";

114
arch/arm/boot/dts/armada-385-linksys-shelby.dts Normal file
View file

@ -0,0 +1,114 @@
/*
* Device Tree file for the Linksys WRT1900ACS (Shelby)
*
* Copyright (C) 2015 Imre Kaloz <kaloz@openwrt.org>
*
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without
* any warranty of any kind, whether express or implied.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "armada-385-linksys.dtsi"
/ {
model = "Linksys WRT1900ACS";
compatible = "linksys,shelby", "linksys,armada385", "marvell,armada385",
"marvell,armada380";
soc {
internal-regs{
i2c@11000 {
pca9635@68 {
#address-cells = <1>;
#size-cells = <0>;
wan_amber@0 {
label = "shelby:amber:wan";
reg = <0x0>;
};
wan_white@1 {
label = "shelby:white:wan";
reg = <0x1>;
};
wlan_2g@2 {
label = "shelby:white:wlan_2g";
reg = <0x2>;
};
wlan_5g@3 {
label = "shelby:white:wlan_5g";
reg = <0x3>;
};
usb2@5 {
label = "shelby:white:usb2";
reg = <0x5>;
};
usb3_1@6 {
label = "shelby:white:usb3_1";
reg = <0x6>;
};
usb3_2@7 {
label = "shelby:white:usb3_2";
reg = <0x7>;
};
wps_white@8 {
label = "shelby:white:wps";
reg = <0x8>;
};
wps_amber@9 {
label = "shelby:amber:wps";
reg = <0x9>;
};
};
};
};
};
gpio-leds {
power {
label = "shelby:white:power";
};
sata {
label = "shelby:white:sata";
};
};
};

18
arch/arm/boot/dts/armada-385-linksys.dtsi
View file

@ -59,7 +59,8 @@
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
internal-regs {
i2c@11000 {
@ -88,6 +89,9 @@
ethernet@70000 {
status = "okay";
phy-mode = "rgmii-id";
buffer-manager = <&bm>;
bm,pool-long = <2>;
bm,pool-short = <3>;
fixed-link {
speed = <1000>;
full-duplex;
@ -97,6 +101,9 @@
ethernet@34000 {
status = "okay";
phy-mode = "sgmii";
buffer-manager = <&bm>;
bm,pool-long = <0>;
bm,pool-short = <1>;
fixed-link {
speed = <1000>;
full-duplex;
@ -159,6 +166,10 @@
status = "okay";
};
bm@c8000 {
status = "okay";
};
/* USB part of the eSATA/USB 2.0 port */
usb@58000 {
status = "okay";
@ -241,6 +252,10 @@
};
};
bm-bppi {
status = "okay";
};
pcie-controller {
status = "okay";
@ -305,6 +320,7 @@
sata {
gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
default-state = "off";
linux,default-trigger = "disk-activity";
};
};

321
arch/arm/boot/dts/armada-385-synology-ds116.dts Normal file
View file

@ -0,0 +1,321 @@
/*
* Device Tree file for Synology DS116 NAS
*
* Copyright (C) 2017 Willy Tarreau <w@1wt.eu>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without
* any warranty of any kind, whether express or implied.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "armada-385.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Synology DS116";
compatible = "marvell,a385-gp", "marvell,armada385", "marvell,armada380";
chosen {
stdout-path = "serial0:115200n8";
};
memory {
device_type = "memory";
reg = <0x00000000 0x40000000>; /* 1 GB */
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
internal-regs {
i2c@11000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <100000>;
eeprom@57 {
compatible = "atmel,24c64";
reg = <0x57>;
};
};
serial@12000 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
serial@12100 {
/* A PIC16F1829 is connected to uart1 at 9600 bps,
* and takes single-character orders :
* "1" : power off // already handled by the poweroff node
* "2" : short beep
* "3" : long beep
* "4" : turn the power LED ON
* "5" : flash the power LED
* "6" : turn the power LED OFF
* "7" : turn the status LED OFF
* "8" : turn the status LED ON
* "9" : flash the status LED
* "A" : flash the motherboard LED (D8)
* "B" : turn the motherboard LED OFF
* "C" : hard reset
*/
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "okay";
};
poweroff@12100 {
compatible = "synology,power-off";
reg = <0x12100 0x100>;
clocks = <&coreclk 0>;
};
ethernet@70000 {
pinctrl-names = "default";
phy = <&phy0>;
phy-mode = "sgmii";
buffer-manager = <&bm>;
bm,pool-long = <0>;
status = "okay";
};
mdio@72004 {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
phy0: ethernet-phy@1 {
reg = <1>;
};
};
sata@a8000 {
pinctrl-names = "default";
pinctrl-0 = <&sata0_pins>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
sata0: sata-port@0 {
reg = <0>;
target-supply = <&reg_5v_sata0>;
};
};
bm@c8000 {
status = "okay";
};
usb3@f0000 {
usb-phy = <&usb3_0_phy>;
status = "okay";
};
usb3@f8000 {
usb-phy = <&usb3_1_phy>;
status = "okay";
};
};
bm-bppi {
status = "okay";
};
gpio-fan {
compatible = "gpio-fan";
gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>,
<&gpio1 17 GPIO_ACTIVE_HIGH>,
<&gpio1 16 GPIO_ACTIVE_HIGH>;
gpio-fan,speed-map = < 0 0
1500 1
2500 2
3000 3
3400 4
3700 5
3900 6
4000 7>;
cooling-cells = <2>;
};
gpio-leds {
compatible = "gpio-leds";
/* The green part is on gpio0.20 which is also used by
* sata0, and accesses to SATA disk 0 make it blink so it
* doesn't need to be declared here.
*/
orange {
gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
label = "ds116:orange:disk";
default-state = "off";
};
};
};
usb3_0_phy: usb3_0_phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&reg_usb3_0_vbus>;
};
usb3_1_phy: usb3_1_phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&reg_usb3_1_vbus>;
};
reg_usb3_0_vbus: usb3-vbus0 {
compatible = "regulator-fixed";
regulator-name = "usb3-vbus0";
pinctrl-names = "default";
pinctrl-0 = <&xhci0_vbus_pins>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
};
reg_usb3_1_vbus: usb3-vbus1 {
compatible = "regulator-fixed";
regulator-name = "usb3-vbus1";
pinctrl-names = "default";
pinctrl-0 = <&xhci1_vbus_pins>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
};
reg_sata0: pwr-sata0 {
compatible = "regulator-fixed";
regulator-name = "pwr_en_sata0";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
enable-active-high;
regulator-boot-on;
gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>;
};
reg_5v_sata0: v5-sata0 {
compatible = "regulator-fixed";
regulator-name = "v5.0-sata0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&reg_sata0>;
};
reg_12v_sata0: v12-sata0 {
compatible = "regulator-fixed";
regulator-name = "v12.0-sata0";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
vin-supply = <&reg_sata0>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "macronix,mx25l6405d", "jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <50000000>;
m25p,fast-read;
/* Note: there is a redboot partition table despite u-boot
* being used. The names presented here are the same as those
* found in the FIS directory. There is also a small device
* tree in the last 64kB of the RedBoot partition which is not
* enumerated. The MAC address and the serial number are listed
* in the "vendor" partition.
*/
partition@00000000 {
label = "RedBoot";
reg = <0x00000000 0x000f0000>;
read-only;
};
partition@000c0000 {
label = "zImage";
reg = <0x000f0000 0x002d0000>;
};
partition@00390000 {
label = "rd.gz";
reg = <0x003c0000 0x00410000>;
};
partition@007d0000 {
label = "vendor";
reg = <0x007d0000 0x00010000>;
read-only;
};
partition@007e0000 {
label = "RedBoot config";
reg = <0x007e0000 0x00010000>;
read-only;
};
partition@007f0000 {
label = "FIS directory";
reg = <0x007f0000 0x00010000>;
read-only;
};
};
};
&pinctrl {
/* use only one pin for UART1, as mpp20 is used by sata0 */
uart1_pins: uart-pins-1 {
marvell,pins = "mpp19";
marvell,function = "ua1";
};
xhci0_vbus_pins: xhci0_vbus_pins {
marvell,pins = "mpp58";
marvell,function = "gpio";
};
xhci1_vbus_pins: xhci1_vbus_pins {
marvell,pins = "mpp59";
marvell,function = "gpio";
};
};

20
arch/arm/boot/dts/armada-385.dtsi
View file

@ -70,13 +70,7 @@
};
soc {
internal-regs {
pinctrl@18000 {
compatible = "marvell,mv88f6820-pinctrl";
};
};
pcie-controller {
pciec: pcie-controller {
compatible = "marvell,armada-370-pcie";
status = "disabled";
device_type = "pci";
@ -106,7 +100,7 @@
* configured in x4 by the bootloader, then
* pcie@4,0 is not available.
*/
pcie@1,0 {
pcie1: pcie@1,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
reg = <0x0800 0 0 0 0>;
@ -124,7 +118,7 @@
};
/* x1 port */
pcie@2,0 {
pcie2: pcie@2,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x40000 0 0x2000>;
reg = <0x1000 0 0 0 0>;
@ -142,7 +136,7 @@
};
/* x1 port */
pcie@3,0 {
pcie3: pcie@3,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
reg = <0x1800 0 0 0 0>;
@ -163,7 +157,7 @@
* x1 port only available when pcie@1,0 is
* configured as a x1 port
*/
pcie@4,0 {
pcie4: pcie@4,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
reg = <0x2000 0 0 0 0>;
@ -182,3 +176,7 @@
};
};
};
&pinctrl {
compatible = "marvell,mv88f6820-pinctrl";
};

38
arch/arm/boot/dts/armada-388-clearfog.dts
View file

@ -186,25 +186,6 @@
};
};
&pinctrl {
clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
marvell,pins = "mpp46";
marvell,function = "ref";
};
clearfog_dsa0_pins: clearfog-dsa0-pins {
marvell,pins = "mpp23", "mpp41";
marvell,function = "gpio";
};
clearfog_spi1_cs_pins: spi1-cs-pins {
marvell,pins = "mpp55";
marvell,function = "spi1";
};
rear_button_pins: rear-button-pins {
marvell,pins = "mpp34";
marvell,function = "gpio";
};
};
&mdio {
status = "okay";
@ -268,6 +249,25 @@
};
};
&pinctrl {
clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
marvell,pins = "mpp46";
marvell,function = "ref";
};
clearfog_dsa0_pins: clearfog-dsa0-pins {
marvell,pins = "mpp23", "mpp41";
marvell,function = "gpio";
};
clearfog_spi1_cs_pins: spi1-cs-pins {
marvell,pins = "mpp55";
marvell,function = "spi1";
};
rear_button_pins: rear-button-pins {
marvell,pins = "mpp34";
marvell,function = "gpio";
};
};
&spi1 {
/*
* Add SPI CS pins for clearfog:

9
arch/arm/boot/dts/armada-388.dtsi
View file

@ -50,13 +50,8 @@
model = "Marvell Armada 388 family SoC";
compatible = "marvell,armada388", "marvell,armada385",
"marvell,armada380";
soc {
internal-regs {
pinctrl@18000 {
compatible = "marvell,mv88f6828-pinctrl";
};
sata@e0000 {
compatible = "marvell,armada-380-ahci";
reg = <0xe0000 0x2000>;
@ -68,3 +63,7 @@
};
};
};
&pinctrl {
compatible = "marvell,mv88f6828-pinctrl";
};

49
arch/arm/boot/dts/armada-38x.dtsi
View file

@ -82,7 +82,7 @@
reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
};
devbus-bootcs {
devbus_bootcs: devbus-bootcs {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
@ -92,7 +92,7 @@
status = "disabled";
};
devbus-cs0 {
devbus_cs0: devbus-cs0 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
@ -102,7 +102,7 @@
status = "disabled";
};
devbus-cs1 {
devbus_cs1: devbus-cs1 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
@ -112,7 +112,7 @@
status = "disabled";
};
devbus-cs2 {
devbus_cs2: devbus-cs2 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
@ -122,7 +122,7 @@
status = "disabled";
};
devbus-cs3 {
devbus_cs3: devbus-cs3 {
compatible = "marvell,mvebu-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
@ -339,7 +339,7 @@
<GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
};
system-controller@18200 {
systemc: system-controller@18200 {
compatible = "marvell,armada-380-system-controller",
"marvell,armada-370-xp-system-controller";
reg = <0x18200 0x100>;
@ -360,7 +360,8 @@
mbusc: mbus-controller@20000 {
compatible = "marvell,mbus-controller";
reg = <0x20000 0x100>, <0x20180 0x20>;
reg = <0x20000 0x100>, <0x20180 0x20>,
<0x20250 0x8>;
};
mpic: interrupt-controller@20a00 {
@ -373,7 +374,7 @@
interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
};
timer@20300 {
timer: timer@20300 {
compatible = "marvell,armada-380-timer",
"marvell,armada-xp-timer";
reg = <0x20300 0x30>, <0x21040 0x30>;
@ -387,14 +388,14 @@
clock-names = "nbclk", "fixed";
};
watchdog@20300 {
watchdog: watchdog@20300 {
compatible = "marvell,armada-380-wdt";
reg = <0x20300 0x34>, <0x20704 0x4>, <0x18260 0x4>;
clocks = <&coreclk 2>, <&refclk>;
clock-names = "nbclk", "fixed";
};
cpurst@20800 {
cpurst: cpurst@20800 {
compatible = "marvell,armada-370-cpu-reset";
reg = <0x20800 0x10>;
};
@ -404,12 +405,12 @@
reg = <0x20d20 0x6c>;
};
coherency-fabric@21010 {
coherencyfab: coherency-fabric@21010 {
compatible = "marvell,armada-380-coherency-fabric";
reg = <0x21010 0x1c>;
};
pmsu@22000 {
pmsu: pmsu@22000 {
compatible = "marvell,armada-380-pmsu";
reg = <0x22000 0x1000>;
};
@ -451,7 +452,7 @@
status = "disabled";
};
usb@58000 {
usb0: usb@58000 {
compatible = "marvell,orion-ehci";
reg = <0x58000 0x500>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
@ -459,7 +460,7 @@
status = "disabled";
};
xor@60800 {
xor0: xor@60800 {
compatible = "marvell,armada-380-xor", "marvell,orion-xor";
reg = <0x60800 0x100
0x60a00 0x100>;
@ -479,7 +480,7 @@
};
};
xor@60900 {
xor1: xor@60900 {
compatible = "marvell,armada-380-xor", "marvell,orion-xor";
reg = <0x60900 0x100
0x60b00 0x100>;
@ -507,7 +508,7 @@
clocks = <&gateclk 4>;
};
crypto@90000 {
cesa: crypto@90000 {
compatible = "marvell,armada-38x-crypto";
reg = <0x90000 0x10000>;
reg-names = "regs";
@ -522,14 +523,14 @@
marvell,crypto-sram-size = <0x800>;
};
rtc@a3800 {
rtc: rtc@a3800 {
compatible = "marvell,armada-380-rtc";
reg = <0xa3800 0x20>, <0x184a0 0x0c>;
reg-names = "rtc", "rtc-soc";
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
};
sata@a8000 {
ahci0: sata@a8000 {
compatible = "marvell,armada-380-ahci";
reg = <0xa8000 0x2000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
@ -545,7 +546,7 @@
status = "disabled";
};
sata@e0000 {
ahci1: sata@e0000 {
compatible = "marvell,armada-380-ahci";
reg = <0xe0000 0x2000>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
@ -561,13 +562,13 @@
clock-output-names = "nand";
};
thermal@e8078 {
thermal: thermal@e8078 {
compatible = "marvell,armada380-thermal";
reg = <0xe4078 0x4>, <0xe4074 0x4>;
status = "okay";
};
flash@d0000 {
nand: flash@d0000 {
compatible = "marvell,armada370-nand";
reg = <0xd0000 0x54>;
#address-cells = <1>;
@ -577,7 +578,7 @@
status = "disabled";
};
sdhci@d8000 {
sdhci: sdhci@d8000 {
compatible = "marvell,armada-380-sdhci";
reg-names = "sdhci", "mbus", "conf-sdio3";
reg = <0xd8000 0x1000>,
@ -589,7 +590,7 @@
status = "disabled";
};
usb3@f0000 {
usb3_0: usb3@f0000 {
compatible = "marvell,armada-380-xhci";
reg = <0xf0000 0x4000>,<0xf4000 0x4000>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
@ -597,7 +598,7 @@
status = "disabled";
};
usb3@f8000 {
usb3_1: usb3@f8000 {
compatible = "marvell,armada-380-xhci";
reg = <0xf8000 0x4000>,<0xfc000 0x4000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;

219
arch/arm/boot/dts/armada-xp-98dx3236.dtsi
View file

@ -45,11 +45,14 @@
* common to all Armada XP SoCs.
*/
#include "armada-xp.dtsi"
#include "armada-370-xp.dtsi"
/ {
#address-cells = <2>;
#size-cells = <2>;
model = "Marvell 98DX3236 SoC";
compatible = "marvell,armadaxp-98dx3236", "marvell,armadaxp", "marvell,armada-370-xp";
compatible = "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
aliases {
gpio0 = &gpio0;
@ -72,12 +75,19 @@
};
soc {
compatible = "marvell,armadaxp-mbus", "simple-bus";
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000
MBUS_ID(0x03, 0x00) 0 0 0xa8000000 0x4000000
MBUS_ID(0x08, 0x00) 0 0 0xac000000 0x100000>;
bootrom {
compatible = "marvell,bootrom";
reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
};
/*
* 98DX3236 has 1 x1 PCIe unit Gen2.0
*/
@ -95,8 +105,7 @@
ranges =
<0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */>;
0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
pcie1: pcie@1,0 {
device_type = "pci";
@ -117,48 +126,18 @@
};
internal-regs {
coreclk: mvebu-sar@18230 {
compatible = "marvell,mv98dx3236-core-clock";
sdramc@1400 {
compatible = "marvell,armada-xp-sdram-controller";
reg = <0x1400 0x500>;
};
cpuclk: clock-complex@18700 {
compatible = "marvell,mv98dx3236-cpu-clock";
};
corediv-clock@18740 {
status = "disabled";
};
xor@60900 {
status = "disabled";
};
crypto@90000 {
status = "disabled";
};
xor@f0900 {
status = "disabled";
};
xor@f0800 {
compatible = "marvell,orion-xor";
reg = <0xf0800 0x100
0xf0a00 0x100>;
clocks = <&gateclk 22>;
status = "okay";
xor10 {
interrupts = <51>;
dmacap,memcpy;
dmacap,xor;
};
xor11 {
interrupts = <52>;
dmacap,memcpy;
dmacap,xor;
dmacap,memset;
};
L2: l2-cache@8000 {
compatible = "marvell,aurora-system-cache";
reg = <0x08000 0x1000>;
cache-id-part = <0x100>;
cache-level = <2>;
cache-unified;
wt-override;
};
gpio0: gpio@18100 {
@ -190,16 +169,99 @@
interrupts = <87>;
};
systemc: system-controller@18200 {
compatible = "marvell,armada-370-xp-system-controller";
reg = <0x18200 0x500>;
};
gateclk: clock-gating-control@18220 {
compatible = "marvell,mv98dx3236-gating-clock";
reg = <0x18220 0x4>;
clocks = <&coreclk 0>;
#clock-cells = <1>;
};
cpuclk: clock-complex@18700 {
#clock-cells = <1>;
compatible = "marvell,mv98dx3236-cpu-clock";
reg = <0x18700 0x24>, <0x1c054 0x10>;
clocks = <&coreclk 1>;
};
corediv-clock@18740 {
status = "disabled";
};
cpu-config@21000 {
compatible = "marvell,armada-xp-cpu-config";
reg = <0x21000 0x8>;
};
ethernet@70000 {
compatible = "marvell,armada-xp-neta";
};
ethernet@74000 {
compatible = "marvell,armada-xp-neta";
};
xor1: xor@f0800 {
compatible = "marvell,orion-xor";
reg = <0xf0800 0x100
0xf0a00 0x100>;
clocks = <&gateclk 22>;
status = "okay";
xor10 {
interrupts = <51>;
dmacap,memcpy;
dmacap,xor;
};
xor11 {
interrupts = <52>;
dmacap,memcpy;
dmacap,xor;
dmacap,memset;
};
};
nand: nand@d0000 {
clocks = <&dfx_coredivclk 0>;
};
xor0: xor@f0900 {
compatible = "marvell,orion-xor";
reg = <0xF0900 0x100
0xF0B00 0x100>;
clocks = <&gateclk 28>;
status = "okay";
xor00 {
interrupts = <94>;
dmacap,memcpy;
dmacap,xor;
};
xor01 {
interrupts = <95>;
dmacap,memcpy;
dmacap,xor;
dmacap,memset;
};
};
};
dfxr: dfx-registers@ac000000 {
compatible = "simple-bus";
dfx: dfx-server@ac000000 {
compatible = "marvell,dfx-server", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 MBUS_ID(0x08, 0x00) 0 0x100000>;
reg = <MBUS_ID(0x08, 0x00) 0 0x100000>;
coreclk: mvebu-sar@f8204 {
compatible = "marvell,mv98dx3236-core-clock";
reg = <0xf8204 0x4>;
#clock-cells = <1>;
};
dfx_coredivclk: corediv-clock@f8268 {
compatible = "marvell,mv98dx3236-corediv-clock";
@ -208,11 +270,6 @@
clocks = <&mainpll>;
clock-output-names = "nand";
};
dfx: dfx@0 {
compatible = "marvell,dfx-server";
reg = <0 0x100000>;
};
};
switch: switch@a8000000 {
@ -229,6 +286,53 @@
};
};
};
clocks {
/* 25 MHz reference crystal */
refclk: oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
};
};
&i2c0 {
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
reg = <0x11000 0x100>;
};
&i2c1 {
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
reg = <0x11100 0x100>;
};
&mpic {
reg = <0x20a00 0x2d0>, <0x21070 0x58>;
};
&timer {
compatible = "marvell,armada-xp-timer";
clocks = <&coreclk 2>, <&refclk>;
clock-names = "nbclk", "fixed";
};
&watchdog {
compatible = "marvell,armada-xp-wdt";
clocks = <&coreclk 2>, <&refclk>;
clock-names = "nbclk", "fixed";
};
&cpurst {
reg = <0x20800 0x20>;
};
&usb0 {
clocks = <&gateclk 18>;
};
&usb1 {
clocks = <&gateclk 19>;
};
&pinctrl {
@ -241,14 +345,13 @@
};
};
&spi0 {
compatible = "marvell,armada-xp-spi", "marvell,orion-spi";
pinctrl-0 = <&spi0_pins>;
pinctrl-names = "default";
};
&sdio {
status = "disabled";
};
&crypto_sram0 {
status = "disabled";
};
&crypto_sram1 {
status = "disabled";
};

2
arch/arm/boot/dts/armada-xp-98dx3336.dtsi
View file

@ -49,7 +49,7 @@
/ {
model = "Marvell 98DX3336 SoC";
compatible = "marvell,armadaxp-98dx3336", "marvell,armadaxp-98dx3236", "marvell,armadaxp", "marvell,armada-370-xp";
compatible = "marvell,armadaxp-98dx3336", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
cpus {
cpu@1 {

2
arch/arm/boot/dts/armada-xp-98dx4251.dtsi
View file

@ -49,7 +49,7 @@
/ {
model = "Marvell 98DX4251 SoC";
compatible = "marvell,armadaxp-98dx4251", "marvell,armadaxp-98dx3236", "marvell,armadaxp", "marvell,armada-370-xp";
compatible = "marvell,armadaxp-98dx4251", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
cpus {
cpu@1 {

2
arch/arm/boot/dts/armada-xp-db-dxbc2.dts
View file

@ -58,7 +58,7 @@
/ {
model = "Marvell Bobcat2 Evaluation Board";
compatible = "marvell,db-dxbc2", "marvell,armadaxp-98dx4251", "marvell,armadaxp", "marvell,armada-370-xp";
compatible = "marvell,db-dxbc2", "marvell,armadaxp-98dx4251", "marvell,armada-370-xp";
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";

2
arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts
View file

@ -58,7 +58,7 @@
/ {
model = "DB-XC3-24G4XG";
compatible = "marvell,db-xc3-24g4xg", "marvell,armadaxp-98dx3336", "marvell,armadaxp", "marvell,armada-370-xp";
compatible = "marvell,db-xc3-24g4xg", "marvell,armadaxp-98dx3336", "marvell,armada-370-xp";
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";

18
arch/arm/boot/dts/armada-xp-linksys-mamba.dts
View file

@ -71,7 +71,8 @@
ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000
MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>;
internal-regs {
@ -95,6 +96,9 @@
pinctrl-names = "default";
status = "okay";
phy-mode = "rgmii-id";
buffer-manager = <&bm>;
bm,pool-long = <0>;
bm,pool-short = <1>;
fixed-link {
speed = <1000>;
full-duplex;
@ -106,6 +110,9 @@
pinctrl-names = "default";
status = "okay";
phy-mode = "rgmii-id";
buffer-manager = <&bm>;
bm,pool-long = <2>;
bm,pool-short = <3>;
fixed-link {
speed = <1000>;
full-duplex;
@ -156,6 +163,7 @@
esata@4 {
label = "mamba:white:esata";
reg = <0x4>;
linux,default-trigger = "disk-activity";
};
usb2@5 {
@ -185,6 +193,10 @@
};
};
bm@c8000 {
status = "okay";
};
nand@d0000 {
status = "okay";
num-cs = <1>;
@ -258,6 +270,10 @@
};
};
};
bm-bppi {
status = "okay";
};
};
gpio_keys {

22
arch/arm/boot/dts/aspeed-ast2500-evb.dts
View file

@ -20,6 +20,28 @@
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
};
};
&spi1 {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "pnor";
};
};
&spi2 {
status = "okay";
};
&uart5 {
status = "okay";
};

18
arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
View file

@ -31,6 +31,24 @@
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
};
};
&spi {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "pnor";
};
};
&uart5 {
status = "okay";
};

36
arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts
View file

@ -31,6 +31,42 @@
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
m25p,fast-read;
label = "pnor";
};
};
&uart1 {
/* Rear RS-232 connector */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default
&pinctrl_nrts1_default
&pinctrl_ndtr1_default
&pinctrl_ndsr1_default
&pinctrl_ncts1_default
&pinctrl_ndcd1_default
&pinctrl_nri1_default>;
};
&uart5 {
status = "okay";
};

109
arch/arm/boot/dts/aspeed-g4.dtsi
View file

@ -18,21 +18,41 @@
};
};
clocks {
clk_clkin: clk_clkin {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <48000000>;
};
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
fmc: flash-controller@1e620000 {
reg = < 0x1e620000 0x94
0x20000000 0x02000000 >;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2400-fmc";
status = "disabled";
interrupts = <19>;
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
status = "disabled";
};
};
spi: flash-controller@1e630000 {
reg = < 0x1e630000 0x18
0x30000000 0x02000000 >;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2400-spi";
status = "disabled";
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
status = "disabled";
};
};
vic: interrupt-controller@1e6c0080 {
compatible = "aspeed,ast2400-vic";
interrupt-controller;
@ -61,16 +81,48 @@
#size-cells = <1>;
ranges;
clk_hpll: clk_hpll@1e6e2070 {
#clock-cells = <0>;
compatible = "aspeed,g4-hpll-clock";
reg = <0x1e6e2070 0x4>;
clocks = <&clk_clkin>;
};
syscon: syscon@1e6e2000 {
compatible = "aspeed,g4-scu", "syscon", "simple-mfd";
reg = <0x1e6e2000 0x1a8>;
#address-cells = <1>;
#size-cells = <0>;
clk_clkin: clk_clkin {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <48000000>;
};
clk_hpll: clk_hpll@70 {
#clock-cells = <0>;
compatible = "aspeed,g4-hpll-clock", "fixed-clock";
reg = <0x70>;
clocks = <&clk_clkin>;
clock-frequency = <384000000>;
};
clk_ahb: clk_ahb@70 {
#clock-cells = <0>;
compatible = "aspeed,g4-ahb-clock", "fixed-clock";
reg = <0x70>;
clocks = <&clk_hpll>;
clock-frequency = <192000000>;
};
clk_apb: clk_apb@08 {
#clock-cells = <0>;
compatible = "aspeed,g4-apb-clock", "fixed-clock";
reg = <0x08>;
clocks = <&clk_hpll>;
clock-frequency = <48000000>;
};
clk_uart: clk_uart@2c{
#clock-cells = <0>;
compatible = "aspeed,g4-uart-clock", "fixed-clock";
reg = <0x2c>;
clock-frequency = <24000000>;
};
pinctrl: pinctrl {
compatible = "aspeed,g4-pinctrl";
@ -818,19 +870,6 @@
};
};
clk_apb: clk_apb@1e6e2008 {
#clock-cells = <0>;
compatible = "aspeed,g4-apb-clock";
reg = <0x1e6e2008 0x4>;
clocks = <&clk_hpll>;
};
clk_uart: clk_uart@1e6e2008 {
#clock-cells = <0>;
compatible = "aspeed,uart-clock";
reg = <0x1e6e202c 0x4>;
};
sram@1e720000 {
compatible = "mmio-sram";
reg = <0x1e720000 0x8000>; // 32K
@ -857,13 +896,13 @@
};
wdt1: wdt@1e785000 {
compatible = "aspeed,wdt";
compatible = "aspeed,ast2400-wdt";
reg = <0x1e785000 0x1c>;
interrupts = <27>;
};
wdt2: wdt@1e785020 {
compatible = "aspeed,wdt";
compatible = "aspeed,ast2400-wdt";
reg = <0x1e785020 0x1c>;
interrupts = <27>;
clocks = <&clk_apb>;
@ -930,6 +969,14 @@
no-loopback-test;
status = "disabled";
};
adc: adc@1e6e9000 {
compatible = "aspeed,ast2400-adc";
reg = <0x1e6e9000 0xb0>;
clocks = <&clk_apb>;
#io-channel-cells = <1>;
status = "disabled";
};
};
};
};

156
arch/arm/boot/dts/aspeed-g5.dtsi
View file

@ -24,6 +24,69 @@
#size-cells = <1>;
ranges;
fmc: flash-controller@1e620000 {
reg = < 0x1e620000 0xc4
0x20000000 0x10000000 >;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2500-fmc";
status = "disabled";
interrupts = <19>;
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
status = "disabled";
};
flash@2 {
reg = < 2 >;
compatible = "jedec,spi-nor";
status = "disabled";
};
};
spi1: flash-controller@1e630000 {
reg = < 0x1e630000 0xc4
0x30000000 0x08000000 >;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2500-spi";
status = "disabled";
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
status = "disabled";
};
};
spi2: flash-controller@1e631000 {
reg = < 0x1e631000 0xc4
0x38000000 0x08000000 >;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2500-spi";
status = "disabled";
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
status = "disabled";
};
};
vic: interrupt-controller@1e6c0080 {
compatible = "aspeed,ast2400-vic";
interrupt-controller;
@ -52,15 +115,49 @@
#size-cells = <1>;
ranges;
clk_clkin: clk_clkin@1e6e2070 {
#clock-cells = <0>;
compatible = "aspeed,g5-clkin-clock";
reg = <0x1e6e2070 0x04>;
};
syscon: syscon@1e6e2000 {
compatible = "aspeed,g5-scu", "syscon", "simple-mfd";
reg = <0x1e6e2000 0x1a8>;
#address-cells = <1>;
#size-cells = <0>;
clk_clkin: clk_clkin@70 {
#clock-cells = <0>;
compatible = "aspeed,g5-clkin-clock", "fixed-clock";
reg = <0x70>;
clock-frequency = <24000000>;
};
clk_hpll: clk_hpll@24 {
#clock-cells = <0>;
compatible = "aspeed,g5-hpll-clock", "fixed-clock";
reg = <0x24>;
clocks = <&clk_clkin>;
clock-frequency = <792000000>;
};
clk_ahb: clk_ahb@70 {
#clock-cells = <0>;
compatible = "aspeed,g5-ahb-clock", "fixed-clock";
reg = <0x70>;
clocks = <&clk_hpll>;
clock-frequency = <198000000>;
};
clk_apb: clk_apb@08 {
#clock-cells = <0>;
compatible = "aspeed,g5-apb-clock", "fixed-clock";
reg = <0x08>;
clocks = <&clk_hpll>;
clock-frequency = <24750000>;
};
clk_uart: clk_uart@2c {
#clock-cells = <0>;
compatible = "aspeed,uart-clock", "fixed-clock";
reg = <0x2c>;
clock-frequency = <24000000>;
};
pinctrl: pinctrl {
compatible = "aspeed,g5-pinctrl";
@ -285,7 +382,6 @@
function = "LAD0";
groups = "LAD0";
};
pinctrl_lad1_default: lad1_default {
function = "LAD1";
groups = "LAD1";
@ -872,33 +968,7 @@
};
};
};
clk_hpll: clk_hpll@1e6e2024 {
#clock-cells = <0>;
compatible = "aspeed,g5-hpll-clock";
reg = <0x1e6e2024 0x4>;
clocks = <&clk_clkin>;
};
clk_ahb: clk_ahb@1e6e2070 {
#clock-cells = <0>;
compatible = "aspeed,g5-ahb-clock";
reg = <0x1e6e2070 0x4>;
clocks = <&clk_hpll>;
};
clk_apb: clk_apb@1e6e2008 {
#clock-cells = <0>;
compatible = "aspeed,g5-apb-clock";
reg = <0x1e6e2008 0x4>;
clocks = <&clk_hpll>;
};
clk_uart: clk_uart@1e6e2008 {
#clock-cells = <0>;
compatible = "aspeed,uart-clock";
reg = <0x1e6e202c 0x4>;
};
gfx: display@1e6e6000 {
@ -934,21 +1004,21 @@
wdt1: wdt@1e785000 {
compatible = "aspeed,wdt";
reg = <0x1e785000 0x1c>;
compatible = "aspeed,ast2500-wdt";
reg = <0x1e785000 0x20>;
interrupts = <27>;
};
wdt2: wdt@1e785020 {
compatible = "aspeed,wdt";
reg = <0x1e785020 0x1c>;
compatible = "aspeed,ast2500-wdt";
reg = <0x1e785020 0x20>;
interrupts = <27>;
status = "disabled";
};
wdt3: wdt@1e785040 {
compatible = "aspeed,wdt";
reg = <0x1e785074 0x1c>;
compatible = "aspeed,ast2500-wdt";
reg = <0x1e785040 0x20>;
status = "disabled";
};
@ -1042,6 +1112,14 @@
no-loopback-test;
status = "disabled";
};
adc: adc@1e6e9000 {
compatible = "aspeed,ast2500-adc";
reg = <0x1e6e9000 0xb0>;
clocks = <&clk_apb>;
#io-channel-cells = <1>;
status = "disabled";
};
};
};
};

1
arch/arm/boot/dts/at91-sama5d2_xplained.dts
View file

@ -246,6 +246,7 @@
shdwc@f8048010 {
atmel,shdwc-debouncer = <976>;
atmel,wakeup-rtc-timer;
input@0 {
reg = <0>;

5
arch/arm/boot/dts/at91-sama5d3_xplained.dts
View file

@ -162,9 +162,10 @@
};
adc0: adc@f8018000 {
atmel,adc-vref = <3300>;
atmel,adc-channels-used = <0xfe>;
pinctrl-0 = <
&pinctrl_adc0_adtrg
&pinctrl_adc0_ad0
&pinctrl_adc0_ad1
&pinctrl_adc0_ad2
&pinctrl_adc0_ad3
@ -172,8 +173,6 @@
&pinctrl_adc0_ad5
&pinctrl_adc0_ad6
&pinctrl_adc0_ad7
&pinctrl_adc0_ad8
&pinctrl_adc0_ad9
>;
status = "okay";
};

29
arch/arm/boot/dts/at91-tse850-3.dts
View file

@ -86,16 +86,43 @@
#io-channel-cells = <1>;
};
envelope-detector {
env_det: envelope-detector {
compatible = "axentia,tse850-envelope-detector";
io-channels = <&dac 0>;
io-channel-names = "dac";
#io-channel-cells = <1>;
interrupt-parent = <&pioA>;
interrupts = <3 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "comp";
};
mux: mux-controller {
compatible = "gpio-mux";
#mux-control-cells = <0>;
mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>,
<&pioA 1 GPIO_ACTIVE_HIGH>,
<&pioA 2 GPIO_ACTIVE_HIGH>;
idle-state = <0>;
};
envelope-detector-mux {
compatible = "io-channel-mux";
io-channels = <&env_det 0>;
io-channel-names = "parent";
mux-controls = <&mux>;
channels = "", "",
"sync-1",
"in",
"out",
"sync-2",
"sys-reg",
"ana-reg";
};
leds {
compatible = "gpio-leds";

2
arch/arm/boot/dts/at91sam9261.dtsi
View file

@ -263,7 +263,7 @@
};
matrix: matrix@ffffee00 {
compatible = "atmel,at91sam9260-bus-matrix", "syscon";
compatible = "atmel,at91sam9261-matrix", "syscon";
reg = <0xffffee00 0x200>;
};

2
arch/arm/boot/dts/at91sam9x5ek.dtsi
View file

@ -116,7 +116,7 @@
};
spi0: spi@f0000000 {
status = "okay";
status = "disabled"; /* conflicts with mmc1 */
cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
m25p80@0 {
compatible = "atmel,at25df321a";

5
arch/arm/boot/dts/axp209.dtsi
View file

@ -53,6 +53,11 @@
interrupt-controller;
#interrupt-cells = <1>;
ac_power_supply: ac-power-supply {
compatible = "x-powers,axp202-ac-power-supply";
status = "disabled";
};
axp_gpio: gpio {
compatible = "x-powers,axp209-gpio";
gpio-controller;

5
arch/arm/boot/dts/axp22x.dtsi
View file

@ -52,6 +52,11 @@
interrupt-controller;
#interrupt-cells = <1>;
ac_power_supply: ac-power-supply {
compatible = "x-powers,axp221-ac-power-supply";
status = "disabled";
};
regulators {
/* Default work frequency for buck regulators */
x-powers,dcdc-freq = <3000>;

4
arch/arm/boot/dts/bcm-cygnus.dtsi
View file

@ -205,7 +205,7 @@
status = "disabled";
msi-parent = <&msi0>;
msi0: msi@18012000 {
msi0: msi-controller {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;
@ -240,7 +240,7 @@
status = "disabled";
msi-parent = <&msi1>;
msi1: msi@18013000 {
msi1: msi-controller {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;

36
arch/arm/boot/dts/bcm-nsp.dtsi
View file

@ -245,6 +245,15 @@
status = "disabled";
};
mailbox: mailbox@25000 {
compatible = "brcm,iproc-fa2-mbox";
reg = <0x25000 0x445>;
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <1>;
brcm,rx-status-len = <32>;
brcm,use-bcm-hdr;
};
nand: nand@26000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
reg = <0x026000 0x600>,
@ -288,6 +297,12 @@
#size-cells = <0>;
};
crypto@2f000 {
compatible = "brcm,spum-nsp-crypto";
reg = <0x2f000 0x900>;
mboxes = <&mailbox 0>;
};
gpiob: gpio@30000 {
compatible = "brcm,iproc-nsp-gpio", "brcm,iproc-gpio";
reg = <0x30000 0x50>;
@ -306,6 +321,20 @@
status = "disabled";
};
ehci0: usb@2a000 {
compatible = "generic-ehci";
reg = <0x2a000 0x100>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
ohci0: usb@2b000 {
compatible = "generic-ohci";
reg = <0x2b000 0x100>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
rng: rng@33000 {
compatible = "brcm,bcm-nsp-rng";
reg = <0x33000 0x14>;
@ -347,6 +376,7 @@
#size-cells = <0>;
interrupts = <GIC_SPI 89 IRQ_TYPE_NONE>;
clock-frequency = <100000>;
status = "disabled";
};
watchdog@39000 {
@ -450,7 +480,7 @@
status = "disabled";
msi-parent = <&msi0>;
msi0: msi@18012000 {
msi0: msi-controller {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;
@ -486,7 +516,7 @@
status = "disabled";
msi-parent = <&msi1>;
msi1: msi@18013000 {
msi1: msi-controller {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;
@ -522,7 +552,7 @@
status = "disabled";
msi-parent = <&msi2>;
msi2: msi@18014000 {
msi2: msi-controller {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;

14
arch/arm/boot/dts/bcm2835-rpi.dtsi
View file

@ -69,6 +69,12 @@
bus-width = <4>;
};
&sdhost {
pinctrl-names = "default";
pinctrl-0 = <&sdhost_gpio48>;
bus-width = <4>;
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
@ -92,3 +98,11 @@
power-domains = <&power RPI_POWER_DOMAIN_VEC>;
status = "okay";
};
&dsi0 {
power-domains = <&power RPI_POWER_DOMAIN_DSI0>;
};
&dsi1 {
power-domains = <&power RPI_POWER_DOMAIN_DSI1>;
};

60
arch/arm/boot/dts/bcm283x.dtsi
View file

@ -93,10 +93,13 @@
#clock-cells = <1>;
reg = <0x7e101000 0x2000>;
/* CPRMAN derives everything from the platform's
* oscillator.
/* CPRMAN derives almost everything from the
* platform's oscillator. However, the DSI
* pixel clocks come from the DSI analog PHY.
*/
clocks = <&clk_osc>;
clocks = <&clk_osc>,
<&dsi0 0>, <&dsi0 1>, <&dsi0 2>,
<&dsi1 0>, <&dsi1 1>, <&dsi1 2>;
};
rng@7e104000 {
@ -347,6 +350,16 @@
arm,primecell-periphid = <0x00241011>;
};
sdhost: mmc@7e202000 {
compatible = "brcm,bcm2835-sdhost";
reg = <0x7e202000 0x100>;
interrupts = <2 24>;
clocks = <&clocks BCM2835_CLOCK_VPU>;
dmas = <&dma 13>;
dma-names = "rx-tx";
status = "disabled";
};
i2s: i2s@7e203000 {
compatible = "brcm,bcm2835-i2s";
reg = <0x7e203000 0x20>,
@ -390,6 +403,25 @@
interrupts = <2 14>; /* pwa1 */
};
dsi0: dsi@7e209000 {
compatible = "brcm,bcm2835-dsi0";
reg = <0x7e209000 0x78>;
interrupts = <2 4>;
#address-cells = <1>;
#size-cells = <0>;
#clock-cells = <1>;
clocks = <&clocks BCM2835_PLLA_DSI0>,
<&clocks BCM2835_CLOCK_DSI0E>,
<&clocks BCM2835_CLOCK_DSI0P>;
clock-names = "phy", "escape", "pixel";
clock-output-names = "dsi0_byte",
"dsi0_ddr2",
"dsi0_ddr";
};
thermal: thermal@7e212000 {
compatible = "brcm,bcm2835-thermal";
reg = <0x7e212000 0x8>;
@ -456,6 +488,26 @@
interrupts = <2 1>;
};
dsi1: dsi@7e700000 {
compatible = "brcm,bcm2835-dsi1";
reg = <0x7e700000 0x8c>;
interrupts = <2 12>;
#address-cells = <1>;
#size-cells = <0>;
#clock-cells = <1>;
clocks = <&clocks BCM2835_PLLD_DSI1>,
<&clocks BCM2835_CLOCK_DSI1E>,
<&clocks BCM2835_CLOCK_DSI1P>;
clock-names = "phy", "escape", "pixel";
clock-output-names = "dsi1_byte",
"dsi1_ddr2",
"dsi1_ddr";
status = "disabled";
};
i2c1: i2c@7e804000 {
compatible = "brcm,bcm2835-i2c";
reg = <0x7e804000 0x1000>;
@ -499,6 +551,8 @@
clocks = <&clocks BCM2835_PLLH_PIX>,
<&clocks BCM2835_CLOCK_HSM>;
clock-names = "pixel", "hdmi";
dmas = <&dma 17>;
dma-names = "audio-rx";
status = "disabled";
};

17
arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
View file

@ -4,7 +4,17 @@
*
* Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com>
*
* Licensed under the GNU/GPL. See COPYING for details.
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
/dts-v1/;
@ -31,19 +41,16 @@
usb3 {
label = "bcm53xx:blue:usb3";
gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
wan {
label = "bcm53xx:blue:wan";
gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
lan {
label = "bcm53xx:blue:lan";
gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
power {
@ -61,14 +68,12 @@
2ghz {
label = "bcm53xx:blue:2ghz";
gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
usb2 {
label = "bcm53xx:blue:usb2";
gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
};

14
arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts
View file

@ -4,7 +4,17 @@
*
* Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com>
*
* Licensed under the GNU/GPL. See COPYING for details.
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
/dts-v1/;
@ -31,7 +41,6 @@
usb2 {
label = "bcm53xx:blue:usb2";
gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
power {
@ -49,7 +58,6 @@
usb3 {
label = "bcm53xx:blue:usb3";
gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
};

5
arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
View file

@ -52,13 +52,11 @@
usb {
label = "bcm53xx:blue:usb";
gpios = <&hc595 0 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
power0 {
label = "bcm53xx:red:power";
gpios = <&hc595 1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
power1 {
@ -76,7 +74,6 @@
router1 {
label = "bcm53xx:amber:router";
gpios = <&hc595 4 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
wan {
@ -88,13 +85,11 @@
wireless0 {
label = "bcm53xx:blue:wireless";
gpios = <&hc595 6 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
wireless1 {
label = "bcm53xx:amber:wireless";
gpios = <&hc595 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
};

41
arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts Normal file
View file

@ -0,0 +1,41 @@
/*
* Copyright (C) 2017 Rafał Miłecki <rafal@milecki.pl>
*
* Licensed under the ISC license.
*/
/dts-v1/;
#include "bcm4708.dtsi"
#include "bcm5301x-nand-cs0-bch8.dtsi"
/ {
compatible = "linksys,ea6300-v1", "brcm,bcm4708";
model = "Linksys EA6300 V1";
chosen {
bootargs = "console=ttyS0,115200";
};
memory {
reg = <0x00000000 0x08000000>;
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
};
restart {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
};
};
};

3
arch/arm/boot/dts/bcm4708-netgear-r6250.dts
View file

@ -43,19 +43,16 @@
power1 {
label = "bcm53xx:amber:power";
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
usb {
label = "bcm53xx:blue:usb";
gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
wireless {
label = "bcm53xx:blue:wireless";
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
};

15
arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts
View file

@ -4,7 +4,17 @@
*
* Copyright (C) 2014 Rafał Miłecki <zajec5@gmail.com>
*
* Licensed under the GNU/GPL. See COPYING for details.
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
/dts-v1/;
@ -37,7 +47,6 @@
power0 {
label = "bcm53xx:green:power";
gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
power1 {
@ -49,13 +58,11 @@
usb {
label = "bcm53xx:blue:usb";
gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
wireless {
label = "bcm53xx:blue:wireless";
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
};

10
arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
View file

@ -37,61 +37,51 @@
power-amber {
label = "bcm53xx:amber:power";
gpios = <&chipcommon 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
usb2 {
label = "bcm53xx:white:usb2";
gpios = <&chipcommon 3 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
usb3-white {
label = "bcm53xx:white:usb3";
gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
usb3-green {
label = "bcm53xx:green:usb3";
gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
wps {
label = "bcm53xx:white:wps";
gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
status-red {
label = "bcm53xx:red:status";
gpios = <&chipcommon 8 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
status-green {
label = "bcm53xx:green:status";
gpios = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
status-blue {
label = "bcm53xx:blue:status";
gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
wan-white {
label = "bcm53xx:white:wan";
gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
wan-red {
label = "bcm53xx:red:wan";
gpios = <&chipcommon 13 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
};

8
arch/arm/boot/dts/bcm4708.dtsi
View file

@ -12,6 +12,14 @@
/ {
compatible = "brcm,bcm4708";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;

14
arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts
View file

@ -4,7 +4,17 @@
*
* Copyright (C) 2014 Rafał Miłecki <zajec5@gmail.com>
*
* Licensed under the GNU/GPL. See COPYING for details.
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
/dts-v1/;
@ -37,7 +47,6 @@
usb2 {
label = "bcm53xx:blue:usb2";
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
wan {
@ -55,7 +64,6 @@
usb3 {
label = "bcm53xx:blue:usb3";
gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
};

16
arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
View file

@ -4,7 +4,17 @@
*
* Copyright (C) 2014 Rafał Miłecki <zajec5@gmail.com>
*
* Licensed under the GNU/GPL. See COPYING for details.
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
/dts-v1/;
@ -58,7 +68,6 @@
power1 {
label = "bcm53xx:red:power";
gpios = <&hc595 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
router0 {
@ -70,7 +79,6 @@
router1 {
label = "bcm53xx:amber:router";
gpios = <&hc595 4 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
wan {
@ -82,13 +90,11 @@
wireless0 {
label = "bcm53xx:green:wireless";
gpios = <&hc595 6 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
wireless1 {
label = "bcm53xx:amber:wireless";
gpios = <&hc595 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
};

12
arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts
View file

@ -4,7 +4,17 @@
*
* Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com>
*
* Licensed under the GNU/GPL. See COPYING for details.
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
/dts-v1/;

98
arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts Normal file
View file

@ -0,0 +1,98 @@
/*
* Copyright (C) 2017 Rafał Miłecki <rafal@milecki.pl>
*
* Licensed under the ISC license.
*/
/dts-v1/;
#include "bcm47081.dtsi"
/ {
compatible = "tplink,archer-c5-v2", "brcm,bcm47081", "brcm,bcm4708";
model = "TP-LINK Archer C5 V2";
chosen {
bootargs = "earlycon";
};
memory {
reg = <0x00000000 0x08000000>;
};
leds {
compatible = "gpio-leds";
2ghz {
label = "bcm53xx:green:2ghz";
gpios = <&chipcommon 0 GPIO_ACTIVE_HIGH>;
};
lan {
label = "bcm53xx:green:lan";
gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>;
};
usb2-port1 {
label = "bcm53xx:green:usb2-port1";
gpios = <&chipcommon 2 GPIO_ACTIVE_HIGH>;
};
power {
label = "bcm53xx:green:power";
gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
wan-green {
label = "bcm53xx:green:wan";
gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>;
};
wps {
label = "bcm53xx:green:wps";
gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>;
};
wan-amber {
label = "bcm53xx:amber:wan";
gpios = <&chipcommon 8 GPIO_ACTIVE_HIGH>;
};
5ghz {
label = "bcm53xx:green:5ghz";
gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>;
};
usb2-port2 {
label = "bcm53xx:green:usb2-port2";
gpios = <&chipcommon 13 GPIO_ACTIVE_HIGH>;
};
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
rfkill {
label = "WiFi";
linux,code = <KEY_RFKILL>;
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
};
restart {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
};
};
};
&spi_nor {
status = "okay";
};
&usb2 {
vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
};

20
arch/arm/boot/dts/bcm47081.dtsi
View file

@ -4,7 +4,17 @@
*
* Copyright © 2014 Rafał Miłecki <zajec5@gmail.com>
*
* Licensed under the GNU/GPL. See COPYING for details.
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
#include "bcm5301x.dtsi"
@ -12,6 +22,14 @@
/ {
compatible = "brcm,bcm47081";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;

14
arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
View file

@ -4,7 +4,17 @@
*
* Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com>
*
* Licensed under the GNU/GPL. See COPYING for details.
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
/dts-v1/;
@ -31,7 +41,6 @@
wps {
label = "bcm53xx:blue:wps";
gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
power {
@ -43,7 +52,6 @@
wan {
label = "bcm53xx:red:wan";
gpios = <&chipcommon 5 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
};

8
arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
View file

@ -31,13 +31,11 @@
usb {
label = "bcm53xx:green:usb";
gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
power-amber {
label = "bcm53xx:amber:power";
gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
power-white {
@ -49,37 +47,31 @@
router-amber {
label = "bcm53xx:amber:router";
gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
router-white {
label = "bcm53xx:white:router";
gpios = <&chipcommon 8 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
wan-amber {
label = "bcm53xx:amber:wan";
gpios = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
wan-white {
label = "bcm53xx:white:wan";
gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
wireless-amber {
label = "bcm53xx:amber:wireless";
gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
wireless-white {
label = "bcm53xx:white:wireless";
gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
};

42
arch/arm/boot/dts/bcm4709-linksys-ea9200.dts Normal file
View file

@ -0,0 +1,42 @@
/*
* Copyright (C) 2017 Rafał Miłecki <rafal@milecki.pl>
*
* Licensed under the ISC license.
*/
/dts-v1/;
#include "bcm4709.dtsi"
#include "bcm5301x-nand-cs0-bch8.dtsi"
/ {
compatible = "linksys,ea9200", "brcm,bcm4709", "brcm,bcm4708";
model = "Linksys EA9200";
chosen {
bootargs = "console=ttyS0,115200";
};
memory {
reg = <0x00000000 0x08000000
0x88000000 0x08000000>;
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
};
restart {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
};
};
};

19
arch/arm/boot/dts/bcm4709-netgear-r7000.dts
View file

@ -4,7 +4,17 @@
*
* Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com>
*
* Licensed under the GNU/GPL. See COPYING for details.
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
/dts-v1/;
@ -37,43 +47,36 @@
power-amber {
label = "bcm53xx:amber:power";
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
5ghz {
label = "bcm53xx:white:5ghz";
gpios = <&chipcommon 12 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
2ghz {
label = "bcm53xx:white:2ghz";
gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
wps {
label = "bcm53xx:white:wps";
gpios = <&chipcommon 14 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
wireless {
label = "bcm53xx:white:wireless";
gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
usb3 {
label = "bcm53xx:white:usb3";
gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
usb2 {
label = "bcm53xx:white:usb2";
gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
};

41
arch/arm/boot/dts/bcm4709-netgear-r8000.dts
View file

@ -4,7 +4,17 @@
*
* Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com>
*
* Licensed under the GNU/GPL. See COPYING for details.
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
/dts-v1/;
@ -28,58 +38,61 @@
leds {
compatible = "gpio-leds";
power0 {
power-white {
label = "bcm53xx:white:power";
gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
};
power1 {
power-amber {
label = "bcm53xx:amber:power";
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
wan-white {
label = "bcm53xx:white:wan";
gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
};
wan-amber {
label = "bcm53xx:amber:wan";
gpios = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
};
5ghz-1 {
label = "bcm53xx:white:5ghz-1";
gpios = <&chipcommon 12 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
2ghz {
label = "bcm53xx:white:2ghz";
gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
wireless {
label = "bcm53xx:white:wireless";
gpios = <&chipcommon 14 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
wps {
label = "bcm53xx:white:wps";
gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
5ghz-2 {
label = "bcm53xx:white:5ghz-2";
gpios = <&chipcommon 16 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
usb3 {
label = "bcm53xx:white:usb3";
gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
usb2 {
label = "bcm53xx:white:usb2";
gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
};
@ -105,6 +118,12 @@
linux,code = <KEY_RESTART>;
gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>;
};
brightness {
label = "Backlight";
linux,code = <KEY_BRIGHTNESS_ZERO>;
gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>;
};
};
};

8
arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts
View file

@ -26,49 +26,41 @@
lan {
label = "bcm53xx:blue:lan";
gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
wps {
label = "bcm53xx:blue:wps";
gpios = <&chipcommon 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
2ghz {
label = "bcm53xx:blue:2ghz";
gpios = <&chipcommon 4 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
5ghz {
label = "bcm53xx:blue:5ghz";
gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
usb3 {
label = "bcm53xx:blue:usb3";
gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
usb2 {
label = "bcm53xx:blue:usb2";
gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
wan-blue {
label = "bcm53xx:blue:wan";
gpios = <&chipcommon 14 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
wan-amber {
label = "bcm53xx:amber:wan";
gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
power {

18
arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
View file

@ -4,7 +4,17 @@
*
* Copyright (C) 2016 Rafał Miłecki <zajec5@gmail.com>
*
* Licensed under the GNU/GPL. See COPYING for details.
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
/dts-v1/;
@ -46,37 +56,31 @@
wan-white {
label = "bcm53xx:white:wan";
gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
power-amber {
label = "bcm53xx:amber:power";
gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
wan-amber {
label = "bcm53xx:amber:wan";
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
usb3-white {
label = "bcm53xx:white:usb3";
gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
2ghz {
label = "bcm53xx:white:2ghz";
gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
5ghz {
label = "bcm53xx:white:5ghz";
gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
};

36
arch/arm/boot/dts/bcm47094-linksys-panamera.dts Normal file
View file

@ -0,0 +1,36 @@
/*
* Copyright (C) 2017 Rafał Miłecki <rafal@milecki.pl>
*
* Licensed under the ISC license.
*/
/dts-v1/;
#include "bcm47094.dtsi"
#include "bcm5301x-nand-cs0-bch8.dtsi"
/ {
compatible = "linksys,panamera", "brcm,bcm47094", "brcm,bcm4708";
model = "Linksys EA9500";
chosen {
bootargs = "console=ttyS0,115200";
};
memory {
reg = <0x00000000 0x08000000
0x88000000 0x08000000>;
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
};
};
};

8
arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
View file

@ -34,37 +34,31 @@
lan3 {
label = "bcm53xx:green:lan3";
gpios = <&chipcommon 1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
lan4 {
label = "bcm53xx:green:lan4";
gpios = <&chipcommon 2 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
wan {
label = "bcm53xx:green:wan";
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
lan1 {
label = "bcm53xx:green:lan1";
gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
lan2 {
label = "bcm53xx:green:lan2";
gpios = <&chipcommon 6 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
usb3 {
label = "bcm53xx:green:usb3";
gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
status {
@ -76,13 +70,11 @@
2ghz {
label = "bcm53xx:green:2ghz";
gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
5ghz {
label = "bcm53xx:green:5ghz";
gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
};

6
arch/arm/boot/dts/bcm47094-netgear-r8500.dts
View file

@ -34,37 +34,31 @@
power1 {
label = "bcm53xx:amber:power";
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
5ghz-1 {
label = "bcm53xx:white:5ghz-1";
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
5ghz-2 {
label = "bcm53xx:white:5ghz-2";
gpios = <&chipcommon 12 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
2ghz {
label = "bcm53xx:white:2ghz";
gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
usb2 {
label = "bcm53xx:white:usb2";
gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
usb3 {
label = "bcm53xx:white:usb3";
gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
};

39
arch/arm/boot/dts/bcm47189-tenda-ac9.dts
View file

@ -26,19 +26,16 @@
usb {
label = "bcm53xx:blue:usb";
gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
wps {
label = "bcm53xx:blue:wps";
gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
5ghz {
label = "bcm53xx:blue:5ghz";
gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
system {
@ -48,6 +45,15 @@
};
};
pcie0_leds {
compatible = "gpio-leds";
2ghz {
label = "bcm53xx:blue:2ghz";
gpios = <&pcie0_chipcommon 3 GPIO_ACTIVE_HIGH>;
};
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
@ -72,3 +78,30 @@
};
};
};
&pcie0 {
ranges = <0x00000000 0 0 0 0 0x00100000>;
#address-cells = <3>;
#size-cells = <2>;
bridge@0,0,0 {
reg = <0x0000 0 0 0 0>;
ranges = <0x00000000 0 0 0 0 0 0 0x00100000>;
#address-cells = <3>;
#size-cells = <2>;
wifi@0,1,0 {
reg = <0x0000 0 0 0 0>;
ranges = <0x00000000 0 0 0 0x00100000>;
#address-cells = <1>;
#size-cells = <1>;
pcie0_chipcommon: chipcommon@0 {
reg = <0 0x1000>;
gpio-controller;
#gpio-cells = <2>;
};
};
};
};

79
arch/arm/boot/dts/bcm5301x.dtsi
View file

@ -18,10 +18,6 @@
/ {
interrupt-parent = <&gic>;
chosen {
stdout-path = &uart0;
};
chipcommonA {
compatible = "simple-bus";
ranges = <0x00000000 0x18000000 0x00001000>;
@ -70,10 +66,19 @@
clocks = <&periph_clk>;
};
local-timer@20600 {
timer@20600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x20600 0x100>;
interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
reg = <0x20600 0x20>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_EDGE_RISING)>;
clocks = <&periph_clk>;
};
watchdog@20620 {
compatible = "arm,cortex-a9-twd-wdt";
reg = <0x20620 0x20>;
interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_EDGE_RISING)>;
clocks = <&periph_clk>;
};
@ -298,20 +303,6 @@
};
};
spi@29000 {
reg = <0x00029000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
spi_nor: spi-nor@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <20000000>;
linux,part-probe = "ofpart", "bcm47xxpart";
status = "disabled";
};
};
gmac0: ethernet@24000 {
reg = <0x24000 0x800>;
};
@ -329,6 +320,16 @@
};
};
i2c0: i2c@18009000 {
compatible = "brcm,iproc-i2c";
reg = <0x18009000 0x50>;
interrupts = <GIC_SPI 121 IRQ_TYPE_NONE>;
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <100000>;
status = "disabled";
};
lcpll0: lcpll0@1800c100 {
#clock-cells = <1>;
compatible = "brcm,nsp-lcpll0";
@ -375,4 +376,40 @@
brcm,nand-has-wp;
};
spi@18029200 {
compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
reg = <0x18029200 0x184>,
<0x18029000 0x124>,
<0x1811b408 0x004>,
<0x180293a0 0x01c>;
reg-names = "mspi", "bspi", "intr_regs", "intr_status_reg";
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "spi_lr_fullness_reached",
"spi_lr_session_aborted",
"spi_lr_impatient",
"spi_lr_session_done",
"spi_lr_overhead",
"mspi_done",
"mspi_halted";
clocks = <&iprocmed>;
clock-names = "iprocmed";
num-cs = <2>;
#address-cells = <1>;
#size-cells = <0>;
spi_nor: spi-nor@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <20000000>;
linux,part-probe = "ofpart", "bcm47xxpart";
status = "disabled";
};
};
};

10
arch/arm/boot/dts/bcm53573.dtsi
View file

@ -13,8 +13,12 @@
/ {
interrupt-parent = <&gic>;
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = &uart0;
stdout-path = "serial0:115200n8";
};
cpus {
@ -113,6 +117,10 @@
};
};
pcie0: pcie@2000 {
reg = <0x00002000 0x1000>;
};
usb2: usb2@4000 {
reg = <0x4000 0x1000>;
ranges;

8
arch/arm/boot/dts/bcm94708.dts
View file

@ -38,14 +38,6 @@
model = "NorthStar SVK (BCM94708)";
compatible = "brcm,bcm94708", "brcm,bcm4708";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0x00000000 0x08000000>;
};

8
arch/arm/boot/dts/bcm94709.dts
View file

@ -38,14 +38,6 @@
model = "NorthStar SVK (BCM94709)";
compatible = "brcm,bcm94709", "brcm,bcm4709", "brcm,bcm4708";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0x00000000 0x08000000>;
};

8
arch/arm/boot/dts/bcm953012er.dts
View file

@ -39,14 +39,6 @@
model = "NorthStar Enterprise Router (BCM953012ER)";
compatible = "brcm,bcm953012er", "brcm,brcm53012", "brcm,bcm4708";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0x00000000 0x8000000>;
};

97
arch/arm/boot/dts/bcm953012hr.dts Normal file
View file

@ -0,0 +1,97 @@
/*
* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright(c) 2017 Broadcom
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Broadcom nor the names of its contributors
* may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/dts-v1/;
#include "bcm4708.dtsi"
#include "bcm5301x-nand-cs0-bch4.dtsi"
/ {
model = "NorthStar HR (BCM953012HR)";
compatible = "brcm,bcm953012hr", "brcm,brcm53012", "brcm,bcm4708";
aliases {
ethernet0 = &gmac0;
ethernet1 = &gmac1;
ethernet2 = &gmac2;
};
memory@80000000 {
reg = <0x80000000 0x10000000>;
};
};
&nandcs {
partition@0 {
label = "nboot";
reg = <0x00000000 0x00200000>;
read-only;
};
partition@200000 {
label = "nenv";
reg = <0x00200000 0x00400000>;
};
partition@600000 {
label = "nsystem";
reg = <0x00600000 0x00a00000>;
};
partition@1000000 {
label = "nrootfs";
reg = <0x01000000 0x07000000>;
};
};
&spi_nor {
status = "okay";
spi-max-frequency = <62500000>;
m25p,default-addr-width = <3>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "boot";
reg = <0x00000000 0x000d0000>;
};
partition@d000 {
label = "env";
reg = <0x000d0000 0x00030000>;
};
partition@100000 {
label = "system";
reg = <0x00100000 0x00600000>;
};
partition@700000 {
label = "rootfs";
reg = <0x00700000 0x00900000>;
};
};

62
arch/arm/boot/dts/bcm953012k.dts
View file

@ -43,15 +43,69 @@
serial1 = &uart1;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0x80000000 0x10000000>;
};
};
&nand {
nandcs@0 {
compatible = "brcm,nandcs";
reg = <0>;
nand-on-flash-bbt;
#address-cells = <1>;
#size-cells = <1>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partition@0 {
label = "nboot";
reg = <0x00000000 0x00200000>;
read-only;
};
partition@200000 {
label = "nenv";
reg = <0x00200000 0x00400000>;
};
partition@600000 {
label = "nsystem";
reg = <0x00600000 0x00a00000>;
};
partition@1000000 {
label = "nrootfs";
reg = <0x01000000 0x07000000>;
};
};
};
&spi_nor {
status = "okay";
spi-max-frequency = <62500000>;
m25p,default-addr-width = <3>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "boot";
reg = <0x00000000 0x000d0000>;
};
partition@d000 {
label = "env";
reg = <0x000d0000 0x00030000>;
};
partition@100000 {
label = "system";
reg = <0x00100000 0x00600000>;
};
partition@700000 {
label = "rootfs";
reg = <0x00700000 0x00900000>;
};
};
&uart0 {
status = "okay";
};

10
arch/arm/boot/dts/bcm958522er.dts
View file

@ -60,7 +60,7 @@
};
};
/* USB 2/3 support needed to be complete */
/* USB 3 support needed to be complete */
&amac0 {
status = "okay";
@ -70,6 +70,10 @@
status = "okay";
};
&ehci0 {
status = "okay";
};
&nand {
nandcs@0 {
compatible = "brcm,nandcs";
@ -108,6 +112,10 @@
};
};
&ohci0 {
status = "okay";
};
&pcie0 {
status = "okay";
};

10
arch/arm/boot/dts/bcm958525er.dts
View file

@ -60,7 +60,7 @@
};
};
/* USB 2/3 support needed to be complete */
/* USB 3 support needed to be complete */
&amac0 {
status = "okay";
@ -70,6 +70,10 @@
status = "okay";
};
&ehci0 {
status = "okay";
};
&nand {
nandcs@0 {
compatible = "brcm,nandcs";
@ -108,6 +112,10 @@
};
};
&ohci0 {
status = "okay";
};
&pcie0 {
status = "okay";
};

10
arch/arm/boot/dts/bcm958525xmc.dts
View file

@ -66,7 +66,13 @@
status = "okay";
};
&ehci0 {
status = "okay";
};
&i2c0 {
status = "okay";
temperature-sensor@4c {
compatible = "adi,adt7461a";
reg = <0x4c>;
@ -122,6 +128,10 @@
};
};
&ohci0 {
status = "okay";
};
&pcie0 {
status = "okay";
};

10
arch/arm/boot/dts/bcm958622hr.dts
View file

@ -60,7 +60,7 @@
};
};
/* USB 2/3 and SLIC support needed to be complete */
/* USB 3 and SLIC support needed to be complete */
&amac0 {
status = "okay";
@ -74,6 +74,10 @@
status = "okay";
};
&ehci0 {
status = "okay";
};
&nand {
nandcs@0 {
compatible = "brcm,nandcs";
@ -112,6 +116,10 @@
};
};
&ohci0 {
status = "okay";
};
&pcie0 {
status = "okay";
};

10
arch/arm/boot/dts/bcm958623hr.dts
View file

@ -60,7 +60,7 @@
};
};
/* USB 2/3 and SLIC support needed to be complete */
/* USB 3 and SLIC support needed to be complete */
&amac0 {
status = "okay";
@ -74,6 +74,10 @@
status = "okay";
};
&ehci0 {
status = "okay";
};
&nand {
nandcs@0 {
compatible = "brcm,nandcs";
@ -112,6 +116,10 @@
};
};
&ohci0 {
status = "okay";
};
&pcie0 {
status = "okay";
};

8
arch/arm/boot/dts/bcm958625hr.dts
View file

@ -72,6 +72,10 @@
status = "okay";
};
&ehci0 {
status = "okay";
};
&nand {
nandcs@0 {
compatible = "brcm,nandcs";
@ -110,6 +114,10 @@
};
};
&ohci0 {
status = "okay";
};
&pcie0 {
status = "okay";
};

8
arch/arm/boot/dts/bcm958625k.dts
View file

@ -65,6 +65,10 @@
status = "okay";
};
&ehci0 {
status = "okay";
};
&nand {
nandcs@0 {
compatible = "brcm,nandcs";
@ -103,6 +107,10 @@
};
};
&ohci0 {
status = "okay";
};
&pcie0 {
status = "okay";
};

10
arch/arm/boot/dts/bcm988312hr.dts
View file

@ -60,7 +60,7 @@
};
};
/* USB 2/3 support needed to be complete */
/* USB 3 support needed to be complete */
&amac0 {
status = "okay";
@ -74,6 +74,10 @@
status = "okay";
};
&ehci0 {
status = "okay";
};
&nand {
nandcs@0 {
compatible = "brcm,nandcs";
@ -112,6 +116,10 @@
};
};
&ohci0 {
status = "okay";
};
&pcie0 {
status = "okay";
};

31
arch/arm/boot/dts/da850-evm.dts
View file

@ -9,6 +9,7 @@
*/
/dts-v1/;
#include "da850.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
compatible = "ti,da850-evm", "ti,da850";
@ -78,7 +79,10 @@
DRVDD-supply = <&vbat>;
DVDD-supply = <&vbat>;
};
tca6416: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
};
};
wdt: wdt@21000 {
status = "okay";
@ -293,20 +297,27 @@
&vpif {
pinctrl-names = "default";
pinctrl-0 = <&vpif_capture_pins>;
pinctrl-0 = <&vpif_capture_pins>, <&vpif_display_pins>;
status = "okay";
/* VPIF capture port */
port {
vpif_ch0: endpoint@0 {
reg = <0>;
bus-width = <8>;
port@0 {
vpif_input_ch0: endpoint@0 {
reg = <0>;
bus-width = <8>;
};
vpif_ch1: endpoint@1 {
reg = <1>;
bus-width = <8>;
data-shift = <8>;
vpif_input_ch1: endpoint@1 {
reg = <1>;
bus-width = <8>;
data-shift = <8>;
};
};
/* VPIF display port */
port@1 {
vpif_output_ch0: endpoint {
bus-width = <8>;
};
};
};

59
arch/arm/boot/dts/da850-lego-ev3.dts
View file

@ -123,6 +123,14 @@
pinctrl-0 = <&system_power_pin>;
};
sound {
compatible = "pwm-beeper";
pinctrl-names = "default";
pinctrl-0 = <&ehrpwm0b_pins>;
pwms = <&ehrpwm0 1 1000000 0>;
amp-supply = <&amp>;
};
/*
* This is a 5V current limiting regulator that is shared by USB,
* the sensor (input) ports, the motor (output) ports and the A/DC.
@ -139,18 +147,36 @@
enable-active-high;
regulator-boot-on;
};
/*
* This is a simple voltage divider on VCC5V to provide a 2.5V
* reference signal to the ADC.
*/
adc_ref: regulator2 {
compatible = "regulator-fixed";
regulator-name = "adc ref";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-boot-on;
vin-supply = <&vcc5v>;
};
/*
* This is the amplifier for the speaker.
*/
amp: regulator3 {
pinctrl-names = "default";
pinctrl-0 = <&amp_pins>;
compatible = "regulator-fixed";
regulator-name = "amp";
gpio = <&gpio 111 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&pmx_core {
status = "okay";
spi0_cs3_pin: pinmux_spi0_cs3_pin {
pinctrl-single,bits = <
/* CS3 */
0xc 0x01000000 0x0f000000
>;
};
mmc0_cd_pin: pinmux_mmc0_cd {
pinctrl-single,bits = <
/* GP5[14] */
@ -195,6 +221,13 @@
0x4c 0x00008000 0x0000f000
>;
};
amp_pins: pinmux_amp_pins {
pinctrl-single,bits = <
/* GP6[15] */
0x34 0x00000008 0x0000000f
>;
};
};
&pinconf {
@ -293,6 +326,18 @@
};
};
};
adc: adc@3 {
compatible = "ti,ads7957";
reg = <3>;
#io-channel-cells = <1>;
spi-max-frequency = <10000000>;
vref-supply = <&adc_ref>;
};
};
&ehrpwm0 {
status = "okay";
};
&gpio {

31
arch/arm/boot/dts/da850.dtsi
View file

@ -153,6 +153,12 @@
0x10 0x00000010 0x000000f0
>;
};
spi0_cs3_pin: pinmux_spi0_cs3_pin {
pinctrl-single,bits = <
/* CS3 */
0xc 0x01000000 0x0f000000
>;
};
spi1_pins: pinmux_spi1_pins {
pinctrl-single,bits = <
/* SIMO, SOMI, CLK */
@ -216,8 +222,21 @@
0x3c 0x11111111 0xffffffff
/* VP_DIN[8..9] */
0x40 0x00000011 0x000000ff
/* VP_CLKIN3, VP_CLKIN2 */
0x4c 0x00010100 0x000f0f00
>;
};
vpif_display_pins: vpif_display_pins {
pinctrl-single,bits = <
/* VP_DOUT[2..7] */
0x40 0x11111100 0xffffff00
/* VP_DOUT[10..15,0..1] */
0x44 0x11111111 0xffffffff
/* VP_DOUT[8..9] */
0x48 0x00000011 0x000000ff
/*
* VP_CLKOUT3, VP_CLKIN3,
* VP_CLKOUT2, VP_CLKIN2
*/
0x4c 0x00111100 0x00ffff00
>;
};
};
@ -345,7 +364,13 @@
status = "disabled";
/* VPIF capture port */
port {
port@0 {
#address-cells = <1>;
#size-cells = <0>;
};
/* VPIF display port */
port@1 {
#address-cells = <1>;
#size-cells = <0>;
};

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