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arm64: tegra: Combine AGX Orin board files
The current AGX Orin structure has both a top-level module+board file as well as a board file. Most of the data in the board-file is closely related to the module itself. The benefit of this extra file is outweighed by the additional complexity. Merge the board file into the module+board file for simplicity. Signed-off-by: Dara Stotland <dstotland@nvidia.com> Reviewed-by: Brad Griffis <bgriffis@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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2 changed files with 80 additions and 92 deletions
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@ -3,9 +3,9 @@
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#include <dt-bindings/input/linux-event-codes.h>
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#include <dt-bindings/input/gpio-keys.h>
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#include <dt-bindings/sound/rt5640.h>
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#include "tegra234-p3701-0000.dtsi"
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#include "tegra234-p3737-0000.dtsi"
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/ {
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model = "NVIDIA Jetson AGX Orin Developer Kit";
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@ -22,23 +22,90 @@
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};
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bus@0 {
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aconnect@2900000 {
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ahub@2900800 {
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i2s@2901000 {
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ports {
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port@1 {
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endpoint {
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dai-format = "i2s";
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remote-endpoint = <&rt5640_ep>;
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};
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};
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};
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};
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};
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};
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serial@3100000 {
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compatible = "nvidia,tegra194-hsuart";
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reset-names = "serial";
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status = "okay";
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};
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i2c@3160000 {
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status = "okay";
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eeprom@56 {
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compatible = "atmel,24c02";
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reg = <0x56>;
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label = "system";
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vcc-supply = <&vdd_1v8_sys>;
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address-width = <8>;
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pagesize = <8>;
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size = <256>;
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read-only;
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};
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};
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serial@31d0000 {
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current-speed = <115200>;
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status = "okay";
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};
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i2c@31e0000 {
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status = "okay";
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audio-codec@1c {
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compatible = "realtek,rt5640";
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reg = <0x1c>;
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interrupt-parent = <&gpio>;
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interrupts = <TEGRA234_MAIN_GPIO(AC, 5) GPIO_ACTIVE_HIGH>;
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clocks = <&bpmp TEGRA234_CLK_AUD_MCLK>;
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clock-names = "mclk";
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realtek,dmic1-data-pin = <RT5640_DMIC1_DATA_PIN_NONE>;
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realtek,dmic2-data-pin = <RT5640_DMIC2_DATA_PIN_NONE>;
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realtek,jack-detect-source = <RT5640_JD_SRC_HDA_HEADER>;
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sound-name-prefix = "CVB-RT";
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port {
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rt5640_ep: endpoint {
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remote-endpoint = <&i2s1_dap>;
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mclk-fs = <256>;
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};
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};
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};
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};
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pwm@3280000 {
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status = "okay";
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};
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pwm@32a0000 {
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assigned-clocks = <&bpmp TEGRA234_CLK_PWM3>;
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assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
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status = "okay";
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};
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pwm@32c0000 {
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status = "okay";
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};
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pwm@32f0000 {
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status = "okay";
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};
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hda@3510000 {
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nvidia,model = "NVIDIA Jetson AGX Orin HDA";
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status = "okay";
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@ -341,8 +408,11 @@
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};
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};
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pwm-fan {
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fan: pwm-fan {
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compatible = "pwm-fan";
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cooling-levels = <66 215 255>;
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pwms = <&pwm3 0 45334>;
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#cooling-cells = <2>;
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};
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serial {
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@ -444,4 +514,12 @@
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};
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};
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};
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vdd_1v8_sys: regulator-vdd-1v8-sys {
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compatible = "regulator-fixed";
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regulator-name = "VDD_1V8_SYS";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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};
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@ -1,90 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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#include <dt-bindings/sound/rt5640.h>
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/ {
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compatible = "nvidia,p3737-0000";
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bus@0 {
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aconnect@2900000 {
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ahub@2900800 {
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i2s@2901000 {
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ports {
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port@1 {
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endpoint {
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dai-format = "i2s";
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remote-endpoint = <&rt5640_ep>;
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};
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};
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};
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};
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};
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};
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i2c@3160000 {
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status = "okay";
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eeprom@56 {
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compatible = "atmel,24c02";
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reg = <0x56>;
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label = "system";
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vcc-supply = <&vdd_1v8_sys>;
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address-width = <8>;
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pagesize = <8>;
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size = <256>;
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read-only;
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};
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};
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i2c@31e0000 {
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status = "okay";
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audio-codec@1c {
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compatible = "realtek,rt5640";
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reg = <0x1c>;
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interrupt-parent = <&gpio>;
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interrupts = <TEGRA234_MAIN_GPIO(AC, 5) GPIO_ACTIVE_HIGH>;
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clocks = <&bpmp TEGRA234_CLK_AUD_MCLK>;
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clock-names = "mclk";
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realtek,dmic1-data-pin = <RT5640_DMIC1_DATA_PIN_NONE>;
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realtek,dmic2-data-pin = <RT5640_DMIC2_DATA_PIN_NONE>;
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realtek,jack-detect-source = <RT5640_JD_SRC_HDA_HEADER>;
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sound-name-prefix = "CVB-RT";
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port {
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rt5640_ep: endpoint {
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remote-endpoint = <&i2s1_dap>;
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mclk-fs = <256>;
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};
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};
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};
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};
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pwm@3280000 {
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status = "okay";
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};
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pwm@32c0000 {
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status = "okay";
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};
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pwm@32f0000 {
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status = "okay";
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};
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};
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fan: pwm-fan {
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compatible = "pwm-fan";
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pwms = <&pwm3 0 45334>;
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#cooling-cells = <2>;
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};
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vdd_1v8_sys: regulator-vdd-1v8-sys {
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compatible = "regulator-fixed";
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regulator-name = "VDD_1V8_SYS";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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};
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