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OMAPDSS: HDMI: Use our own omap_video_timings field when setting interface timings
The hdmi driver currently updates only the 'code' member of hdmi_config when the op omapdss_hdmi_display_set_timing() is called by the hdmi panel driver. The 'timing' field of hdmi_config is updated only when hdmi_power_on is called. It makes more sense to configure the whole hdmi_config field in the set_timing op called by the panel driver. This way, we don't need to call both functions to ensure that our hdmi_config is configured correctly. Also, we don't need to calculate hdmi_config during hdmi_power_on, or rely on the omap_video_timings in the panel's omap_dss_device struct. The default timings of the hdmi panel are represented in a cleaner form. Since the hdmi output is now configured by it's own copy of timings (in hdmi.ip_data.cfg), the panel driver needs to set it to a valid value before enabling hdmi output. We now call omapdss_hdmi_set_timing() before enabling hdmi output, this is done to atleast have the hdmi output configured to the panel's default timings if the DSS user didn't call panel driver's set_timings() op explicitly. Signed-off-by: Archit Taneja <archit@ti.com>
This commit is contained in:
parent
55cd63acf6
commit
7849398fa2
3 changed files with 39 additions and 28 deletions
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@ -484,7 +484,8 @@ static inline unsigned long hdmi_get_pixel_clock(void)
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#endif
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int omapdss_hdmi_display_enable(struct omap_dss_device *dssdev);
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void omapdss_hdmi_display_disable(struct omap_dss_device *dssdev);
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void omapdss_hdmi_display_set_timing(struct omap_dss_device *dssdev);
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void omapdss_hdmi_display_set_timing(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings);
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int omapdss_hdmi_display_check_timing(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings);
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int omapdss_hdmi_read_edid(u8 *buf, int len);
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@ -459,7 +459,6 @@ static void hdmi_compute_pll(struct omap_dss_device *dssdev, int phy,
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static int hdmi_power_on(struct omap_dss_device *dssdev)
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{
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int r;
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const struct hdmi_config *timing;
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struct omap_video_timings *p;
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unsigned long phy;
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@ -469,22 +468,10 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
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dss_mgr_disable(dssdev->manager);
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p = &dssdev->panel.timings;
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p = &hdmi.ip_data.cfg.timings;
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DSSDBG("hdmi_power_on x_res= %d y_res = %d\n",
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dssdev->panel.timings.x_res,
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dssdev->panel.timings.y_res);
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DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
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timing = hdmi_get_timings();
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if (timing == NULL) {
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/* HDMI code 4 corresponds to 640 * 480 VGA */
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hdmi.ip_data.cfg.cm.code = 4;
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/* DVI mode 1 corresponds to HDMI 0 to DVI */
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hdmi.ip_data.cfg.cm.mode = HDMI_DVI;
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hdmi.ip_data.cfg = vesa_timings[0];
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} else {
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hdmi.ip_data.cfg = *timing;
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}
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phy = p->pixel_clock;
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hdmi_compute_pll(dssdev, phy, &hdmi.ip_data.pll_data);
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@ -521,7 +508,7 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
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dispc_enable_gamma_table(0);
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/* tv size */
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dss_mgr_set_timings(dssdev->manager, &dssdev->panel.timings);
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dss_mgr_set_timings(dssdev->manager, p);
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r = hdmi.ip_data.ops->video_enable(&hdmi.ip_data);
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if (r)
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@ -568,13 +555,18 @@ int omapdss_hdmi_display_check_timing(struct omap_dss_device *dssdev,
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}
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void omapdss_hdmi_display_set_timing(struct omap_dss_device *dssdev)
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void omapdss_hdmi_display_set_timing(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings)
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{
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struct hdmi_cm cm;
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const struct hdmi_config *t;
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cm = hdmi_get_code(&dssdev->panel.timings);
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hdmi.ip_data.cfg.cm.code = cm.code;
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hdmi.ip_data.cfg.cm.mode = cm.mode;
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cm = hdmi_get_code(timings);
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hdmi.ip_data.cfg.cm = cm;
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t = hdmi_get_timings();
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if (t != NULL)
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hdmi.ip_data.cfg = *t;
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if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
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int r;
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@ -585,7 +577,7 @@ void omapdss_hdmi_display_set_timing(struct omap_dss_device *dssdev)
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if (r)
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DSSERR("failed to power on device\n");
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} else {
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dss_mgr_set_timings(dssdev->manager, &dssdev->panel.timings);
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dss_mgr_set_timings(dssdev->manager, &t->timings);
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}
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}
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@ -930,6 +922,7 @@ static int __init omapdss_hdmihw_probe(struct platform_device *pdev)
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hdmi.ip_data.core_av_offset = HDMI_CORE_AV;
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hdmi.ip_data.pll_offset = HDMI_PLLCTRL;
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hdmi.ip_data.phy_offset = HDMI_PHY;
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mutex_init(&hdmi.ip_data.lock);
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hdmi_panel_init();
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@ -41,17 +41,32 @@ static struct {
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static int hdmi_panel_probe(struct omap_dss_device *dssdev)
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{
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/* Initialize default timings to VGA in DVI mode */
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const struct omap_video_timings default_timings = {
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.x_res = 640,
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.y_res = 480,
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.pixel_clock = 25175,
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.hsw = 96,
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.hfp = 16,
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.hbp = 48,
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.vsw = 2,
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.vfp = 11,
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.vbp = 31,
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.vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
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.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
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.interlace = false,
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};
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DSSDBG("ENTER hdmi_panel_probe\n");
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dssdev->panel.timings = (struct omap_video_timings)
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{ 640, 480, 25175, 96, 16, 48, 2, 11, 31,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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false,
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};
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dssdev->panel.timings = default_timings;
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DSSDBG("hdmi_panel_probe x_res= %d y_res = %d\n",
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dssdev->panel.timings.x_res,
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dssdev->panel.timings.y_res);
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return 0;
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}
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@ -228,6 +243,8 @@ static int hdmi_panel_enable(struct omap_dss_device *dssdev)
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goto err;
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}
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omapdss_hdmi_display_set_timing(dssdev, &dssdev->panel.timings);
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r = omapdss_hdmi_display_enable(dssdev);
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if (r) {
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DSSERR("failed to power on\n");
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@ -336,8 +353,8 @@ static void hdmi_set_timings(struct omap_dss_device *dssdev,
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*/
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hdmi_panel_audio_disable(dssdev);
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omapdss_hdmi_display_set_timing(dssdev, timings);
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dssdev->panel.timings = *timings;
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omapdss_hdmi_display_set_timing(dssdev);
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mutex_unlock(&hdmi.lock);
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}
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