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media: s5p-mfc: Add YV12 and I420 multiplanar format support
YV12 and I420 format (3-plane) support is added. Stride information is added to all formats and planes since it is necessary for YV12/I420 which are different from width. Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy <smithatmurthy@gmail.com> Signed-off-by: Aakarsh Jain <aakarsh.jain@samsung.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
This commit is contained in:
parent
e57b6d326f
commit
6f1466123d
9 changed files with 276 additions and 63 deletions
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@ -26,6 +26,8 @@
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#define MFC_VERSION_V12 0xC0
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#define MFC_NUM_PORTS_V12 1
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#define S5P_FIMV_CODEC_VP9_ENC 27
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#define MFC_CHROMA_PAD_BYTES_V12 256
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#define S5P_FIMV_D_ALIGN_PLANE_SIZE_V12 256
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/* Encoder buffer size for MFCv12 */
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#define ENC_V120_BASE_SIZE(x, y) \
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@ -24,6 +24,7 @@
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#define S5P_FIMV_E_ENCODED_SOURCE_FIRST_ADDR_V7 0xfa70
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#define S5P_FIMV_E_ENCODED_SOURCE_SECOND_ADDR_V7 0xfa74
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#define S5P_FIMV_E_ENCODED_SOURCE_THIRD_ADDR_V7 0xfa78
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#define S5P_FIMV_E_VP8_OPTIONS_V7 0xfdb0
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#define S5P_FIMV_E_VP8_FILTER_OPTIONS_V7 0xfdb4
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@ -17,13 +17,16 @@
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#define S5P_FIMV_D_MIN_SCRATCH_BUFFER_SIZE_V8 0xf108
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#define S5P_FIMV_D_FIRST_PLANE_DPB_SIZE_V8 0xf144
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#define S5P_FIMV_D_SECOND_PLANE_DPB_SIZE_V8 0xf148
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#define S5P_FIMV_D_THIRD_PLANE_DPB_SIZE_V8 0xf14C
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#define S5P_FIMV_D_MV_BUFFER_SIZE_V8 0xf150
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#define S5P_FIMV_D_FIRST_PLANE_DPB_STRIDE_SIZE_V8 0xf138
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#define S5P_FIMV_D_SECOND_PLANE_DPB_STRIDE_SIZE_V8 0xf13c
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#define S5P_FIMV_D_THIRD_PLANE_DPB_STRIDE_SIZE_V8 0xf140
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#define S5P_FIMV_D_FIRST_PLANE_DPB_V8 0xf160
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#define S5P_FIMV_D_SECOND_PLANE_DPB_V8 0xf260
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#define S5P_FIMV_D_THIRD_PLANE_DPB_V8 0xf360
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#define S5P_FIMV_D_MV_BUFFER_V8 0xf460
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#define S5P_FIMV_D_NUM_MV_V8 0xf134
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@ -56,6 +56,7 @@
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#define MFC_NO_INSTANCE_SET -1
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#define MFC_ENC_CAP_PLANE_COUNT 1
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#define MFC_ENC_OUT_PLANE_COUNT 2
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#define VB2_MAX_PLANE_COUNT 3
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#define STUFF_BYTE 4
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#define MFC_MAX_CTRLS 128
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@ -181,6 +182,7 @@ struct s5p_mfc_buf {
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struct {
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size_t luma;
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size_t chroma;
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size_t chroma_1;
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} raw;
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size_t stream;
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} cookie;
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@ -623,6 +625,8 @@ struct s5p_mfc_codec_ops {
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* @scratch_buf_size: scratch buffer size
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* @is_10bit: state to check 10bit support
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* @is_422: state to check YUV422 10bit format
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* @chroma_size_1: size of a chroma third plane
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* @stride: size of stride for all planes
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*/
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struct s5p_mfc_ctx {
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struct s5p_mfc_dev *dev;
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@ -659,6 +663,7 @@ struct s5p_mfc_ctx {
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int luma_size;
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int chroma_size;
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int chroma_size_1;
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int mv_size;
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unsigned long consumed_stream;
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@ -724,6 +729,7 @@ struct s5p_mfc_ctx {
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size_t scratch_buf_size;
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int is_10bit;
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int is_422;
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int stride[VB2_MAX_PLANE_COUNT];
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};
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/*
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@ -56,6 +56,20 @@ static struct s5p_mfc_fmt formats[] = {
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.num_planes = 2,
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.versions = MFC_V6PLUS_BITS,
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},
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{
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.fourcc = V4L2_PIX_FMT_YUV420M,
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.codec_mode = S5P_MFC_CODEC_NONE,
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.type = MFC_FMT_RAW,
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.num_planes = 3,
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.versions = MFC_V12_BIT,
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},
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{
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.fourcc = V4L2_PIX_FMT_YVU420M,
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.codec_mode = S5P_MFC_CODEC_NONE,
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.type = MFC_FMT_RAW,
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.num_planes = 3,
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.versions = MFC_V12_BIT
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},
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{
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.fourcc = V4L2_PIX_FMT_H264,
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.codec_mode = S5P_MFC_CODEC_H264_DEC,
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@ -359,10 +373,15 @@ static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
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/* Set pixelformat to the format in which MFC
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outputs the decoded frame */
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pix_mp->pixelformat = ctx->dst_fmt->fourcc;
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pix_mp->plane_fmt[0].bytesperline = ctx->buf_width;
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pix_mp->plane_fmt[0].bytesperline = ctx->stride[0];
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pix_mp->plane_fmt[0].sizeimage = ctx->luma_size;
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pix_mp->plane_fmt[1].bytesperline = ctx->buf_width;
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pix_mp->plane_fmt[1].bytesperline = ctx->stride[1];
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pix_mp->plane_fmt[1].sizeimage = ctx->chroma_size;
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if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->dst_fmt->fourcc ==
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V4L2_PIX_FMT_YVU420M) {
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pix_mp->plane_fmt[2].bytesperline = ctx->stride[2];
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pix_mp->plane_fmt[2].sizeimage = ctx->chroma_size_1;
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}
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} else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
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/* This is run on OUTPUT
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The buffer contains compressed image
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@ -920,6 +939,7 @@ static int s5p_mfc_queue_setup(struct vb2_queue *vq,
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{
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struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv);
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struct s5p_mfc_dev *dev = ctx->dev;
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const struct v4l2_format_info *format;
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/* Video output for decoding (source)
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* this can be set after getting an instance */
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@ -936,7 +956,13 @@ static int s5p_mfc_queue_setup(struct vb2_queue *vq,
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} else if (ctx->state == MFCINST_HEAD_PARSED &&
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vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
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/* Output plane count is 2 - one for Y and one for CbCr */
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*plane_count = 2;
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format = v4l2_format_info(ctx->dst_fmt->fourcc);
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if (!format) {
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mfc_err("invalid format\n");
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return -EINVAL;
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}
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*plane_count = format->comp_planes;
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/* Setup buffer count */
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if (*buf_count < ctx->pb_count)
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*buf_count = ctx->pb_count;
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@ -955,14 +981,18 @@ static int s5p_mfc_queue_setup(struct vb2_queue *vq,
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vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
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psize[0] = ctx->luma_size;
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psize[1] = ctx->chroma_size;
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if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->dst_fmt->fourcc ==
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V4L2_PIX_FMT_YVU420M)
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psize[2] = ctx->chroma_size_1;
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if (IS_MFCV6_PLUS(dev))
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alloc_devs[0] = ctx->dev->mem_dev[BANK_L_CTX];
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else
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alloc_devs[0] = ctx->dev->mem_dev[BANK_R_CTX];
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alloc_devs[1] = ctx->dev->mem_dev[BANK_L_CTX];
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} else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE &&
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ctx->state == MFCINST_INIT) {
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if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->dst_fmt->fourcc ==
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V4L2_PIX_FMT_YVU420M)
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alloc_devs[2] = ctx->dev->mem_dev[BANK_L_CTX];
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} else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE && ctx->state == MFCINST_INIT) {
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psize[0] = ctx->dec_src_buf_size;
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alloc_devs[0] = ctx->dev->mem_dev[BANK_L_CTX];
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} else {
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@ -994,12 +1024,24 @@ static int s5p_mfc_buf_init(struct vb2_buffer *vb)
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mfc_err("Plane buffer (CAPTURE) is too small\n");
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return -EINVAL;
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}
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if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->dst_fmt->fourcc ==
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V4L2_PIX_FMT_YVU420M) {
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if (vb2_plane_size(vb, 2) < ctx->chroma_size_1) {
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mfc_err("Plane buffer (CAPTURE) is too small\n");
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return -EINVAL;
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}
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}
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i = vb->index;
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ctx->dst_bufs[i].b = vbuf;
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ctx->dst_bufs[i].cookie.raw.luma =
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vb2_dma_contig_plane_dma_addr(vb, 0);
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ctx->dst_bufs[i].cookie.raw.chroma =
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vb2_dma_contig_plane_dma_addr(vb, 1);
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if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->dst_fmt->fourcc ==
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V4L2_PIX_FMT_YVU420M) {
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ctx->dst_bufs[i].cookie.raw.chroma_1 =
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vb2_dma_contig_plane_dma_addr(vb, 2);
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}
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ctx->dst_bufs_cnt++;
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} else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
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if (IS_ERR_OR_NULL(ERR_PTR(
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@ -59,6 +59,20 @@ static struct s5p_mfc_fmt formats[] = {
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.num_planes = 2,
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.versions = MFC_V6PLUS_BITS,
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},
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{
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.fourcc = V4L2_PIX_FMT_YUV420M,
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.codec_mode = S5P_MFC_CODEC_NONE,
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.type = MFC_FMT_RAW,
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.num_planes = 3,
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.versions = MFC_V12_BIT,
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},
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{
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.fourcc = V4L2_PIX_FMT_YVU420M,
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.codec_mode = S5P_MFC_CODEC_NONE,
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.type = MFC_FMT_RAW,
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.num_planes = 3,
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.versions = MFC_V12_BIT,
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},
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{
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.fourcc = V4L2_PIX_FMT_H264,
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.codec_mode = S5P_MFC_CODEC_H264_ENC,
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@ -1193,14 +1207,20 @@ static int enc_pre_frame_start(struct s5p_mfc_ctx *ctx)
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struct s5p_mfc_dev *dev = ctx->dev;
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struct s5p_mfc_buf *dst_mb;
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struct s5p_mfc_buf *src_mb;
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unsigned long src_y_addr, src_c_addr, dst_addr;
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unsigned long src_y_addr, src_c_addr, src_c_1_addr, dst_addr;
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unsigned int dst_size;
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src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
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src_y_addr = vb2_dma_contig_plane_dma_addr(&src_mb->b->vb2_buf, 0);
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src_c_addr = vb2_dma_contig_plane_dma_addr(&src_mb->b->vb2_buf, 1);
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if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->src_fmt->fourcc ==
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V4L2_PIX_FMT_YVU420M)
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src_c_1_addr =
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vb2_dma_contig_plane_dma_addr(&src_mb->b->vb2_buf, 2);
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else
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src_c_1_addr = 0;
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s5p_mfc_hw_call(dev->mfc_ops, set_enc_frame_buffer, ctx,
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src_y_addr, src_c_addr);
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src_y_addr, src_c_addr, src_c_1_addr);
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dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
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dst_addr = vb2_dma_contig_plane_dma_addr(&dst_mb->b->vb2_buf, 0);
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@ -1215,8 +1235,8 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx)
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{
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struct s5p_mfc_dev *dev = ctx->dev;
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struct s5p_mfc_buf *mb_entry;
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unsigned long enc_y_addr = 0, enc_c_addr = 0;
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unsigned long mb_y_addr, mb_c_addr;
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unsigned long enc_y_addr = 0, enc_c_addr = 0, enc_c_1_addr = 0;
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unsigned long mb_y_addr, mb_c_addr, mb_c_1_addr;
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int slice_type;
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unsigned int strm_size;
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bool src_ready;
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@ -1229,14 +1249,22 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx)
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mfc_read(dev, S5P_FIMV_ENC_SI_PIC_CNT));
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if (slice_type >= 0) {
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s5p_mfc_hw_call(dev->mfc_ops, get_enc_frame_buffer, ctx,
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&enc_y_addr, &enc_c_addr);
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&enc_y_addr, &enc_c_addr, &enc_c_1_addr);
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list_for_each_entry(mb_entry, &ctx->src_queue, list) {
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mb_y_addr = vb2_dma_contig_plane_dma_addr(
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&mb_entry->b->vb2_buf, 0);
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mb_c_addr = vb2_dma_contig_plane_dma_addr(
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&mb_entry->b->vb2_buf, 1);
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if ((enc_y_addr == mb_y_addr) &&
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(enc_c_addr == mb_c_addr)) {
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if (ctx->src_fmt->fourcc ==
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V4L2_PIX_FMT_YUV420M ||
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ctx->src_fmt->fourcc ==
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V4L2_PIX_FMT_YVU420M)
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mb_c_1_addr = vb2_dma_contig_plane_dma_addr
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(&mb_entry->b->vb2_buf, 2);
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else
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mb_c_1_addr = 0;
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if (enc_y_addr == mb_y_addr && enc_c_addr == mb_c_addr && enc_c_1_addr
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== mb_c_1_addr) {
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list_del(&mb_entry->list);
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ctx->src_queue_cnt--;
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vb2_buffer_done(&mb_entry->b->vb2_buf,
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&mb_entry->b->vb2_buf, 0);
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mb_c_addr = vb2_dma_contig_plane_dma_addr(
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&mb_entry->b->vb2_buf, 1);
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if ((enc_y_addr == mb_y_addr) &&
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(enc_c_addr == mb_c_addr)) {
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if (ctx->src_fmt->fourcc ==
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V4L2_PIX_FMT_YUV420M ||
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ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M)
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mb_c_1_addr = vb2_dma_contig_plane_dma_addr(&
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mb_entry->b->vb2_buf, 2);
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else
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mb_c_1_addr = 0;
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if (enc_y_addr == mb_y_addr && enc_c_addr == mb_c_addr && enc_c_1_addr
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== mb_c_1_addr) {
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list_del(&mb_entry->list);
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ctx->ref_queue_cnt--;
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vb2_buffer_done(&mb_entry->b->vb2_buf,
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@ -1381,10 +1416,15 @@ static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
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pix_fmt_mp->pixelformat = ctx->src_fmt->fourcc;
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pix_fmt_mp->num_planes = ctx->src_fmt->num_planes;
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pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width;
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pix_fmt_mp->plane_fmt[0].bytesperline = ctx->stride[0];
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pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size;
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pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width;
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pix_fmt_mp->plane_fmt[1].bytesperline = ctx->stride[1];
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pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size;
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if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->src_fmt->fourcc ==
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V4L2_PIX_FMT_YVU420M) {
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pix_fmt_mp->plane_fmt[2].bytesperline = ctx->stride[2];
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pix_fmt_mp->plane_fmt[2].sizeimage = ctx->chroma_size_1;
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}
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} else {
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mfc_err("invalid buf type\n");
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return -EINVAL;
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@ -1468,9 +1508,14 @@ static int vidioc_s_fmt(struct file *file, void *priv, struct v4l2_format *f)
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s5p_mfc_hw_call(dev->mfc_ops, enc_calc_src_size, ctx);
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pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size;
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pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width;
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pix_fmt_mp->plane_fmt[0].bytesperline = ctx->stride[0];
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pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size;
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pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width;
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pix_fmt_mp->plane_fmt[1].bytesperline = ctx->stride[1];
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if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->src_fmt->fourcc ==
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V4L2_PIX_FMT_YVU420M) {
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pix_fmt_mp->plane_fmt[2].bytesperline = ctx->stride[2];
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pix_fmt_mp->plane_fmt[2].sizeimage = ctx->chroma_size_1;
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}
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ctx->src_bufs_cnt = 0;
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ctx->output_state = QUEUE_FREE;
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@ -2414,10 +2459,18 @@ static int s5p_mfc_queue_setup(struct vb2_queue *vq,
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psize[0] = ctx->luma_size;
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psize[1] = ctx->chroma_size;
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if (ctx->src_fmt && (ctx->src_fmt->fourcc ==
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V4L2_PIX_FMT_YUV420M || ctx->src_fmt->fourcc ==
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V4L2_PIX_FMT_YVU420M))
|
||||
psize[2] = ctx->chroma_size_1;
|
||||
|
||||
if (IS_MFCV6_PLUS(dev)) {
|
||||
alloc_devs[0] = ctx->dev->mem_dev[BANK_L_CTX];
|
||||
alloc_devs[1] = ctx->dev->mem_dev[BANK_L_CTX];
|
||||
if (ctx->src_fmt && (ctx->src_fmt->fourcc ==
|
||||
V4L2_PIX_FMT_YUV420M || ctx->src_fmt->fourcc ==
|
||||
V4L2_PIX_FMT_YVU420M))
|
||||
alloc_devs[2] = ctx->dev->mem_dev[BANK_L_CTX];
|
||||
} else {
|
||||
alloc_devs[0] = ctx->dev->mem_dev[BANK_R_CTX];
|
||||
alloc_devs[1] = ctx->dev->mem_dev[BANK_R_CTX];
|
||||
|
@ -2456,6 +2509,11 @@ static int s5p_mfc_buf_init(struct vb2_buffer *vb)
|
|||
vb2_dma_contig_plane_dma_addr(vb, 0);
|
||||
ctx->src_bufs[i].cookie.raw.chroma =
|
||||
vb2_dma_contig_plane_dma_addr(vb, 1);
|
||||
if (ctx->src_fmt->fourcc ==
|
||||
V4L2_PIX_FMT_YUV420M || ctx->src_fmt->fourcc ==
|
||||
V4L2_PIX_FMT_YVU420M)
|
||||
ctx->src_bufs[i].cookie.raw.chroma_1 =
|
||||
vb2_dma_contig_plane_dma_addr(vb, 2);
|
||||
ctx->src_bufs_cnt++;
|
||||
} else {
|
||||
mfc_err("invalid queue type: %d\n", vq->type);
|
||||
|
@ -2493,6 +2551,12 @@ static int s5p_mfc_buf_prepare(struct vb2_buffer *vb)
|
|||
mfc_err("plane size is too small for output\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
if ((ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M ||
|
||||
ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) &&
|
||||
(vb2_plane_size(vb, 2) < ctx->chroma_size_1)) {
|
||||
mfc_err("plane size is too small for output\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
} else {
|
||||
mfc_err("invalid queue type: %d\n", vq->type);
|
||||
return -EINVAL;
|
||||
|
|
|
@ -293,9 +293,11 @@ struct s5p_mfc_hw_ops {
|
|||
int (*set_enc_stream_buffer)(struct s5p_mfc_ctx *ctx,
|
||||
unsigned long addr, unsigned int size);
|
||||
void (*set_enc_frame_buffer)(struct s5p_mfc_ctx *ctx,
|
||||
unsigned long y_addr, unsigned long c_addr);
|
||||
unsigned long y_addr, unsigned long c_addr,
|
||||
unsigned long c_1_addr);
|
||||
void (*get_enc_frame_buffer)(struct s5p_mfc_ctx *ctx,
|
||||
unsigned long *y_addr, unsigned long *c_addr);
|
||||
unsigned long *y_addr, unsigned long *c_addr,
|
||||
unsigned long *c_1_addr);
|
||||
void (*try_run)(struct s5p_mfc_dev *dev);
|
||||
void (*clear_int_flags)(struct s5p_mfc_dev *dev);
|
||||
int (*get_dspl_y_adr)(struct s5p_mfc_dev *dev);
|
||||
|
|
|
@ -516,7 +516,8 @@ static int s5p_mfc_set_enc_stream_buffer_v5(struct s5p_mfc_ctx *ctx,
|
|||
}
|
||||
|
||||
static void s5p_mfc_set_enc_frame_buffer_v5(struct s5p_mfc_ctx *ctx,
|
||||
unsigned long y_addr, unsigned long c_addr)
|
||||
unsigned long y_addr, unsigned long c_addr,
|
||||
unsigned long c_1_addr)
|
||||
{
|
||||
struct s5p_mfc_dev *dev = ctx->dev;
|
||||
|
||||
|
@ -525,7 +526,8 @@ static void s5p_mfc_set_enc_frame_buffer_v5(struct s5p_mfc_ctx *ctx,
|
|||
}
|
||||
|
||||
static void s5p_mfc_get_enc_frame_buffer_v5(struct s5p_mfc_ctx *ctx,
|
||||
unsigned long *y_addr, unsigned long *c_addr)
|
||||
unsigned long *y_addr, unsigned long *c_addr,
|
||||
unsigned long *c_1_addr)
|
||||
{
|
||||
struct s5p_mfc_dev *dev = ctx->dev;
|
||||
|
||||
|
@ -1210,7 +1212,7 @@ static int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx)
|
|||
if (list_empty(&ctx->src_queue)) {
|
||||
/* send null frame */
|
||||
s5p_mfc_set_enc_frame_buffer_v5(ctx, dev->dma_base[BANK_R_CTX],
|
||||
dev->dma_base[BANK_R_CTX]);
|
||||
dev->dma_base[BANK_R_CTX], 0);
|
||||
src_mb = NULL;
|
||||
} else {
|
||||
src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf,
|
||||
|
@ -1220,7 +1222,7 @@ static int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx)
|
|||
/* send null frame */
|
||||
s5p_mfc_set_enc_frame_buffer_v5(ctx,
|
||||
dev->dma_base[BANK_R_CTX],
|
||||
dev->dma_base[BANK_R_CTX]);
|
||||
dev->dma_base[BANK_R_CTX], 0);
|
||||
ctx->state = MFCINST_FINISHING;
|
||||
} else {
|
||||
src_y_addr = vb2_dma_contig_plane_dma_addr(
|
||||
|
@ -1228,7 +1230,7 @@ static int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx)
|
|||
src_c_addr = vb2_dma_contig_plane_dma_addr(
|
||||
&src_mb->b->vb2_buf, 1);
|
||||
s5p_mfc_set_enc_frame_buffer_v5(ctx, src_y_addr,
|
||||
src_c_addr);
|
||||
src_c_addr, 0);
|
||||
if (src_mb->flags & MFC_BUF_FLAG_EOS)
|
||||
ctx->state = MFCINST_FINISHING;
|
||||
}
|
||||
|
|
|
@ -488,16 +488,35 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
|
|||
struct s5p_mfc_dev *dev = ctx->dev;
|
||||
ctx->buf_width = ALIGN(ctx->img_width, S5P_FIMV_NV12MT_HALIGN_V6);
|
||||
ctx->buf_height = ALIGN(ctx->img_height, S5P_FIMV_NV12MT_VALIGN_V6);
|
||||
ctx->chroma_size_1 = 0;
|
||||
mfc_debug(2, "SEQ Done: Movie dimensions %dx%d,\n"
|
||||
"buffer dimensions: %dx%d\n", ctx->img_width,
|
||||
ctx->img_height, ctx->buf_width, ctx->buf_height);
|
||||
|
||||
ctx->luma_size = calc_plane(ctx->img_width, ctx->img_height);
|
||||
ctx->chroma_size = calc_plane(ctx->img_width, (ctx->img_height >> 1));
|
||||
switch (ctx->dst_fmt->fourcc) {
|
||||
case V4L2_PIX_FMT_NV12M:
|
||||
case V4L2_PIX_FMT_NV21M:
|
||||
ctx->stride[0] = ALIGN(ctx->img_width, S5P_FIMV_NV12MT_HALIGN_V6);
|
||||
ctx->stride[1] = ALIGN(ctx->img_width, S5P_FIMV_NV12MT_HALIGN_V6);
|
||||
ctx->luma_size = calc_plane(ctx->stride[0], ctx->img_height);
|
||||
ctx->chroma_size = calc_plane(ctx->stride[1], (ctx->img_height / 2));
|
||||
break;
|
||||
case V4L2_PIX_FMT_YUV420M:
|
||||
case V4L2_PIX_FMT_YVU420M:
|
||||
ctx->stride[0] = ALIGN(ctx->img_width, S5P_FIMV_NV12MT_HALIGN_V6);
|
||||
ctx->stride[1] = ALIGN(ctx->img_width / 2, S5P_FIMV_NV12MT_HALIGN_V6);
|
||||
ctx->stride[2] = ALIGN(ctx->img_width / 2, S5P_FIMV_NV12MT_HALIGN_V6);
|
||||
ctx->luma_size = calc_plane(ctx->stride[0], ctx->img_height);
|
||||
ctx->chroma_size = calc_plane(ctx->stride[1], (ctx->img_height / 2));
|
||||
ctx->chroma_size_1 = calc_plane(ctx->stride[2], (ctx->img_height / 2));
|
||||
break;
|
||||
}
|
||||
|
||||
if (IS_MFCV8_PLUS(ctx->dev)) {
|
||||
/* MFCv8 needs additional 64 bytes for luma,chroma dpb*/
|
||||
ctx->luma_size += S5P_FIMV_D_ALIGN_PLANE_SIZE_V8;
|
||||
ctx->chroma_size += S5P_FIMV_D_ALIGN_PLANE_SIZE_V8;
|
||||
ctx->chroma_size_1 += S5P_FIMV_D_ALIGN_PLANE_SIZE_V8;
|
||||
}
|
||||
|
||||
if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
|
||||
|
@ -524,14 +543,40 @@ static void s5p_mfc_enc_calc_src_size_v6(struct s5p_mfc_ctx *ctx)
|
|||
mb_width = MB_WIDTH(ctx->img_width);
|
||||
mb_height = MB_HEIGHT(ctx->img_height);
|
||||
|
||||
if (IS_MFCV12(ctx->dev)) {
|
||||
switch (ctx->src_fmt->fourcc) {
|
||||
case V4L2_PIX_FMT_NV12M:
|
||||
case V4L2_PIX_FMT_NV21M:
|
||||
ctx->stride[0] = ALIGN(ctx->img_width, S5P_FIMV_NV12M_HALIGN_V6);
|
||||
ctx->stride[1] = ALIGN(ctx->img_width, S5P_FIMV_NV12M_HALIGN_V6);
|
||||
ctx->luma_size = ctx->stride[0] * ALIGN(ctx->img_height, 16);
|
||||
ctx->chroma_size = ctx->stride[0] * ALIGN(ctx->img_height / 2, 16);
|
||||
break;
|
||||
case V4L2_PIX_FMT_YUV420M:
|
||||
case V4L2_PIX_FMT_YVU420M:
|
||||
ctx->stride[0] = ALIGN(ctx->img_width, S5P_FIMV_NV12M_HALIGN_V6);
|
||||
ctx->stride[1] = ALIGN(ctx->img_width / 2, S5P_FIMV_NV12M_HALIGN_V6);
|
||||
ctx->stride[2] = ALIGN(ctx->img_width / 2, S5P_FIMV_NV12M_HALIGN_V6);
|
||||
ctx->luma_size = ctx->stride[0] * ALIGN(ctx->img_height, 16);
|
||||
ctx->chroma_size = ctx->stride[1] * ALIGN(ctx->img_height / 2, 16);
|
||||
ctx->chroma_size_1 = ctx->stride[2] * ALIGN(ctx->img_height / 2, 16);
|
||||
break;
|
||||
}
|
||||
ctx->luma_size += MFC_LUMA_PAD_BYTES_V7;
|
||||
ctx->chroma_size += MFC_CHROMA_PAD_BYTES_V12;
|
||||
ctx->chroma_size_1 += MFC_CHROMA_PAD_BYTES_V12;
|
||||
} else {
|
||||
ctx->buf_width = ALIGN(ctx->img_width, S5P_FIMV_NV12M_HALIGN_V6);
|
||||
ctx->stride[0] = ctx->buf_width;
|
||||
ctx->stride[1] = ctx->buf_width;
|
||||
ctx->luma_size = ALIGN((mb_width * mb_height) * 256, 256);
|
||||
ctx->chroma_size = ALIGN((mb_width * mb_height) * 128, 256);
|
||||
|
||||
ctx->chroma_size_1 = 0;
|
||||
/* MFCv7 needs pad bytes for Luma and Chroma */
|
||||
if (IS_MFCV7_PLUS(ctx->dev)) {
|
||||
ctx->luma_size += MFC_LUMA_PAD_BYTES_V7;
|
||||
ctx->chroma_size += MFC_CHROMA_PAD_BYTES_V7;
|
||||
ctx->chroma_size += MFC_LUMA_PAD_BYTES_V7;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -578,15 +623,18 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
|
|||
writel(ctx->total_dpb_count, mfc_regs->d_num_dpb);
|
||||
writel(ctx->luma_size, mfc_regs->d_first_plane_dpb_size);
|
||||
writel(ctx->chroma_size, mfc_regs->d_second_plane_dpb_size);
|
||||
|
||||
if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->dst_fmt->fourcc ==
|
||||
V4L2_PIX_FMT_YVU420M)
|
||||
writel(ctx->chroma_size_1, mfc_regs->d_third_plane_dpb_size);
|
||||
writel(buf_addr1, mfc_regs->d_scratch_buffer_addr);
|
||||
writel(ctx->scratch_buf_size, mfc_regs->d_scratch_buffer_size);
|
||||
|
||||
if (IS_MFCV8_PLUS(dev)) {
|
||||
writel(ctx->img_width,
|
||||
mfc_regs->d_first_plane_dpb_stride_size);
|
||||
writel(ctx->img_width,
|
||||
mfc_regs->d_second_plane_dpb_stride_size);
|
||||
writel(ctx->stride[0], mfc_regs->d_first_plane_dpb_stride_size);
|
||||
writel(ctx->stride[1], mfc_regs->d_second_plane_dpb_stride_size);
|
||||
if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->dst_fmt->fourcc ==
|
||||
V4L2_PIX_FMT_YVU420M)
|
||||
writel(ctx->stride[2], mfc_regs->d_third_plane_dpb_stride_size);
|
||||
}
|
||||
|
||||
buf_addr1 += ctx->scratch_buf_size;
|
||||
|
@ -615,6 +663,13 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx)
|
|||
ctx->dst_bufs[i].cookie.raw.chroma);
|
||||
writel(ctx->dst_bufs[i].cookie.raw.chroma,
|
||||
mfc_regs->d_second_plane_dpb + i * 4);
|
||||
if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->dst_fmt->fourcc ==
|
||||
V4L2_PIX_FMT_YVU420M) {
|
||||
mfc_debug(2, "\tChroma_1 %d: %zx\n", i, ctx
|
||||
->dst_bufs[i].cookie.raw.chroma_1);
|
||||
writel(ctx->dst_bufs[i].cookie.raw.chroma_1, mfc_regs->d_third_plane_dpb +
|
||||
i * 4);
|
||||
}
|
||||
}
|
||||
if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
|
||||
ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC ||
|
||||
|
@ -673,20 +728,24 @@ static int s5p_mfc_set_enc_stream_buffer_v6(struct s5p_mfc_ctx *ctx,
|
|||
}
|
||||
|
||||
static void s5p_mfc_set_enc_frame_buffer_v6(struct s5p_mfc_ctx *ctx,
|
||||
unsigned long y_addr, unsigned long c_addr)
|
||||
unsigned long y_addr, unsigned long c_addr,
|
||||
unsigned long c_1_addr)
|
||||
{
|
||||
struct s5p_mfc_dev *dev = ctx->dev;
|
||||
const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs;
|
||||
|
||||
writel(y_addr, mfc_regs->e_source_first_plane_addr);
|
||||
writel(c_addr, mfc_regs->e_source_second_plane_addr);
|
||||
writel(c_1_addr, mfc_regs->e_source_third_plane_addr);
|
||||
|
||||
mfc_debug(2, "enc src y buf addr: 0x%08lx\n", y_addr);
|
||||
mfc_debug(2, "enc src c buf addr: 0x%08lx\n", c_addr);
|
||||
mfc_debug(2, "enc src cr buf addr: 0x%08lx\n", c_1_addr);
|
||||
}
|
||||
|
||||
static void s5p_mfc_get_enc_frame_buffer_v6(struct s5p_mfc_ctx *ctx,
|
||||
unsigned long *y_addr, unsigned long *c_addr)
|
||||
unsigned long *y_addr, unsigned long *c_addr,
|
||||
unsigned long *c_1_addr)
|
||||
{
|
||||
struct s5p_mfc_dev *dev = ctx->dev;
|
||||
const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs;
|
||||
|
@ -694,12 +753,17 @@ static void s5p_mfc_get_enc_frame_buffer_v6(struct s5p_mfc_ctx *ctx,
|
|||
|
||||
*y_addr = readl(mfc_regs->e_encoded_source_first_plane_addr);
|
||||
*c_addr = readl(mfc_regs->e_encoded_source_second_plane_addr);
|
||||
if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->src_fmt->fourcc ==
|
||||
V4L2_PIX_FMT_YVU420M)
|
||||
*c_1_addr = readl(mfc_regs->e_encoded_source_third_plane_addr);
|
||||
else
|
||||
*c_1_addr = 0;
|
||||
|
||||
enc_recon_y_addr = readl(mfc_regs->e_recon_luma_dpb_addr);
|
||||
enc_recon_c_addr = readl(mfc_regs->e_recon_chroma_dpb_addr);
|
||||
|
||||
mfc_debug(2, "recon y addr: 0x%08lx y_addr: 0x%08lx\n", enc_recon_y_addr, *y_addr);
|
||||
mfc_debug(2, "recon c addr: 0x%08lx\n", enc_recon_c_addr);
|
||||
mfc_debug(2, "recon c addr: 0x%08lx c_addr: 0x%08lx\n", enc_recon_c_addr, *c_addr);
|
||||
}
|
||||
|
||||
/* Set encoding ref & codec buffer */
|
||||
|
@ -876,6 +940,20 @@ static int s5p_mfc_set_enc_params(struct s5p_mfc_ctx *ctx)
|
|||
writel(reg, mfc_regs->e_enc_options);
|
||||
/* 0: NV12(CbCr), 1: NV21(CrCb) */
|
||||
writel(0x0, mfc_regs->pixel_format);
|
||||
} else if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) {
|
||||
/* 0: Linear, 1: 2D tiled*/
|
||||
reg = readl(mfc_regs->e_enc_options);
|
||||
reg &= ~(0x1 << 7);
|
||||
writel(reg, mfc_regs->e_enc_options);
|
||||
/* 2: YV12(CrCb), 3: I420(CrCb) */
|
||||
writel(0x2, mfc_regs->pixel_format);
|
||||
} else if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M) {
|
||||
/* 0: Linear, 1: 2D tiled*/
|
||||
reg = readl(mfc_regs->e_enc_options);
|
||||
reg &= ~(0x1 << 7);
|
||||
writel(reg, mfc_regs->e_enc_options);
|
||||
/* 2: YV12(CrCb), 3: I420(CrCb) */
|
||||
writel(0x3, mfc_regs->pixel_format);
|
||||
}
|
||||
|
||||
/* memory structure recon. frame */
|
||||
|
@ -1686,8 +1764,12 @@ static int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx)
|
|||
else
|
||||
writel(reg, mfc_regs->d_dec_options);
|
||||
|
||||
/* 0: NV12(CbCr), 1: NV21(CrCb) */
|
||||
if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_NV21M)
|
||||
/* 0: NV12(CbCr), 1: NV21(CrCb), 2: YV12(CrCb), 3: I420(CbCr) */
|
||||
if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M)
|
||||
writel(0x3, mfc_regs->pixel_format);
|
||||
else if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M)
|
||||
writel(0x2, mfc_regs->pixel_format);
|
||||
else if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_NV21M)
|
||||
writel(0x1, mfc_regs->pixel_format);
|
||||
else
|
||||
writel(0x0, mfc_regs->pixel_format);
|
||||
|
@ -1771,8 +1853,11 @@ static int s5p_mfc_init_encode_v6(struct s5p_mfc_ctx *ctx)
|
|||
|
||||
/* Set stride lengths for v7 & above */
|
||||
if (IS_MFCV7_PLUS(dev)) {
|
||||
writel(ctx->img_width, mfc_regs->e_source_first_plane_stride);
|
||||
writel(ctx->img_width, mfc_regs->e_source_second_plane_stride);
|
||||
writel(ctx->stride[0], mfc_regs->e_source_first_plane_stride);
|
||||
writel(ctx->stride[1], mfc_regs->e_source_second_plane_stride);
|
||||
if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->src_fmt->fourcc ==
|
||||
V4L2_PIX_FMT_YVU420M)
|
||||
writel(ctx->stride[2], mfc_regs->e_source_third_plane_stride);
|
||||
}
|
||||
|
||||
writel(ctx->inst_no, mfc_regs->instance_id);
|
||||
|
@ -1881,7 +1966,7 @@ static inline int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx)
|
|||
struct s5p_mfc_dev *dev = ctx->dev;
|
||||
struct s5p_mfc_buf *dst_mb;
|
||||
struct s5p_mfc_buf *src_mb;
|
||||
unsigned long src_y_addr, src_c_addr, dst_addr;
|
||||
unsigned long src_y_addr, src_c_addr, src_c_1_addr, dst_addr;
|
||||
/*
|
||||
unsigned int src_y_size, src_c_size;
|
||||
*/
|
||||
|
@ -1899,22 +1984,28 @@ static inline int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx)
|
|||
|
||||
if (list_empty(&ctx->src_queue)) {
|
||||
/* send null frame */
|
||||
s5p_mfc_set_enc_frame_buffer_v6(ctx, 0, 0);
|
||||
s5p_mfc_set_enc_frame_buffer_v6(ctx, 0, 0, 0);
|
||||
src_mb = NULL;
|
||||
} else {
|
||||
src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
|
||||
src_mb->flags |= MFC_BUF_FLAG_USED;
|
||||
if (src_mb->b->vb2_buf.planes[0].bytesused == 0) {
|
||||
s5p_mfc_set_enc_frame_buffer_v6(ctx, 0, 0);
|
||||
s5p_mfc_set_enc_frame_buffer_v6(ctx, 0, 0, 0);
|
||||
ctx->state = MFCINST_FINISHING;
|
||||
} else {
|
||||
src_y_addr = vb2_dma_contig_plane_dma_addr(&src_mb->b->vb2_buf, 0);
|
||||
src_c_addr = vb2_dma_contig_plane_dma_addr(&src_mb->b->vb2_buf, 1);
|
||||
if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || ctx->src_fmt->fourcc ==
|
||||
V4L2_PIX_FMT_YVU420M)
|
||||
src_c_1_addr = vb2_dma_contig_plane_dma_addr
|
||||
(&src_mb->b->vb2_buf, 2);
|
||||
else
|
||||
src_c_1_addr = 0;
|
||||
|
||||
mfc_debug(2, "enc src y addr: 0x%08lx\n", src_y_addr);
|
||||
mfc_debug(2, "enc src c addr: 0x%08lx\n", src_c_addr);
|
||||
|
||||
s5p_mfc_set_enc_frame_buffer_v6(ctx, src_y_addr, src_c_addr);
|
||||
s5p_mfc_set_enc_frame_buffer_v6(ctx, src_y_addr, src_c_addr, src_c_1_addr);
|
||||
if (src_mb->flags & MFC_BUF_FLAG_EOS)
|
||||
ctx->state = MFCINST_FINISHING;
|
||||
}
|
||||
|
@ -2436,10 +2527,9 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
|
|||
R(e_source_first_plane_stride, S5P_FIMV_E_SOURCE_FIRST_STRIDE_V7);
|
||||
R(e_source_second_plane_stride, S5P_FIMV_E_SOURCE_SECOND_STRIDE_V7);
|
||||
R(e_source_third_plane_stride, S5P_FIMV_E_SOURCE_THIRD_STRIDE_V7);
|
||||
R(e_encoded_source_first_plane_addr,
|
||||
S5P_FIMV_E_ENCODED_SOURCE_FIRST_ADDR_V7);
|
||||
R(e_encoded_source_second_plane_addr,
|
||||
S5P_FIMV_E_ENCODED_SOURCE_SECOND_ADDR_V7);
|
||||
R(e_encoded_source_first_plane_addr, S5P_FIMV_E_ENCODED_SOURCE_FIRST_ADDR_V7);
|
||||
R(e_encoded_source_second_plane_addr, S5P_FIMV_E_ENCODED_SOURCE_SECOND_ADDR_V7);
|
||||
R(e_encoded_source_third_plane_addr, S5P_FIMV_E_ENCODED_SOURCE_THIRD_ADDR_V7);
|
||||
R(e_vp8_options, S5P_FIMV_E_VP8_OPTIONS_V7);
|
||||
|
||||
if (!IS_MFCV8_PLUS(dev))
|
||||
|
@ -2454,16 +2544,17 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev)
|
|||
R(d_cpb_buffer_offset, S5P_FIMV_D_CPB_BUFFER_OFFSET_V8);
|
||||
R(d_first_plane_dpb_size, S5P_FIMV_D_FIRST_PLANE_DPB_SIZE_V8);
|
||||
R(d_second_plane_dpb_size, S5P_FIMV_D_SECOND_PLANE_DPB_SIZE_V8);
|
||||
R(d_third_plane_dpb_size, S5P_FIMV_D_THIRD_PLANE_DPB_SIZE_V8);
|
||||
R(d_scratch_buffer_addr, S5P_FIMV_D_SCRATCH_BUFFER_ADDR_V8);
|
||||
R(d_scratch_buffer_size, S5P_FIMV_D_SCRATCH_BUFFER_SIZE_V8);
|
||||
R(d_first_plane_dpb_stride_size,
|
||||
S5P_FIMV_D_FIRST_PLANE_DPB_STRIDE_SIZE_V8);
|
||||
R(d_second_plane_dpb_stride_size,
|
||||
S5P_FIMV_D_SECOND_PLANE_DPB_STRIDE_SIZE_V8);
|
||||
R(d_first_plane_dpb_stride_size, S5P_FIMV_D_FIRST_PLANE_DPB_STRIDE_SIZE_V8);
|
||||
R(d_second_plane_dpb_stride_size, S5P_FIMV_D_SECOND_PLANE_DPB_STRIDE_SIZE_V8);
|
||||
R(d_third_plane_dpb_stride_size, S5P_FIMV_D_THIRD_PLANE_DPB_STRIDE_SIZE_V8);
|
||||
R(d_mv_buffer_size, S5P_FIMV_D_MV_BUFFER_SIZE_V8);
|
||||
R(d_num_mv, S5P_FIMV_D_NUM_MV_V8);
|
||||
R(d_first_plane_dpb, S5P_FIMV_D_FIRST_PLANE_DPB_V8);
|
||||
R(d_second_plane_dpb, S5P_FIMV_D_SECOND_PLANE_DPB_V8);
|
||||
R(d_third_plane_dpb, S5P_FIMV_D_THIRD_PLANE_DPB_V8);
|
||||
R(d_mv_buffer, S5P_FIMV_D_MV_BUFFER_V8);
|
||||
R(d_init_buffer_options, S5P_FIMV_D_INIT_BUFFER_OPTIONS_V8);
|
||||
R(d_available_dpb_flag_lower, S5P_FIMV_D_AVAILABLE_DPB_FLAG_LOWER_V8);
|
||||
|
|
Loading…
Add table
Reference in a new issue