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drm/amdkfd: replace kgd_dev in various amgpu_amdkfd funcs
Modified definitions: - amdgpu_amdkfd_submit_ib - amdgpu_amdkfd_set_compute_idle - amdgpu_amdkfd_have_atomics_support - amdgpu_amdkfd_flush_gpu_tlb_pasid - amdgpu_amdkfd_flush_gpu_tlb_pasid - amdgpu_amdkfd_gpu_reset - amdgpu_amdkfd_alloc_gtt_mem - amdgpu_amdkfd_free_gtt_mem - amdgpu_amdkfd_alloc_gws - amdgpu_amdkfd_free_gws - amdgpu_amdkfd_ras_poison_consumption_handler Signed-off-by: Graham Sider <Graham.Sider@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Graham Sider
Alex Deucher
parent
3356c38dc1
commit
6bfc7c7e17
8 changed files with 53 additions and 63 deletions
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@ -233,19 +233,16 @@ int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev)
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return r;
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}
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void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd)
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void amdgpu_amdkfd_gpu_reset(struct amdgpu_device *adev)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
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if (amdgpu_device_should_recover_gpu(adev))
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amdgpu_device_gpu_recover(adev, NULL);
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}
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int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
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int amdgpu_amdkfd_alloc_gtt_mem(struct amdgpu_device *adev, size_t size,
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void **mem_obj, uint64_t *gpu_addr,
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void **cpu_ptr, bool cp_mqd_gfx9)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
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struct amdgpu_bo *bo = NULL;
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struct amdgpu_bo_param bp;
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int r;
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@ -314,7 +311,7 @@ allocate_mem_reserve_bo_failed:
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return r;
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}
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void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)
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void amdgpu_amdkfd_free_gtt_mem(struct amdgpu_device *adev, void *mem_obj)
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{
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struct amdgpu_bo *bo = (struct amdgpu_bo *) mem_obj;
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@ -325,10 +322,9 @@ void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)
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amdgpu_bo_unref(&(bo));
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}
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int amdgpu_amdkfd_alloc_gws(struct kgd_dev *kgd, size_t size,
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int amdgpu_amdkfd_alloc_gws(struct amdgpu_device *adev, size_t size,
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void **mem_obj)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
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struct amdgpu_bo *bo = NULL;
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struct amdgpu_bo_user *ubo;
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struct amdgpu_bo_param bp;
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@ -355,7 +351,7 @@ int amdgpu_amdkfd_alloc_gws(struct kgd_dev *kgd, size_t size,
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return 0;
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}
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void amdgpu_amdkfd_free_gws(struct kgd_dev *kgd, void *mem_obj)
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void amdgpu_amdkfd_free_gws(struct amdgpu_device *adev, void *mem_obj)
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{
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struct amdgpu_bo *bo = (struct amdgpu_bo *)mem_obj;
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@ -675,11 +671,11 @@ int amdgpu_amdkfd_get_noretry(struct kgd_dev *kgd)
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return adev->gmc.noretry;
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}
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int amdgpu_amdkfd_submit_ib(struct kgd_dev *kgd, enum kgd_engine_type engine,
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int amdgpu_amdkfd_submit_ib(struct amdgpu_device *adev,
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enum kgd_engine_type engine,
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uint32_t vmid, uint64_t gpu_addr,
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uint32_t *ib_cmd, uint32_t ib_len)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
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struct amdgpu_job *job;
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struct amdgpu_ib *ib;
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struct amdgpu_ring *ring;
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@ -730,10 +726,8 @@ err:
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return ret;
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}
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void amdgpu_amdkfd_set_compute_idle(struct kgd_dev *kgd, bool idle)
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void amdgpu_amdkfd_set_compute_idle(struct amdgpu_device *adev, bool idle)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
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amdgpu_dpm_switch_power_profile(adev,
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PP_SMC_POWER_PROFILE_COMPUTE,
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!idle);
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@ -747,10 +741,9 @@ bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid)
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return false;
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}
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int amdgpu_amdkfd_flush_gpu_tlb_vmid(struct kgd_dev *kgd, uint16_t vmid)
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int amdgpu_amdkfd_flush_gpu_tlb_vmid(struct amdgpu_device *adev,
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uint16_t vmid)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
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if (adev->family == AMDGPU_FAMILY_AI) {
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int i;
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@ -763,10 +756,9 @@ int amdgpu_amdkfd_flush_gpu_tlb_vmid(struct kgd_dev *kgd, uint16_t vmid)
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return 0;
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}
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int amdgpu_amdkfd_flush_gpu_tlb_pasid(struct kgd_dev *kgd, uint16_t pasid,
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enum TLB_FLUSH_TYPE flush_type)
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int amdgpu_amdkfd_flush_gpu_tlb_pasid(struct amdgpu_device *adev,
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uint16_t pasid, enum TLB_FLUSH_TYPE flush_type)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
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bool all_hub = false;
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if (adev->family == AMDGPU_FAMILY_AI)
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@ -775,21 +767,18 @@ int amdgpu_amdkfd_flush_gpu_tlb_pasid(struct kgd_dev *kgd, uint16_t pasid,
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return amdgpu_gmc_flush_gpu_tlb_pasid(adev, pasid, flush_type, all_hub);
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}
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bool amdgpu_amdkfd_have_atomics_support(struct kgd_dev *kgd)
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bool amdgpu_amdkfd_have_atomics_support(struct amdgpu_device *adev)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
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return adev->have_atomics_support;
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}
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void amdgpu_amdkfd_ras_poison_consumption_handler(struct kgd_dev *kgd)
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void amdgpu_amdkfd_ras_poison_consumption_handler(struct amdgpu_device *adev)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
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struct ras_err_data err_data = {0, 0, 0, NULL};
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/* CPU MCA will handle page retirement if connected_to_cpu is 1 */
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if (!adev->gmc.xgmi.connected_to_cpu)
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amdgpu_umc_process_ras_data_cb(adev, &err_data, NULL);
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else
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amdgpu_amdkfd_gpu_reset(kgd);
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amdgpu_amdkfd_gpu_reset(adev);
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}
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@ -144,14 +144,16 @@ void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev,
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void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev);
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void amdgpu_amdkfd_device_init(struct amdgpu_device *adev);
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void amdgpu_amdkfd_device_fini_sw(struct amdgpu_device *adev);
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int amdgpu_amdkfd_submit_ib(struct kgd_dev *kgd, enum kgd_engine_type engine,
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int amdgpu_amdkfd_submit_ib(struct amdgpu_device *adev,
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enum kgd_engine_type engine,
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uint32_t vmid, uint64_t gpu_addr,
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uint32_t *ib_cmd, uint32_t ib_len);
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void amdgpu_amdkfd_set_compute_idle(struct kgd_dev *kgd, bool idle);
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bool amdgpu_amdkfd_have_atomics_support(struct kgd_dev *kgd);
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int amdgpu_amdkfd_flush_gpu_tlb_vmid(struct kgd_dev *kgd, uint16_t vmid);
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int amdgpu_amdkfd_flush_gpu_tlb_pasid(struct kgd_dev *kgd, uint16_t pasid,
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enum TLB_FLUSH_TYPE flush_type);
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void amdgpu_amdkfd_set_compute_idle(struct amdgpu_device *adev, bool idle);
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bool amdgpu_amdkfd_have_atomics_support(struct amdgpu_device *adev);
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int amdgpu_amdkfd_flush_gpu_tlb_vmid(struct amdgpu_device *adev,
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uint16_t vmid);
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int amdgpu_amdkfd_flush_gpu_tlb_pasid(struct amdgpu_device *adev,
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uint16_t pasid, enum TLB_FLUSH_TYPE flush_type);
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bool amdgpu_amdkfd_is_kfd_vmid(struct amdgpu_device *adev, u32 vmid);
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@ -159,7 +161,7 @@ int amdgpu_amdkfd_pre_reset(struct amdgpu_device *adev);
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int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev);
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void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd);
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void amdgpu_amdkfd_gpu_reset(struct amdgpu_device *adev);
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int amdgpu_queue_mask_bit_to_set_resource_bit(struct amdgpu_device *adev,
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int queue_bit);
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@ -198,12 +200,13 @@ int amdgpu_amdkfd_evict_userptr(struct kgd_mem *mem, struct mm_struct *mm)
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}
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#endif
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/* Shared API */
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int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
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int amdgpu_amdkfd_alloc_gtt_mem(struct amdgpu_device *adev, size_t size,
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void **mem_obj, uint64_t *gpu_addr,
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void **cpu_ptr, bool mqd_gfx9);
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void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj);
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int amdgpu_amdkfd_alloc_gws(struct kgd_dev *kgd, size_t size, void **mem_obj);
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void amdgpu_amdkfd_free_gws(struct kgd_dev *kgd, void *mem_obj);
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void amdgpu_amdkfd_free_gtt_mem(struct amdgpu_device *adev, void *mem_obj);
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int amdgpu_amdkfd_alloc_gws(struct amdgpu_device *adev, size_t size,
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void **mem_obj);
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void amdgpu_amdkfd_free_gws(struct amdgpu_device *adev, void *mem_obj);
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int amdgpu_amdkfd_add_gws_to_process(void *info, void *gws, struct kgd_mem **mem);
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int amdgpu_amdkfd_remove_gws_from_process(void *info, void *mem);
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uint32_t amdgpu_amdkfd_get_fw_version(struct kgd_dev *kgd,
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@ -292,7 +295,7 @@ int amdgpu_amdkfd_gpuvm_import_dmabuf(struct kgd_dev *kgd,
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uint64_t *mmap_offset);
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int amdgpu_amdkfd_get_tile_config(struct kgd_dev *kgd,
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struct tile_config *config);
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void amdgpu_amdkfd_ras_poison_consumption_handler(struct kgd_dev *kgd);
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void amdgpu_amdkfd_ras_poison_consumption_handler(struct amdgpu_device *adev);
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#if IS_ENABLED(CONFIG_HSA_AMD)
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void amdgpu_amdkfd_gpuvm_init_mem_limits(void);
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void amdgpu_amdkfd_gpuvm_destroy_cb(struct amdgpu_device *adev,
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@ -893,7 +893,7 @@ static int kfd_gws_init(struct kfd_dev *kfd)
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&& kfd->mec2_fw_version >= 0x30)
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|| (kfd->device_info->asic_family == CHIP_ALDEBARAN
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&& kfd->mec2_fw_version >= 0x28))
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ret = amdgpu_amdkfd_alloc_gws(kfd->kgd,
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ret = amdgpu_amdkfd_alloc_gws(kfd->adev,
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amdgpu_amdkfd_get_num_gws(kfd->kgd), &kfd->gws);
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return ret;
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@ -928,7 +928,7 @@ bool kgd2kfd_device_init(struct kfd_dev *kfd,
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* 32 and 64-bit requests are possible and must be
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* supported.
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*/
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kfd->pci_atomic_requested = amdgpu_amdkfd_have_atomics_support(kfd->kgd);
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kfd->pci_atomic_requested = amdgpu_amdkfd_have_atomics_support(kfd->adev);
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if (!kfd->pci_atomic_requested &&
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kfd->device_info->needs_pci_atomics &&
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(!kfd->device_info->no_atomic_fw_version ||
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@ -975,7 +975,7 @@ bool kgd2kfd_device_init(struct kfd_dev *kfd,
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size += 512 * 1024;
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if (amdgpu_amdkfd_alloc_gtt_mem(
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kfd->kgd, size, &kfd->gtt_mem,
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kfd->adev, size, &kfd->gtt_mem,
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&kfd->gtt_start_gpu_addr, &kfd->gtt_start_cpu_ptr,
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false)) {
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dev_err(kfd_device, "Could not allocate %d bytes\n", size);
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@ -1069,10 +1069,10 @@ kfd_interrupt_error:
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kfd_doorbell_error:
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kfd_gtt_sa_fini(kfd);
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kfd_gtt_sa_init_error:
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amdgpu_amdkfd_free_gtt_mem(kfd->kgd, kfd->gtt_mem);
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amdgpu_amdkfd_free_gtt_mem(kfd->adev, kfd->gtt_mem);
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alloc_gtt_mem_failure:
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if (kfd->gws)
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amdgpu_amdkfd_free_gws(kfd->kgd, kfd->gws);
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amdgpu_amdkfd_free_gws(kfd->adev, kfd->gws);
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dev_err(kfd_device,
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"device %x:%x NOT added due to errors\n",
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kfd->pdev->vendor, kfd->pdev->device);
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@ -1089,9 +1089,9 @@ void kgd2kfd_device_exit(struct kfd_dev *kfd)
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kfd_doorbell_fini(kfd);
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ida_destroy(&kfd->doorbell_ida);
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kfd_gtt_sa_fini(kfd);
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amdgpu_amdkfd_free_gtt_mem(kfd->kgd, kfd->gtt_mem);
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amdgpu_amdkfd_free_gtt_mem(kfd->adev, kfd->gtt_mem);
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if (kfd->gws)
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amdgpu_amdkfd_free_gws(kfd->kgd, kfd->gws);
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amdgpu_amdkfd_free_gws(kfd->adev, kfd->gws);
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}
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kfree(kfd);
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@ -1527,7 +1527,7 @@ void kgd2kfd_set_sram_ecc_flag(struct kfd_dev *kfd)
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void kfd_inc_compute_active(struct kfd_dev *kfd)
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{
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if (atomic_inc_return(&kfd->compute_profile) == 1)
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amdgpu_amdkfd_set_compute_idle(kfd->kgd, false);
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amdgpu_amdkfd_set_compute_idle(kfd->adev, false);
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}
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void kfd_dec_compute_active(struct kfd_dev *kfd)
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@ -1535,7 +1535,7 @@ void kfd_dec_compute_active(struct kfd_dev *kfd)
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int count = atomic_dec_return(&kfd->compute_profile);
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if (count == 0)
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amdgpu_amdkfd_set_compute_idle(kfd->kgd, true);
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amdgpu_amdkfd_set_compute_idle(kfd->adev, true);
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WARN_ONCE(count < 0, "Compute profile ref. count error");
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}
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@ -283,7 +283,7 @@ static int flush_texture_cache_nocpsch(struct kfd_dev *kdev,
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if (ret)
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return ret;
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return amdgpu_amdkfd_submit_ib(kdev->kgd, KGD_ENGINE_MEC1, qpd->vmid,
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return amdgpu_amdkfd_submit_ib(kdev->adev, KGD_ENGINE_MEC1, qpd->vmid,
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qpd->ib_base, (uint32_t *)qpd->ib_kaddr,
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pmf->release_mem_size / sizeof(uint32_t));
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}
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@ -1845,7 +1845,7 @@ static int allocate_hiq_sdma_mqd(struct device_queue_manager *dqm)
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dev->device_info->num_sdma_queues_per_engine +
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dqm->mqd_mgrs[KFD_MQD_TYPE_HIQ]->mqd_size;
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retval = amdgpu_amdkfd_alloc_gtt_mem(dev->kgd, size,
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retval = amdgpu_amdkfd_alloc_gtt_mem(dev->adev, size,
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&(mem_obj->gtt_mem), &(mem_obj->gpu_addr),
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(void *)&(mem_obj->cpu_ptr), false);
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@ -1995,7 +1995,7 @@ static void deallocate_hiq_sdma_mqd(struct kfd_dev *dev,
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{
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WARN(!mqd, "No hiq sdma mqd trunk to free");
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amdgpu_amdkfd_free_gtt_mem(dev->kgd, mqd->gtt_mem);
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amdgpu_amdkfd_free_gtt_mem(dev->adev, mqd->gtt_mem);
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}
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void device_queue_manager_uninit(struct device_queue_manager *dqm)
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@ -2026,7 +2026,7 @@ static void kfd_process_hw_exception(struct work_struct *work)
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{
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struct device_queue_manager *dqm = container_of(work,
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struct device_queue_manager, hw_exception_work);
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amdgpu_amdkfd_gpu_reset(dqm->dev->kgd);
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amdgpu_amdkfd_gpu_reset(dqm->dev->adev);
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}
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#if defined(CONFIG_DEBUG_FS)
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@ -231,7 +231,7 @@ static void event_interrupt_wq_v9(struct kfd_dev *dev,
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if (sq_intr_err != SQ_INTERRUPT_ERROR_TYPE_ILLEGAL_INST &&
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sq_intr_err != SQ_INTERRUPT_ERROR_TYPE_MEMVIOL) {
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kfd_signal_poison_consumed_event(dev, pasid);
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amdgpu_amdkfd_ras_poison_consumption_handler(dev->kgd);
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amdgpu_amdkfd_ras_poison_consumption_handler(dev->adev);
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return;
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}
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break;
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@ -253,7 +253,7 @@ static void event_interrupt_wq_v9(struct kfd_dev *dev,
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kfd_signal_event_interrupt(pasid, context_id0 & 0xfffffff, 28);
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} else if (source_id == SOC15_INTSRC_SDMA_ECC) {
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kfd_signal_poison_consumed_event(dev, pasid);
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amdgpu_amdkfd_ras_poison_consumption_handler(dev->kgd);
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amdgpu_amdkfd_ras_poison_consumption_handler(dev->adev);
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return;
|
||||
}
|
||||
} else if (client_id == SOC15_IH_CLIENTID_VMC ||
|
||||
|
|
|
|||
|
|
@ -108,7 +108,7 @@ static struct kfd_mem_obj *allocate_mqd(struct kfd_dev *kfd,
|
|||
mqd_mem_obj = kzalloc(sizeof(struct kfd_mem_obj), GFP_KERNEL);
|
||||
if (!mqd_mem_obj)
|
||||
return NULL;
|
||||
retval = amdgpu_amdkfd_alloc_gtt_mem(kfd->kgd,
|
||||
retval = amdgpu_amdkfd_alloc_gtt_mem(kfd->adev,
|
||||
ALIGN(q->ctl_stack_size, PAGE_SIZE) +
|
||||
ALIGN(sizeof(struct v9_mqd), PAGE_SIZE),
|
||||
&(mqd_mem_obj->gtt_mem),
|
||||
|
|
@ -301,7 +301,7 @@ static void free_mqd(struct mqd_manager *mm, void *mqd,
|
|||
struct kfd_dev *kfd = mm->dev;
|
||||
|
||||
if (mqd_mem_obj->gtt_mem) {
|
||||
amdgpu_amdkfd_free_gtt_mem(kfd->kgd, mqd_mem_obj->gtt_mem);
|
||||
amdgpu_amdkfd_free_gtt_mem(kfd->adev, mqd_mem_obj->gtt_mem);
|
||||
kfree(mqd_mem_obj);
|
||||
} else {
|
||||
kfd_gtt_sa_free(mm->dev, mqd_mem_obj);
|
||||
|
|
|
|||
|
|
@ -1951,10 +1951,10 @@ void kfd_flush_tlb(struct kfd_process_device *pdd, enum TLB_FLUSH_TYPE type)
|
|||
* only happens when the first queue is created.
|
||||
*/
|
||||
if (pdd->qpd.vmid)
|
||||
amdgpu_amdkfd_flush_gpu_tlb_vmid(dev->kgd,
|
||||
amdgpu_amdkfd_flush_gpu_tlb_vmid(dev->adev,
|
||||
pdd->qpd.vmid);
|
||||
} else {
|
||||
amdgpu_amdkfd_flush_gpu_tlb_pasid(dev->kgd,
|
||||
amdgpu_amdkfd_flush_gpu_tlb_pasid(dev->adev,
|
||||
pdd->process->pasid, type);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1129,7 +1129,6 @@ svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start,
|
|||
DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
|
||||
struct kfd_process_device *pdd;
|
||||
struct dma_fence *fence = NULL;
|
||||
struct amdgpu_device *adev;
|
||||
struct kfd_process *p;
|
||||
uint32_t gpuidx;
|
||||
int r = 0;
|
||||
|
|
@ -1145,9 +1144,9 @@ svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start,
|
|||
pr_debug("failed to find device idx %d\n", gpuidx);
|
||||
return -EINVAL;
|
||||
}
|
||||
adev = (struct amdgpu_device *)pdd->dev->kgd;
|
||||
|
||||
r = svm_range_unmap_from_gpu(adev, drm_priv_to_vm(pdd->drm_priv),
|
||||
r = svm_range_unmap_from_gpu(pdd->dev->adev,
|
||||
drm_priv_to_vm(pdd->drm_priv),
|
||||
start, last, &fence);
|
||||
if (r)
|
||||
break;
|
||||
|
|
@ -1159,7 +1158,7 @@ svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start,
|
|||
if (r)
|
||||
break;
|
||||
}
|
||||
amdgpu_amdkfd_flush_gpu_tlb_pasid((struct kgd_dev *)adev,
|
||||
amdgpu_amdkfd_flush_gpu_tlb_pasid(pdd->dev->adev,
|
||||
p->pasid, TLB_FLUSH_HEAVYWEIGHT);
|
||||
}
|
||||
|
||||
|
|
@ -1243,8 +1242,7 @@ svm_range_map_to_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm,
|
|||
struct kfd_process *p;
|
||||
|
||||
p = container_of(prange->svms, struct kfd_process, svms);
|
||||
amdgpu_amdkfd_flush_gpu_tlb_pasid((struct kgd_dev *)adev,
|
||||
p->pasid, TLB_FLUSH_LEGACY);
|
||||
amdgpu_amdkfd_flush_gpu_tlb_pasid(adev, p->pasid, TLB_FLUSH_LEGACY);
|
||||
}
|
||||
out:
|
||||
return r;
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue