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arm64: dts: apple: t8015: Add PMGR nodes
Add the two PMGR nodes and all known power state subnodes. Since there are a large number of them, put them in a separate file to include. Acked-by: Hector Martin <marcan@marcan.st> Acked-by: Neal Gompa <neal@gompa.dev> Signed-off-by: Nick Chan <towinchenmi@gmail.com> Reviewed-by: Neal Gompa <neal@gompa.dev> Signed-off-by: Sven Peter <sven@svenpeter.dev>
This commit is contained in:
Nick Chan
Sven Peter
parent
576df27a76
commit
68795d7ab0
3 changed files with 953 additions and 0 deletions
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@ -24,6 +24,7 @@
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framebuffer0: framebuffer@0 {
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compatible = "apple,simple-framebuffer", "simple-framebuffer";
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reg = <0 0 0 0>; /* To be filled by loader */
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power-domains = <&ps_disp0_be &ps_mipi_dsi &ps_disp0_hilo &ps_disp0_ppp>;
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/* Format properties will be added by loader */
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status = "disabled";
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};
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931
arch/arm64/boot/dts/apple/t8015-pmgr.dtsi
Normal file
931
arch/arm64/boot/dts/apple/t8015-pmgr.dtsi
Normal file
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@ -0,0 +1,931 @@
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* PMGR Power domains for the Apple T8015 "A11" SoC
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*
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* Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
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*/
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&pmgr {
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ps_cpu0: power-controller@80000 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80000 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "cpu0";
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apple,always-on; /* Core device */
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};
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ps_cpu1: power-controller@80008 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80008 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "cpu1";
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apple,always-on; /* Core device */
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};
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ps_cpu2: power-controller@80010 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80010 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "cpu2";
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apple,always-on; /* Core device */
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};
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ps_cpu3: power-controller@80018 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80018 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "cpu3";
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apple,always-on; /* Core device */
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};
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ps_cpu4: power-controller@80020 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80020 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "cpu4";
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apple,always-on; /* Core device */
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};
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ps_cpu5: power-controller@80028 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80028 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "cpu5";
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apple,always-on; /* Core device */
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};
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ps_cpm: power-controller@80040 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80040 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "cpm";
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apple,always-on; /* Core device */
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};
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ps_sio_busif: power-controller@80158 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80158 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "sio_busif";
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};
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ps_sio_p: power-controller@80160 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80160 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "sio_p";
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power-domains = <&ps_sio_busif>;
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};
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ps_sbr: power-controller@80100 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80100 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "sbr";
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apple,always-on; /* Apple fabric, critical block */
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};
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ps_aic: power-controller@80108 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80108 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "aic";
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apple,always-on; /* Core device */
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};
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ps_dwi: power-controller@80110 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80110 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "dwi";
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};
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ps_gpio: power-controller@80118 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80118 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "gpio";
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};
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ps_pms: power-controller@80120 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80120 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "pms";
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apple,always-on; /* Core device */
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};
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ps_pcie_ref: power-controller@80148 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80148 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "pcie_ref";
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};
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ps_mca0: power-controller@80170 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80170 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "mca0";
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power-domains = <&ps_sio_p>;
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};
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ps_mca1: power-controller@80178 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80178 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "mca1";
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power-domains = <&ps_sio_p>;
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};
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ps_mca2: power-controller@80180 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80180 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "mca2";
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power-domains = <&ps_sio_p>;
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};
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ps_mca3: power-controller@80188 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80188 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "mca3";
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power-domains = <&ps_sio_p>;
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};
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ps_mca4: power-controller@80190 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80190 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "mca4";
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power-domains = <&ps_sio_p>;
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};
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ps_pwm0: power-controller@801a0 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801a0 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "pwm0";
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power-domains = <&ps_sio_p>;
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};
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ps_i2c0: power-controller@801a8 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801a8 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "i2c0";
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power-domains = <&ps_sio_p>;
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};
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ps_i2c1: power-controller@801b0 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801b0 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "i2c1";
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power-domains = <&ps_sio_p>;
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};
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ps_i2c2: power-controller@801b8 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801b8 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "i2c2";
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power-domains = <&ps_sio_p>;
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};
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ps_i2c3: power-controller@801c0 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801c0 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "i2c3";
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power-domains = <&ps_sio_p>;
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};
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ps_spi0: power-controller@801c8 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801c8 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "spi0";
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power-domains = <&ps_sio_p>;
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};
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ps_spi1: power-controller@801d0 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801d0 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "spi1";
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power-domains = <&ps_sio_p>;
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};
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ps_spi2: power-controller@801d8 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801d8 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "spi2";
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power-domains = <&ps_sio_p>;
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};
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ps_spi3: power-controller@801e0 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801e0 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "spi3";
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power-domains = <&ps_sio_p>;
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};
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ps_uart0: power-controller@801e8 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801e8 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "uart0";
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power-domains = <&ps_sio_p>;
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};
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ps_uart1: power-controller@801f0 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801f0 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "uart1";
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power-domains = <&ps_sio_p>;
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};
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ps_uart2: power-controller@801f8 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x801f8 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "uart2";
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power-domains = <&ps_sio_p>;
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};
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ps_sio: power-controller@80168 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80168 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "sio";
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power-domains = <&ps_sio_p>;
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apple,always-on; /* Core device */
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};
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ps_hsicphy: power-controller@80128 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80128 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "hsicphy";
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power-domains = <&ps_usb2host1>;
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};
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ps_ispsens0: power-controller@80130 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80130 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "ispsens0";
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};
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ps_ispsens1: power-controller@80138 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80138 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "ispsens1";
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};
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ps_ispsens2: power-controller@80140 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80140 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "ispsens2";
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};
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ps_mca5: power-controller@80198 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80198 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "mca5";
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power-domains = <&ps_sio_p>;
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};
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ps_usb: power-controller@80270 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80270 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "usb";
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};
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ps_usbctlreg: power-controller@80278 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80278 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "usbctlreg";
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power-domains = <&ps_usb>;
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};
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ps_usb2host0: power-controller@80280 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80280 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "usb2host0";
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power-domains = <&ps_usbctlreg>;
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};
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ps_usb2host1: power-controller@80290 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x80290 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "usb2host1";
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power-domains = <&ps_usbctlreg>;
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};
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ps_rtmux: power-controller@802b0 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x802b0 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "rtmux";
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};
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ps_media: power-controller@802f0 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x802f0 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "media";
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};
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ps_jpg: power-controller@802f8 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x802f8 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "jpg";
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power-domains = <&ps_media>;
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};
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ps_disp0_fe: power-controller@802b8 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x802b8 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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label = "disp0_fe";
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power-domains = <&ps_rtmux>;
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};
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ps_disp0_be: power-controller@802c0 {
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compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x802c0 4>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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||||
label = "disp0_be";
|
||||
power-domains = <&ps_disp0_fe>;
|
||||
};
|
||||
|
||||
ps_disp0_gp: power-controller@802c8 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x802c8 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "disp0_gp";
|
||||
power-domains = <&ps_disp0_be>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ps_uart3: power-controller@80200 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80200 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "uart3";
|
||||
power-domains = <&ps_sio_p>;
|
||||
};
|
||||
|
||||
ps_uart4: power-controller@80208 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80208 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "uart4";
|
||||
power-domains = <&ps_sio_p>;
|
||||
};
|
||||
|
||||
ps_uart5: power-controller@80210 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80210 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "uart5";
|
||||
power-domains = <&ps_sio_p>;
|
||||
};
|
||||
|
||||
ps_uart6: power-controller@80218 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80218 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "uart6";
|
||||
power-domains = <&ps_sio_p>;
|
||||
};
|
||||
|
||||
ps_uart7: power-controller@80220 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80220 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "uart7";
|
||||
power-domains = <&ps_sio_p>;
|
||||
};
|
||||
|
||||
ps_uart8: power-controller@80228 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80228 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "uart8";
|
||||
power-domains = <&ps_sio_p>;
|
||||
};
|
||||
|
||||
ps_hfd0: power-controller@80238 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80238 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "hfd0";
|
||||
power-domains = <&ps_sio_p>;
|
||||
};
|
||||
|
||||
ps_mcc: power-controller@80248 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80248 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "mcc";
|
||||
apple,always-on; /* Memory cache controller */
|
||||
};
|
||||
|
||||
ps_dcs0: power-controller@80250 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80250 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "dcs0";
|
||||
apple,always-on; /* LPDDR4X interface */
|
||||
};
|
||||
|
||||
ps_dcs1: power-controller@80258 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80258 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "dcs1";
|
||||
apple,always-on; /* LPDDR4X interface */
|
||||
};
|
||||
|
||||
ps_dcs2: power-controller@80260 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80260 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "dcs2";
|
||||
apple,always-on; /* LPDDR4X interface */
|
||||
};
|
||||
|
||||
ps_dcs3: power-controller@80268 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80268 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "dcs3";
|
||||
apple,always-on; /* LPDDR4X interface */
|
||||
};
|
||||
|
||||
ps_usb2host0_ohci: power-controller@80288 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80288 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "usb2host0_ohci";
|
||||
power-domains = <&ps_usb2host0>;
|
||||
};
|
||||
|
||||
ps_usb2dev: power-controller@80298 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80298 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "usb2dev";
|
||||
power-domains = <&ps_usbctlreg>;
|
||||
};
|
||||
|
||||
ps_smx: power-controller@802a0 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x802a0 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "smx";
|
||||
apple,always-on; /* Apple fabric, critical block */
|
||||
};
|
||||
|
||||
ps_sf: power-controller@802a8 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x802a8 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "sf";
|
||||
apple,always-on; /* Apple fabric, critical block */
|
||||
};
|
||||
|
||||
ps_mipi_dsi: power-controller@802d8 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x802d8 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "mipi_dsi";
|
||||
power-domains = <&ps_rtmux>;
|
||||
};
|
||||
|
||||
ps_dp: power-controller@802e0 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x802e0 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "dp";
|
||||
power-domains = <&ps_disp0_be>;
|
||||
};
|
||||
|
||||
ps_dpa: power-controller@80230 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80230 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "dpa";
|
||||
};
|
||||
|
||||
ps_disp0_be_2x: power-controller@802d0 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x802d0 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "disp0_be_2x";
|
||||
power-domains = <&ps_disp0_be>;
|
||||
};
|
||||
|
||||
ps_isp_sys: power-controller@80350 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80350 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "isp_sys";
|
||||
power-domains = <&ps_rtmux>;
|
||||
};
|
||||
|
||||
ps_msr: power-controller@80300 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80300 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "msr";
|
||||
power-domains = <&ps_media>;
|
||||
};
|
||||
|
||||
ps_venc_sys: power-controller@80398 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80398 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "venc_sys";
|
||||
power-domains = <&ps_media>;
|
||||
};
|
||||
|
||||
ps_pmp: power-controller@80308 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80308 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "pmp";
|
||||
};
|
||||
|
||||
ps_pms_sram: power-controller@80310 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80310 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "pms_sram";
|
||||
};
|
||||
|
||||
ps_pcie: power-controller@80318 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80318 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "pcie";
|
||||
};
|
||||
|
||||
ps_pcie_aux: power-controller@80320 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80320 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "pcie_aux";
|
||||
};
|
||||
|
||||
ps_vdec0: power-controller@80388 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80388 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "vdec0";
|
||||
power-domains = <&ps_media>;
|
||||
};
|
||||
|
||||
ps_gfx: power-controller@80338 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80338 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "gfx";
|
||||
};
|
||||
|
||||
ps_ans2: power-controller@80328 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80328 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "ans2";
|
||||
apple,always-on;
|
||||
};
|
||||
|
||||
ps_pcie_direct: power-controller@80330 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80330 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "pcie_direct";
|
||||
apple,always-on;
|
||||
};
|
||||
|
||||
ps_avd_sys: power-controller@803a8 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x803a8 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "avd_sys";
|
||||
power-domains = <&ps_media>;
|
||||
};
|
||||
|
||||
ps_sep: power-controller@80400 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80400 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "sep";
|
||||
apple,always-on; /* Locked on */
|
||||
};
|
||||
|
||||
ps_disp0_gp0: power-controller@80830 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80830 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "disp0_gp0";
|
||||
power-domains = <&ps_disp0_gp>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ps_disp0_gp1: power-controller@80838 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80838 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "disp0_gp1";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ps_disp0_ppp: power-controller@80840 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80840 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "disp0_ppp";
|
||||
};
|
||||
|
||||
ps_disp0_hilo: power-controller@80848 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80848 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "disp0_hilo";
|
||||
};
|
||||
|
||||
ps_isp_rsts0: power-controller@84000 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x84000 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "isp_rsts0";
|
||||
power-domains = <&ps_isp_sys>;
|
||||
};
|
||||
|
||||
ps_isp_rsts1: power-controller@84008 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x84008 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "isp_rsts1";
|
||||
power-domains = <&ps_isp_sys>;
|
||||
};
|
||||
|
||||
ps_isp_vis: power-controller@84010 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x84010 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "isp_vis";
|
||||
power-domains = <&ps_isp_sys>;
|
||||
};
|
||||
|
||||
ps_isp_be: power-controller@84018 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x84018 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "isp_be";
|
||||
power-domains = <&ps_isp_sys>;
|
||||
};
|
||||
|
||||
ps_isp_pearl: power-controller@84020 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x84020 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "isp_pearl";
|
||||
power-domains = <&ps_isp_sys>;
|
||||
};
|
||||
|
||||
ps_dprx: power-controller@84028 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x84028 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "dprx";
|
||||
power-domains = <&ps_isp_sys>;
|
||||
};
|
||||
|
||||
ps_isp_cnv: power-controller@84030 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x84030 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "isp_cnv";
|
||||
power-domains = <&ps_isp_sys>;
|
||||
};
|
||||
|
||||
ps_venc_dma: power-controller@88000 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x88000 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "venc_dma";
|
||||
};
|
||||
|
||||
ps_venc_pipe4: power-controller@88010 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x88010 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "venc_pipe4";
|
||||
};
|
||||
|
||||
ps_venc_pipe5: power-controller@88018 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x88018 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "venc_pipe5";
|
||||
};
|
||||
|
||||
ps_venc_me0: power-controller@88020 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x88020 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "venc_me0";
|
||||
};
|
||||
|
||||
ps_venc_me1: power-controller@88028 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x88028 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "venc_me1";
|
||||
};
|
||||
};
|
||||
|
||||
&pmgr_mini {
|
||||
ps_aop_base: power-controller@80008 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80008 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "aop_base";
|
||||
power-domains = <&ps_aop_cpu &ps_aop_filter>;
|
||||
apple,always-on; /* Always on processor */
|
||||
};
|
||||
|
||||
ps_debug: power-controller@80050 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80050 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "debug";
|
||||
};
|
||||
|
||||
ps_aop_cpu: power-controller@80020 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80020 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "aop_cpu";
|
||||
};
|
||||
|
||||
ps_aop_filter: power-controller@80000 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80000 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "aop_filter";
|
||||
};
|
||||
|
||||
ps_spmi: power-controller@80058 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80058 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "spmi";
|
||||
apple,always-on; /* System Power Management Interface */
|
||||
};
|
||||
|
||||
ps_smc_i2cm1: power-controller@800a8 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x800a8 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "smc_i2cm1";
|
||||
};
|
||||
|
||||
ps_smc_fabric: power-controller@80030 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80030 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "smc_fabric";
|
||||
};
|
||||
|
||||
ps_smc_cpu: power-controller@80140 {
|
||||
compatible = "apple,t8015-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x80140 4>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "smc_cpu";
|
||||
power-domains = <&ps_smc_fabric &ps_smc_i2cm1>;
|
||||
};
|
||||
};
|
||||
|
|
@ -119,6 +119,7 @@
|
|||
/* Use the bootloader-enabled clocks for now. */
|
||||
clocks = <&clkref>, <&clkref>;
|
||||
clock-names = "uart", "clk_uart_baud0";
|
||||
power-domains = <&ps_uart0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -127,11 +128,21 @@
|
|||
reg = <0x2 0x32100000 0x0 0x8000>;
|
||||
#interrupt-cells = <3>;
|
||||
interrupt-controller;
|
||||
power-domains = <&ps_aic>;
|
||||
};
|
||||
|
||||
pmgr: power-management@232000000 {
|
||||
compatible = "apple,t8015-pmgr", "apple,pmgr", "syscon", "simple-mfd";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
reg = <0x2 0x32000000 0 0x8c000>;
|
||||
};
|
||||
|
||||
pinctrl_ap: pinctrl@233100000 {
|
||||
compatible = "apple,t8015-pinctrl", "apple,pinctrl";
|
||||
reg = <0x2 0x33100000 0x0 0x1000>;
|
||||
power-domains = <&ps_gpio>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
|
@ -188,6 +199,14 @@
|
|||
<AIC_IRQ 170 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
pmgr_mini: power-management@235200000 {
|
||||
compatible = "apple,t8015-pmgr", "apple,pmgr", "syscon", "simple-mfd";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
reg = <0x2 0x35200000 0 0x84000>;
|
||||
};
|
||||
|
||||
wdt: watchdog@2352b0000 {
|
||||
compatible = "apple,t8015-wdt", "apple,wdt";
|
||||
reg = <0x2 0x352b0000 0x0 0x4000>;
|
||||
|
|
@ -232,3 +251,5 @@
|
|||
<AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
#include "t8015-pmgr.dtsi"
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue