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drm/amd/display: Add 3x4 CTM support for plane CTM

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Create drm_color_ctm_3x4 to support 3x4-dimension plane CTM matrix and
convert DRM CTM to DC CSC float matrix.

v3:
- rename ctm2 to ctm_3x4 (Harry)

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Joshua Ashton 2023-11-16 18:58:12 -01:00 • committed by Alex Deucher
parent 3dad690907
commit 6872a189be
3 changed files with 34 additions and 4 deletions
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28
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
View file

@ -434,6 +434,28 @@ static void __drm_ctm_to_dc_matrix(const struct drm_color_ctm *ctm,
}
}
/**
* __drm_ctm_3x4_to_dc_matrix - converts a DRM CTM 3x4 to a DC CSC float matrix
* @ctm: DRM color transformation matrix with 3x4 dimensions
* @matrix: DC CSC float matrix
*
* The matrix needs to be a 3x4 (12 entry) matrix.
*/
static void __drm_ctm_3x4_to_dc_matrix(const struct drm_color_ctm_3x4 *ctm,
struct fixed31_32 *matrix)
{
int i;
/* The format provided is S31.32, using signed-magnitude representation.
* Our fixed31_32 is also S31.32, but is using 2's complement. We have
* to convert from signed-magnitude to 2's complement.
*/
for (i = 0; i < 12; i++) {
/* gamut_remap_matrix[i] = ctm[i - floor(i/4)] */
matrix[i] = dc_fixpt_from_s3132(ctm->matrix[i]);
}
}
/**
* __set_legacy_tf - Calculates the legacy transfer function
* @func: transfer function
@ -1173,7 +1195,7 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,
{
struct amdgpu_device *adev = drm_to_adev(crtc->base.state->dev);
struct dm_plane_state *dm_plane_state = to_dm_plane_state(plane_state);
struct drm_color_ctm *ctm = NULL;
struct drm_color_ctm_3x4 *ctm = NULL;
struct dc_color_caps *color_caps = NULL;
bool has_crtc_cm_degamma;
int ret;
@ -1228,7 +1250,7 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,
/* Setup CRTC CTM. */
if (dm_plane_state->ctm) {
ctm = (struct drm_color_ctm *)dm_plane_state->ctm->data;
ctm = (struct drm_color_ctm_3x4 *)dm_plane_state->ctm->data;
/*
* DCN2 and older don't support both pre-blending and
* post-blending gamut remap. For this HW family, if we have
@ -1240,7 +1262,7 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,
* mapping CRTC CTM to MPC and keeping plane CTM setup at DPP,
* as it's done by dcn30_program_gamut_remap().
*/
__drm_ctm_to_dc_matrix(ctm, dc_plane_state->gamut_remap_matrix.matrix);
__drm_ctm_3x4_to_dc_matrix(ctm, dc_plane_state->gamut_remap_matrix.matrix);
dc_plane_state->gamut_remap_matrix.enable_remap = true;
dc_plane_state->input_csc_color_matrix.enable_adjustment = false;

2
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
View file

@ -1561,7 +1561,7 @@ dm_atomic_plane_set_property(struct drm_plane *plane,
ret = drm_property_replace_blob_from_id(plane->dev,
&dm_plane_state->ctm,
val,
sizeof(struct drm_color_ctm), -1,
sizeof(struct drm_color_ctm_3x4), -1,
&replaced);
dm_plane_state->base.color_mgmt_changed |= replaced;
return ret;

8
include/uapi/drm/drm_mode.h
View file

@ -846,6 +846,14 @@ struct drm_color_ctm {
__u64 matrix[9];
};
struct drm_color_ctm_3x4 {
/*
* Conversion matrix with 3x4 dimensions in S31.32 sign-magnitude
* (not two's complement!) format.
*/
__u64 matrix[12];
};
struct drm_color_lut {
/*
* Values are mapped linearly to 0.0 - 1.0 range, with 0x0 == 0.0 and