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iio: adc: ad4695: add offload-based oversampling support
Add support for the ad4695's oversampling feature when SPI offload is available. This allows the ad4695 to set oversampling ratios on a per-channel basis, raising the effective-number-of-bits from 16 (OSR == 1) to 17 (4), 18 (16), or 19 (64) for a given sample (i.e. one full cycle through the auto-sequencer). The logic for reading and writing sampling frequency for a given channel is also adjusted based on the current oversampling ratio. The non-offload case isn't supported as there isn't a good way to trigger the CNV pin in this mode. Support could be added in the future if a use-case arises. Signed-off-by: Trevor Gamblin <tgamblin@baylibre.com> Reviewed-by: Nuno Sa <nuno.sa@analog.com> Tested-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250109-ad4695-oversampling-v2-1-a46ac487082c@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Trevor Gamblin
Jonathan Cameron
parent
192b669b93
commit
67d63185db
1 changed files with 302 additions and 29 deletions
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@ -79,6 +79,7 @@
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#define AD4695_REG_CONFIG_IN_MODE BIT(6)
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#define AD4695_REG_CONFIG_IN_PAIR GENMASK(5, 4)
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#define AD4695_REG_CONFIG_IN_AINHIGHZ_EN BIT(3)
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#define AD4695_REG_CONFIG_IN_OSR_SET GENMASK(1, 0)
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#define AD4695_REG_UPPER_IN(n) (0x0040 | (2 * (n)))
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#define AD4695_REG_LOWER_IN(n) (0x0060 | (2 * (n)))
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#define AD4695_REG_HYST_IN(n) (0x0080 | (2 * (n)))
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@ -127,6 +128,7 @@ struct ad4695_channel_config {
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bool bipolar;
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enum ad4695_in_pair pin_pairing;
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unsigned int common_mode_mv;
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unsigned int oversampling_ratio;
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};
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struct ad4695_state {
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@ -306,6 +308,65 @@ static const struct regmap_bus ad4695_regmap_bus = {
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.val_format_endian_default = REGMAP_ENDIAN_BIG,
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};
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enum {
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AD4695_SCAN_TYPE_OSR_1,
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AD4695_SCAN_TYPE_OSR_4,
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AD4695_SCAN_TYPE_OSR_16,
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AD4695_SCAN_TYPE_OSR_64,
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};
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static const struct iio_scan_type ad4695_scan_type_offload_u[] = {
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[AD4695_SCAN_TYPE_OSR_1] = {
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.sign = 'u',
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.realbits = 16,
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.shift = 3,
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.storagebits = 32,
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},
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[AD4695_SCAN_TYPE_OSR_4] = {
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.sign = 'u',
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.realbits = 17,
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.shift = 2,
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.storagebits = 32,
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},
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[AD4695_SCAN_TYPE_OSR_16] = {
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.sign = 'u',
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.realbits = 18,
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.shift = 1,
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.storagebits = 32,
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},
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[AD4695_SCAN_TYPE_OSR_64] = {
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.sign = 'u',
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.realbits = 19,
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.storagebits = 32,
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},
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};
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static const struct iio_scan_type ad4695_scan_type_offload_s[] = {
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[AD4695_SCAN_TYPE_OSR_1] = {
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.sign = 's',
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.realbits = 16,
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.shift = 3,
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.storagebits = 32,
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},
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[AD4695_SCAN_TYPE_OSR_4] = {
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.sign = 's',
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.realbits = 17,
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.shift = 2,
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.storagebits = 32,
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},
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[AD4695_SCAN_TYPE_OSR_16] = {
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.sign = 's',
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.realbits = 18,
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.shift = 1,
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.storagebits = 32,
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},
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[AD4695_SCAN_TYPE_OSR_64] = {
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.sign = 's',
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.realbits = 19,
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.storagebits = 32,
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},
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};
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static const struct iio_chan_spec ad4695_channel_template = {
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.type = IIO_VOLTAGE,
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.indexed = 1,
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@ -343,6 +404,10 @@ static const char * const ad4695_power_supplies[] = {
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"avdd", "vio"
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};
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static const int ad4695_oversampling_ratios[] = {
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1, 4, 16, 64,
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};
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static const struct ad4695_chip_info ad4695_chip_info = {
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.name = "ad4695",
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.max_sample_rate = 500 * KILO,
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@ -519,6 +584,29 @@ static int ad4695_set_ref_voltage(struct ad4695_state *st, int vref_mv)
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FIELD_PREP(AD4695_REG_REF_CTRL_VREF_SET, val));
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}
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/**
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* ad4695_osr_to_regval - convert ratio to OSR register value
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* @ratio: ratio to check
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*
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* Check if ratio is present in the list of available ratios and return
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* the corresponding value that needs to be written to the register to
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* select that ratio.
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*
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* Returns: register value (0 to 3) or -EINVAL if there is not an exact
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* match
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*/
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static int ad4695_osr_to_regval(int ratio)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(ad4695_oversampling_ratios); i++) {
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if (ratio == ad4695_oversampling_ratios[i])
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return i;
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}
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return -EINVAL;
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}
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static int ad4695_write_chn_cfg(struct ad4695_state *st,
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struct ad4695_channel_config *cfg)
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{
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@ -946,10 +1034,18 @@ static int ad4695_read_raw(struct iio_dev *indio_dev,
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int *val, int *val2, long mask)
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{
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struct ad4695_state *st = iio_priv(indio_dev);
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const struct iio_scan_type *scan_type;
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struct ad4695_channel_config *cfg = &st->channels_cfg[chan->scan_index];
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u8 realbits = chan->scan_type.realbits;
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unsigned int osr = st->channels_cfg[chan->scan_index].oversampling_ratio;
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unsigned int reg_val;
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int ret, tmp;
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u8 realbits;
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scan_type = iio_get_current_scan_type(indio_dev, chan);
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if (IS_ERR(scan_type))
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return PTR_ERR(scan_type);
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realbits = scan_type->realbits;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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@ -958,7 +1054,7 @@ static int ad4695_read_raw(struct iio_dev *indio_dev,
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if (ret)
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return ret;
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if (chan->scan_type.sign == 's')
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if (scan_type->sign == 's')
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*val = sign_extend32(st->raw_data, realbits - 1);
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else
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*val = st->raw_data;
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@ -970,7 +1066,7 @@ static int ad4695_read_raw(struct iio_dev *indio_dev,
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switch (chan->type) {
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case IIO_VOLTAGE:
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*val = st->vref_mv;
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*val2 = chan->scan_type.realbits;
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*val2 = realbits;
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return IIO_VAL_FRACTIONAL_LOG2;
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case IIO_TEMP:
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/* T_scale (°C) = raw * V_REF (mV) / (-1.8 mV/°C * 2^16) */
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@ -1031,8 +1127,26 @@ static int ad4695_read_raw(struct iio_dev *indio_dev,
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tmp = sign_extend32(reg_val, 15);
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*val = tmp / 4;
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*val2 = abs(tmp) % 4 * MICRO / 4;
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switch (cfg->oversampling_ratio) {
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case 1:
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*val = tmp / 4;
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*val2 = abs(tmp) % 4 * MICRO / 4;
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break;
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case 4:
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*val = tmp / 2;
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*val2 = abs(tmp) % 2 * MICRO / 2;
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break;
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case 16:
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*val = tmp;
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*val2 = 0;
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break;
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case 64:
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*val = tmp * 2;
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*val2 = 0;
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break;
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default:
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return -EINVAL;
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}
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if (tmp < 0 && *val2) {
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*val *= -1;
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@ -1045,6 +1159,14 @@ static int ad4695_read_raw(struct iio_dev *indio_dev,
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default:
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return -EINVAL;
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}
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case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
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switch (chan->type) {
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case IIO_VOLTAGE:
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*val = st->channels_cfg[chan->scan_index].oversampling_ratio;
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return IIO_VAL_INT;
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default:
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return -EINVAL;
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}
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case IIO_CHAN_INFO_SAMP_FREQ: {
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struct pwm_state state;
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@ -1052,7 +1174,11 @@ static int ad4695_read_raw(struct iio_dev *indio_dev,
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if (ret)
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return ret;
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*val = DIV_ROUND_UP_ULL(NSEC_PER_SEC, state.period);
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/*
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* The effective sampling frequency for a channel is the input
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* frequency divided by the channel's OSR value.
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*/
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*val = DIV_ROUND_UP_ULL(NSEC_PER_SEC, state.period * osr);
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return IIO_VAL_INT;
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}
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@ -1073,12 +1199,69 @@ static int ad4695_write_raw_get_fmt(struct iio_dev *indio_dev,
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}
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}
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static int ad4695_set_osr_val(struct ad4695_state *st,
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struct iio_chan_spec const *chan,
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int val)
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{
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int osr = ad4695_osr_to_regval(val);
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if (osr < 0)
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return osr;
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switch (chan->type) {
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case IIO_VOLTAGE:
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st->channels_cfg[chan->scan_index].oversampling_ratio = val;
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return regmap_update_bits(st->regmap,
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AD4695_REG_CONFIG_IN(chan->scan_index),
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AD4695_REG_CONFIG_IN_OSR_SET,
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FIELD_PREP(AD4695_REG_CONFIG_IN_OSR_SET, osr));
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default:
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return -EINVAL;
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}
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}
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static unsigned int ad4695_get_calibbias(int val, int val2, int osr)
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{
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int val_calc, scale;
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switch (osr) {
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case 4:
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scale = 4;
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break;
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case 16:
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scale = 2;
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break;
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case 64:
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scale = 1;
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break;
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default:
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scale = 8;
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break;
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}
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val = clamp_t(int, val, S32_MIN / 8, S32_MAX / 8);
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/* val2 range is (-MICRO, MICRO) if val == 0, otherwise [0, MICRO) */
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if (val < 0)
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val_calc = val * scale - val2 * scale / MICRO;
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else if (val2 < 0)
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/* if val2 < 0 then val == 0 */
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val_calc = val2 * scale / (int)MICRO;
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else
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val_calc = val * scale + val2 * scale / MICRO;
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val_calc /= 2;
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return clamp_t(int, val_calc, S16_MIN, S16_MAX);
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}
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static int ad4695_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long mask)
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{
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struct ad4695_state *st = iio_priv(indio_dev);
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unsigned int reg_val;
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unsigned int osr = st->channels_cfg[chan->scan_index].oversampling_ratio;
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iio_device_claim_direct_scoped(return -EBUSY, indio_dev) {
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switch (mask) {
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@ -1103,23 +1286,7 @@ static int ad4695_write_raw(struct iio_dev *indio_dev,
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case IIO_CHAN_INFO_CALIBBIAS:
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switch (chan->type) {
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case IIO_VOLTAGE:
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if (val2 >= 0 && val > S16_MAX / 4)
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reg_val = S16_MAX;
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else if ((val2 < 0 ? -val : val) < S16_MIN / 4)
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reg_val = S16_MIN;
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else if (val2 < 0)
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reg_val = clamp_t(int,
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-(val * 4 + -val2 * 4 / MICRO),
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S16_MIN, S16_MAX);
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else if (val < 0)
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reg_val = clamp_t(int,
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val * 4 - val2 * 4 / MICRO,
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S16_MIN, S16_MAX);
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else
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reg_val = clamp_t(int,
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val * 4 + val2 * 4 / MICRO,
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S16_MIN, S16_MAX);
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reg_val = ad4695_get_calibbias(val, val2, osr);
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return regmap_write(st->regmap16,
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AD4695_REG_OFFSET_IN(chan->scan_index),
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reg_val);
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@ -1128,15 +1295,27 @@ static int ad4695_write_raw(struct iio_dev *indio_dev,
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}
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case IIO_CHAN_INFO_SAMP_FREQ: {
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struct pwm_state state;
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/*
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* Limit the maximum acceptable sample rate according to
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* the channel's oversampling ratio.
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*/
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u64 max_osr_rate = DIV_ROUND_UP_ULL(st->chip_info->max_sample_rate,
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osr);
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if (val <= 0 || val > st->chip_info->max_sample_rate)
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if (val <= 0 || val > max_osr_rate)
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return -EINVAL;
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guard(mutex)(&st->cnv_pwm_lock);
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pwm_get_state(st->cnv_pwm, &state);
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state.period = DIV_ROUND_UP_ULL(NSEC_PER_SEC, val);
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/*
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* The required sample frequency for a given OSR is the
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* input frequency multiplied by it.
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*/
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state.period = DIV_ROUND_UP_ULL(NSEC_PER_SEC, val * osr);
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return pwm_apply_might_sleep(st->cnv_pwm, &state);
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}
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case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
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return ad4695_set_osr_val(st, chan, val);
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default:
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return -EINVAL;
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}
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@ -1149,18 +1328,40 @@ static int ad4695_read_avail(struct iio_dev *indio_dev,
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const int **vals, int *type, int *length,
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long mask)
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{
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int ret;
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static const int ad4695_calibscale_available[6] = {
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/* Range of 0 (inclusive) to 2 (exclusive) */
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0, 15, 1, 15, U16_MAX, 15
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};
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static const int ad4695_calibbias_available[6] = {
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static const int ad4695_calibbias_available[4][6] = {
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/*
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* Datasheet says FSR/8 which translates to signed/4. The step
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* depends on oversampling ratio which is always 1 for now.
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* depends on oversampling ratio, so we need four different
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* ranges to select from.
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*/
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S16_MIN / 4, 0, 0, MICRO / 4, S16_MAX / 4, S16_MAX % 4 * MICRO / 4
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{
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S16_MIN / 4, 0,
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0, MICRO / 4,
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S16_MAX / 4, S16_MAX % 4 * MICRO / 4
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},
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{
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S16_MIN / 2, 0,
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0, MICRO / 2,
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S16_MAX / 2, S16_MAX % 2 * MICRO / 2,
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},
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{
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S16_MIN, 0,
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1, 0,
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S16_MAX, 0,
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},
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{
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S16_MIN * 2, 0,
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2, 0,
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S16_MAX * 2, 0,
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},
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};
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struct ad4695_state *st = iio_priv(indio_dev);
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unsigned int osr = st->channels_cfg[chan->scan_index].oversampling_ratio;
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switch (mask) {
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case IIO_CHAN_INFO_CALIBSCALE:
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@ -1175,16 +1376,36 @@ static int ad4695_read_avail(struct iio_dev *indio_dev,
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case IIO_CHAN_INFO_CALIBBIAS:
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switch (chan->type) {
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case IIO_VOLTAGE:
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*vals = ad4695_calibbias_available;
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ret = ad4695_osr_to_regval(osr);
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if (ret < 0)
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return ret;
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/*
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* Select the appropriate calibbias array based on the
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* OSR value in the register.
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*/
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*vals = ad4695_calibbias_available[ret];
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*type = IIO_VAL_INT_PLUS_MICRO;
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return IIO_AVAIL_RANGE;
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default:
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return -EINVAL;
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}
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case IIO_CHAN_INFO_SAMP_FREQ:
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/* Max sample rate for the channel depends on OSR */
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st->sample_freq_range[2] =
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DIV_ROUND_UP_ULL(st->chip_info->max_sample_rate, osr);
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*vals = st->sample_freq_range;
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*type = IIO_VAL_INT;
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return IIO_AVAIL_RANGE;
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case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
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switch (chan->type) {
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case IIO_VOLTAGE:
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*vals = ad4695_oversampling_ratios;
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*length = ARRAY_SIZE(ad4695_oversampling_ratios);
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*type = IIO_VAL_INT;
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return IIO_AVAIL_LIST;
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default:
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return -EINVAL;
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}
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default:
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return -EINVAL;
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}
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@ -1218,6 +1439,26 @@ static int ad4695_debugfs_reg_access(struct iio_dev *indio_dev,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
static int ad4695_get_current_scan_type(const struct iio_dev *indio_dev,
|
||||
const struct iio_chan_spec *chan)
|
||||
{
|
||||
struct ad4695_state *st = iio_priv(indio_dev);
|
||||
unsigned int osr = st->channels_cfg[chan->scan_index].oversampling_ratio;
|
||||
|
||||
switch (osr) {
|
||||
case 1:
|
||||
return AD4695_SCAN_TYPE_OSR_1;
|
||||
case 4:
|
||||
return AD4695_SCAN_TYPE_OSR_4;
|
||||
case 16:
|
||||
return AD4695_SCAN_TYPE_OSR_16;
|
||||
case 64:
|
||||
return AD4695_SCAN_TYPE_OSR_64;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
static const struct iio_info ad4695_info = {
|
||||
.read_raw = &ad4695_read_raw,
|
||||
.write_raw_get_fmt = &ad4695_write_raw_get_fmt,
|
||||
|
|
@ -1226,6 +1467,15 @@ static const struct iio_info ad4695_info = {
|
|||
.debugfs_reg_access = &ad4695_debugfs_reg_access,
|
||||
};
|
||||
|
||||
static const struct iio_info ad4695_offload_info = {
|
||||
.read_raw = &ad4695_read_raw,
|
||||
.write_raw_get_fmt = &ad4695_write_raw_get_fmt,
|
||||
.write_raw = &ad4695_write_raw,
|
||||
.get_current_scan_type = &ad4695_get_current_scan_type,
|
||||
.read_avail = &ad4695_read_avail,
|
||||
.debugfs_reg_access = &ad4695_debugfs_reg_access,
|
||||
};
|
||||
|
||||
static int ad4695_parse_channel_cfg(struct ad4695_state *st)
|
||||
{
|
||||
struct device *dev = &st->spi->dev;
|
||||
|
|
@ -1241,6 +1491,9 @@ static int ad4695_parse_channel_cfg(struct ad4695_state *st)
|
|||
chan_cfg->highz_en = true;
|
||||
chan_cfg->channel = i;
|
||||
|
||||
/* This is the default OSR after reset */
|
||||
chan_cfg->oversampling_ratio = 1;
|
||||
|
||||
*iio_chan = ad4695_channel_template;
|
||||
iio_chan->channel = i;
|
||||
iio_chan->scan_index = i;
|
||||
|
|
@ -1409,6 +1662,7 @@ static int ad4695_probe_spi_offload(struct iio_dev *indio_dev,
|
|||
struct dma_chan *rx_dma;
|
||||
int ret, i;
|
||||
|
||||
indio_dev->info = &ad4695_offload_info;
|
||||
indio_dev->num_channels = st->chip_info->num_voltage_inputs + 1;
|
||||
indio_dev->setup_ops = &ad4695_offload_buffer_setup_ops;
|
||||
|
||||
|
|
@ -1459,6 +1713,7 @@ static int ad4695_probe_spi_offload(struct iio_dev *indio_dev,
|
|||
|
||||
for (i = 0; i < indio_dev->num_channels; i++) {
|
||||
struct iio_chan_spec *chan = &st->iio_chan[i];
|
||||
struct ad4695_channel_config *cfg = &st->channels_cfg[i];
|
||||
|
||||
/*
|
||||
* NB: When using offload support, all channels need to have the
|
||||
|
|
@ -1474,6 +1729,24 @@ static int ad4695_probe_spi_offload(struct iio_dev *indio_dev,
|
|||
/* add sample frequency for PWM CNV trigger */
|
||||
chan->info_mask_separate |= BIT(IIO_CHAN_INFO_SAMP_FREQ);
|
||||
chan->info_mask_separate_available |= BIT(IIO_CHAN_INFO_SAMP_FREQ);
|
||||
|
||||
/* Add the oversampling properties only for voltage channels */
|
||||
if (chan->type != IIO_VOLTAGE)
|
||||
continue;
|
||||
|
||||
chan->info_mask_separate |= BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO);
|
||||
chan->info_mask_separate_available |=
|
||||
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO);
|
||||
chan->has_ext_scan_type = 1;
|
||||
if (cfg->bipolar) {
|
||||
chan->ext_scan_type = ad4695_scan_type_offload_s;
|
||||
chan->num_ext_scan_type =
|
||||
ARRAY_SIZE(ad4695_scan_type_offload_s);
|
||||
} else {
|
||||
chan->ext_scan_type = ad4695_scan_type_offload_u;
|
||||
chan->num_ext_scan_type =
|
||||
ARRAY_SIZE(ad4695_scan_type_offload_u);
|
||||
}
|
||||
}
|
||||
|
||||
return devm_iio_dmaengine_buffer_setup_with_handle(dev, indio_dev,
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue