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arm64: dts: imx8qxp: add GPU nodes
Add the DT node for the GPU core found on the i.MX8QXP. etnaviv-gpu 53100000.gpu: model: GC7000, revision: 6214 [drm] Initialized etnaviv 1.3.0 20151214 for etnaviv on minor 0 Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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2 changed files with 28 additions and 0 deletions
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arch/arm64/boot/dts/freescale/imx8-ss-gpu0.dtsi
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arch/arm64/boot/dts/freescale/imx8-ss-gpu0.dtsi
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2019 NXP
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* Dong Aisheng <aisheng.dong@nxp.com>
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*/
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#include <dt-bindings/firmware/imx/rsrc.h>
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gpu0_subsys: bus@53000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x53000000 0x0 0x53000000 0x1000000>;
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gpu_3d0: gpu@53100000 {
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compatible = "vivante,gc";
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reg = <0x53100000 0x40000>;
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX_SC_R_GPU_0_PID0 IMX_SC_PM_CLK_PER>,
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<&clk IMX_SC_R_GPU_0_PID0 IMX_SC_PM_CLK_MISC>;
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clock-names = "core", "shader";
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assigned-clocks = <&clk IMX_SC_R_GPU_0_PID0 IMX_SC_PM_CLK_PER>,
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<&clk IMX_SC_R_GPU_0_PID0 IMX_SC_PM_CLK_MISC>;
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assigned-clock-rates = <700000000>, <850000000>;
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power-domains = <&pd IMX_SC_R_GPU_0_PID0>;
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};
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};
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@ -317,6 +317,7 @@
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/* sorted in register address */
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#include "imx8-ss-img.dtsi"
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#include "imx8-ss-vpu.dtsi"
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#include "imx8-ss-gpu0.dtsi"
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#include "imx8-ss-adma.dtsi"
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#include "imx8-ss-conn.dtsi"
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#include "imx8-ss-ddr.dtsi"
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