gpio: davinci: don't create irq_domain in case of unbanked irqs

The system may crash if:
- there are more than 1 banks
- unbanked irqs are enabled
- someone will call gpio_to_irq() for GPIO from bank2 or above

Hence, fix it by not creating irq_domain if unbanked irqs are enabled
and correct gpio_to_irq_banked() to handle this properly.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Sekhar Nori <nsekhar@ti.com>

Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This commit is contained in:
Grygorii Strashko 2013-12-18 12:07:51 +02:00 committed by Sekhar Nori
parent 0d978eb734
commit 6075a8b2b6

View file

@ -351,7 +351,10 @@ static int gpio_to_irq_banked(struct gpio_chip *chip, unsigned offset)
{ {
struct davinci_gpio_controller *d = chip2controller(chip); struct davinci_gpio_controller *d = chip2controller(chip);
return irq_create_mapping(d->irq_domain, d->chip.base + offset); if (d->irq_domain)
return irq_create_mapping(d->irq_domain, d->chip.base + offset);
else
return -ENXIO;
} }
static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset) static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset)
@ -429,7 +432,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
struct davinci_gpio_controller *chips = platform_get_drvdata(pdev); struct davinci_gpio_controller *chips = platform_get_drvdata(pdev);
struct davinci_gpio_platform_data *pdata = dev->platform_data; struct davinci_gpio_platform_data *pdata = dev->platform_data;
struct davinci_gpio_regs __iomem *g; struct davinci_gpio_regs __iomem *g;
struct irq_domain *irq_domain; struct irq_domain *irq_domain = NULL;
ngpio = pdata->ngpio; ngpio = pdata->ngpio;
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
@ -453,18 +456,20 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
} }
clk_prepare_enable(clk); clk_prepare_enable(clk);
irq = irq_alloc_descs(-1, 0, ngpio, 0); if (!pdata->gpio_unbanked) {
if (irq < 0) { irq = irq_alloc_descs(-1, 0, ngpio, 0);
dev_err(dev, "Couldn't allocate IRQ numbers\n"); if (irq < 0) {
return irq; dev_err(dev, "Couldn't allocate IRQ numbers\n");
} return irq;
}
irq_domain = irq_domain_add_legacy(NULL, ngpio, irq, 0, irq_domain = irq_domain_add_legacy(NULL, ngpio, irq, 0,
&davinci_gpio_irq_ops, &davinci_gpio_irq_ops,
chips); chips);
if (!irq_domain) { if (!irq_domain) {
dev_err(dev, "Couldn't register an IRQ domain\n"); dev_err(dev, "Couldn't register an IRQ domain\n");
return -ENODEV; return -ENODEV;
}
} }
/* /*
@ -475,8 +480,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
*/ */
for (gpio = 0, bank = 0; gpio < ngpio; bank++, gpio += 32) { for (gpio = 0, bank = 0; gpio < ngpio; bank++, gpio += 32) {
chips[bank].chip.to_irq = gpio_to_irq_banked; chips[bank].chip.to_irq = gpio_to_irq_banked;
if (!pdata->gpio_unbanked) chips[bank].irq_domain = irq_domain;
chips[bank].irq_domain = irq_domain;
} }
/* /*