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riscv: use local label names instead of global ones in assembly
Local labels should be prefix by '.L' or they'll be exported in the
symbol table. Additionally, this messes up the backtrace by displaying
an incorrect symbol:
...
[ 12.751810] [<ffffffff80441628>] _copy_from_user+0x28/0xc2
[ 12.752035] [<ffffffff800152ca>] handle_misaligned_load+0x1ca/0x2fc
[ 12.752310] [<ffffffff80a033e8>] do_trap_load_misaligned+0x24/0xee
[ 12.752596] [<ffffffff80a0dcae>] _new_vmalloc_restore_context_a0+0xc2/0xce
After:
...
[ 10.243916] [<ffffffff804415e4>] _copy_from_user+0x28/0xc2
[ 10.244026] [<ffffffff800152ca>] handle_misaligned_load+0x1ca/0x2fc
[ 10.244150] [<ffffffff80a033a0>] do_trap_load_misaligned+0x24/0xee
[ 10.244268] [<ffffffff80a0dc66>] handle_exception+0x146/0x152
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Fixes: 503638e0ba
("riscv: Stop emitting preventive sfence.vma for new vmalloc mappings")
Link: https://lore.kernel.org/r/20250103141814.508865-1-cleger@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
parent
40e6073e76
commit
5cd900b8b7
1 changed files with 10 additions and 10 deletions
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@ -23,21 +23,21 @@
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REG_S a0, TASK_TI_A0(tp)
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csrr a0, CSR_CAUSE
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/* Exclude IRQs */
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blt a0, zero, _new_vmalloc_restore_context_a0
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blt a0, zero, .Lnew_vmalloc_restore_context_a0
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REG_S a1, TASK_TI_A1(tp)
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/* Only check new_vmalloc if we are in page/protection fault */
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li a1, EXC_LOAD_PAGE_FAULT
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beq a0, a1, _new_vmalloc_kernel_address
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beq a0, a1, .Lnew_vmalloc_kernel_address
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li a1, EXC_STORE_PAGE_FAULT
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beq a0, a1, _new_vmalloc_kernel_address
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beq a0, a1, .Lnew_vmalloc_kernel_address
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li a1, EXC_INST_PAGE_FAULT
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bne a0, a1, _new_vmalloc_restore_context_a1
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bne a0, a1, .Lnew_vmalloc_restore_context_a1
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_new_vmalloc_kernel_address:
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.Lnew_vmalloc_kernel_address:
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/* Is it a kernel address? */
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csrr a0, CSR_TVAL
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bge a0, zero, _new_vmalloc_restore_context_a1
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bge a0, zero, .Lnew_vmalloc_restore_context_a1
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/* Check if a new vmalloc mapping appeared that could explain the trap */
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REG_S a2, TASK_TI_A2(tp)
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@ -69,7 +69,7 @@ _new_vmalloc_kernel_address:
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/* Check the value of new_vmalloc for this cpu */
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REG_L a2, 0(a0)
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and a2, a2, a1
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beq a2, zero, _new_vmalloc_restore_context
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beq a2, zero, .Lnew_vmalloc_restore_context
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/* Atomically reset the current cpu bit in new_vmalloc */
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amoxor.d a0, a1, (a0)
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@ -83,11 +83,11 @@ _new_vmalloc_kernel_address:
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csrw CSR_SCRATCH, x0
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sret
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_new_vmalloc_restore_context:
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.Lnew_vmalloc_restore_context:
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REG_L a2, TASK_TI_A2(tp)
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_new_vmalloc_restore_context_a1:
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.Lnew_vmalloc_restore_context_a1:
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REG_L a1, TASK_TI_A1(tp)
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_new_vmalloc_restore_context_a0:
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.Lnew_vmalloc_restore_context_a0:
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REG_L a0, TASK_TI_A0(tp)
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.endm
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