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arm64: el2_setup.h: Rename some labels to be more diff-friendly
A minor anti-pattern has established itself in __init_el2_fgt, where each block of instructions is skipped by jumping to a label named for the next (typically unrelated) block. This makes diffs more noisy than necessary, since appending each new block to deal with some new architecture feature now requires altering a branch destination in the existing code. Fix it by naming the affected labels based on the block that is skipping itself instead, as is done elsewhere in the el2_setup code. No functional change. Signed-off-by: Dave Martin <Dave.Martin@arm.com> Link: https://lore.kernel.org/r/20240729162542.367059-1-Dave.Martin@arm.com Signed-off-by: Will Deacon <will@kernel.org>
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1 changed files with 10 additions and 7 deletions
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@ -165,42 +165,45 @@
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mrs x1, id_aa64dfr0_el1
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ubfx x1, x1, #ID_AA64DFR0_EL1_PMSVer_SHIFT, #4
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cmp x1, #3
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b.lt .Lset_debug_fgt_\@
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b.lt .Lskip_spe_fgt_\@
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/* Disable PMSNEVFR_EL1 read and write traps */
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orr x0, x0, #(1 << 62)
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.Lset_debug_fgt_\@:
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.Lskip_spe_fgt_\@:
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msr_s SYS_HDFGRTR_EL2, x0
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msr_s SYS_HDFGWTR_EL2, x0
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mov x0, xzr
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mrs x1, id_aa64pfr1_el1
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ubfx x1, x1, #ID_AA64PFR1_EL1_SME_SHIFT, #4
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cbz x1, .Lset_pie_fgt_\@
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cbz x1, .Lskip_debug_fgt_\@
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/* Disable nVHE traps of TPIDR2 and SMPRI */
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orr x0, x0, #HFGxTR_EL2_nSMPRI_EL1_MASK
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orr x0, x0, #HFGxTR_EL2_nTPIDR2_EL0_MASK
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.Lset_pie_fgt_\@:
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.Lskip_debug_fgt_\@:
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mrs_s x1, SYS_ID_AA64MMFR3_EL1
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ubfx x1, x1, #ID_AA64MMFR3_EL1_S1PIE_SHIFT, #4
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cbz x1, .Lset_fgt_\@
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cbz x1, .Lskip_pie_fgt_\@
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/* Disable trapping of PIR_EL1 / PIRE0_EL1 */
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orr x0, x0, #HFGxTR_EL2_nPIR_EL1
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orr x0, x0, #HFGxTR_EL2_nPIRE0_EL1
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.Lset_fgt_\@:
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.Lskip_pie_fgt_\@:
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msr_s SYS_HFGRTR_EL2, x0
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msr_s SYS_HFGWTR_EL2, x0
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msr_s SYS_HFGITR_EL2, xzr
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mrs x1, id_aa64pfr0_el1 // AMU traps UNDEF without AMU
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ubfx x1, x1, #ID_AA64PFR0_EL1_AMU_SHIFT, #4
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cbz x1, .Lskip_fgt_\@
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cbz x1, .Lskip_amu_fgt_\@
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msr_s SYS_HAFGRTR_EL2, xzr
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.Lskip_amu_fgt_\@:
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.Lskip_fgt_\@:
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.endm
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