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	drm/nouveau/core: remove pmc_enable argument from subdev ctor
These are now specified directly in the MC subdev. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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					 74 changed files with 62 additions and 139 deletions
				
			
		|  | @ -38,11 +38,9 @@ struct nvkm_engine_func { | |||
| }; | ||||
| 
 | ||||
| int nvkm_engine_ctor(const struct nvkm_engine_func *, struct nvkm_device *, | ||||
| 		     int index, u32 pmc_enable, bool enable, | ||||
| 		     struct nvkm_engine *); | ||||
| 		     int index, bool enable, struct nvkm_engine *); | ||||
| int nvkm_engine_new_(const struct nvkm_engine_func *, struct nvkm_device *, | ||||
| 		     int index, u32 pmc_enable, bool enable, | ||||
| 		     struct nvkm_engine **); | ||||
| 		     int index, bool enable, struct nvkm_engine **); | ||||
| struct nvkm_engine *nvkm_engine_ref(struct nvkm_engine *); | ||||
| void nvkm_engine_unref(struct nvkm_engine **); | ||||
| void nvkm_engine_tile(struct nvkm_engine *, int region); | ||||
|  |  | |||
|  | @ -6,7 +6,6 @@ struct nvkm_subdev { | |||
| 	const struct nvkm_subdev_func *func; | ||||
| 	struct nvkm_device *device; | ||||
| 	enum nvkm_devidx index; | ||||
| 	u32 pmc_enable; | ||||
| 	struct mutex mutex; | ||||
| 	u32 debug; | ||||
| 
 | ||||
|  | @ -24,7 +23,7 @@ struct nvkm_subdev_func { | |||
| 
 | ||||
| extern const char *nvkm_subdev_name[NVKM_SUBDEV_NR]; | ||||
| void nvkm_subdev_ctor(const struct nvkm_subdev_func *, struct nvkm_device *, | ||||
| 		      int index, u32 pmc_enable, struct nvkm_subdev *); | ||||
| 		      int index, struct nvkm_subdev *); | ||||
| void nvkm_subdev_del(struct nvkm_subdev **); | ||||
| int  nvkm_subdev_preinit(struct nvkm_subdev *); | ||||
| int  nvkm_subdev_init(struct nvkm_subdev *); | ||||
|  |  | |||
|  | @ -40,7 +40,6 @@ struct nvkm_falcon_func { | |||
| 		u32 *data; | ||||
| 		u32  size; | ||||
| 	} data; | ||||
| 	u32 pmc_enable; | ||||
| 	void (*init)(struct nvkm_falcon *); | ||||
| 	void (*intr)(struct nvkm_falcon *, struct nvkm_fifo_chan *); | ||||
| 	struct nvkm_sclass sclass[]; | ||||
|  |  | |||
|  | @ -15,7 +15,6 @@ int nvkm_xtensa_new_(const struct nvkm_xtensa_func *, struct nvkm_device *, | |||
| 		     int index, bool enable, u32 addr, struct nvkm_engine **); | ||||
| 
 | ||||
| struct nvkm_xtensa_func { | ||||
| 	u32 pmc_enable; | ||||
| 	u32 fifo_val; | ||||
| 	u32 unkd28; | ||||
| 	struct nvkm_sclass sclass[]; | ||||
|  |  | |||
|  | @ -137,11 +137,10 @@ nvkm_engine_func = { | |||
| 
 | ||||
| int | ||||
| nvkm_engine_ctor(const struct nvkm_engine_func *func, | ||||
| 		 struct nvkm_device *device, int index, u32 pmc_enable, | ||||
| 		 bool enable, struct nvkm_engine *engine) | ||||
| 		 struct nvkm_device *device, int index, bool enable, | ||||
| 		 struct nvkm_engine *engine) | ||||
| { | ||||
| 	nvkm_subdev_ctor(&nvkm_engine_func, device, index, | ||||
| 			 pmc_enable, &engine->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_engine_func, device, index, &engine->subdev); | ||||
| 	engine->func = func; | ||||
| 
 | ||||
| 	if (!nvkm_boolopt(device->cfgopt, nvkm_subdev_name[index], enable)) { | ||||
|  | @ -155,11 +154,10 @@ nvkm_engine_ctor(const struct nvkm_engine_func *func, | |||
| 
 | ||||
| int | ||||
| nvkm_engine_new_(const struct nvkm_engine_func *func, | ||||
| 		 struct nvkm_device *device, int index, u32 pmc_enable, | ||||
| 		 bool enable, struct nvkm_engine **pengine) | ||||
| 		 struct nvkm_device *device, int index, bool enable, | ||||
| 		 struct nvkm_engine **pengine) | ||||
| { | ||||
| 	if (!(*pengine = kzalloc(sizeof(**pengine), GFP_KERNEL))) | ||||
| 		return -ENOMEM; | ||||
| 	return nvkm_engine_ctor(func, device, index, pmc_enable, | ||||
| 				enable, *pengine); | ||||
| 	return nvkm_engine_ctor(func, device, index, enable, *pengine); | ||||
| } | ||||
|  |  | |||
|  | @ -190,14 +190,13 @@ nvkm_subdev_del(struct nvkm_subdev **psubdev) | |||
| 
 | ||||
| void | ||||
| nvkm_subdev_ctor(const struct nvkm_subdev_func *func, | ||||
| 		 struct nvkm_device *device, int index, u32 pmc_enable, | ||||
| 		 struct nvkm_device *device, int index, | ||||
| 		 struct nvkm_subdev *subdev) | ||||
| { | ||||
| 	const char *name = nvkm_subdev_name[index]; | ||||
| 	subdev->func = func; | ||||
| 	subdev->device = device; | ||||
| 	subdev->index = index; | ||||
| 	subdev->pmc_enable = pmc_enable; | ||||
| 
 | ||||
| 	__mutex_init(&subdev->mutex, name, &nvkm_subdev_lock_class[index]); | ||||
| 	subdev->debug = nvkm_dbgopt(device->dbgopt, name); | ||||
|  |  | |||
|  | @ -27,7 +27,6 @@ | |||
| 
 | ||||
| static const struct nvkm_xtensa_func | ||||
| g84_bsp = { | ||||
| 	.pmc_enable = 0x04008000, | ||||
| 	.fifo_val = 0x1111, | ||||
| 	.unkd28 = 0x90044, | ||||
| 	.sclass = { | ||||
|  |  | |||
|  | @ -40,7 +40,6 @@ gf100_ce0 = { | |||
| 	.code.size = sizeof(gf100_ce_code), | ||||
| 	.data.data = gf100_ce_data, | ||||
| 	.data.size = sizeof(gf100_ce_data), | ||||
| 	.pmc_enable = 0x00000040, | ||||
| 	.init = gf100_ce_init, | ||||
| 	.intr = gt215_ce_intr, | ||||
| 	.sclass = { | ||||
|  | @ -55,7 +54,6 @@ gf100_ce1 = { | |||
| 	.code.size = sizeof(gf100_ce_code), | ||||
| 	.data.data = gf100_ce_data, | ||||
| 	.data.size = sizeof(gf100_ce_data), | ||||
| 	.pmc_enable = 0x00000080, | ||||
| 	.init = gf100_ce_init, | ||||
| 	.intr = gt215_ce_intr, | ||||
| 	.sclass = { | ||||
|  |  | |||
|  | @ -97,17 +97,5 @@ int | |||
| gk104_ce_new(struct nvkm_device *device, int index, | ||||
| 	     struct nvkm_engine **pengine) | ||||
| { | ||||
| 	if (index == NVKM_ENGINE_CE0) { | ||||
| 		return nvkm_engine_new_(&gk104_ce, device, index, | ||||
| 					0x00000040, true, pengine); | ||||
| 	} else | ||||
| 	if (index == NVKM_ENGINE_CE1) { | ||||
| 		return nvkm_engine_new_(&gk104_ce, device, index, | ||||
| 					0x00000080, true, pengine); | ||||
| 	} else | ||||
| 	if (index == NVKM_ENGINE_CE2) { | ||||
| 		return nvkm_engine_new_(&gk104_ce, device, index, | ||||
| 					0x00200000, true, pengine); | ||||
| 	} | ||||
| 	return -ENODEV; | ||||
| 	return nvkm_engine_new_(&gk104_ce, device, index, true, pengine); | ||||
| } | ||||
|  |  | |||
|  | @ -39,17 +39,5 @@ int | |||
| gm107_ce_new(struct nvkm_device *device, int index, | ||||
| 	     struct nvkm_engine **pengine) | ||||
| { | ||||
| 	if (index == NVKM_ENGINE_CE0) { | ||||
| 		return nvkm_engine_new_(&gm107_ce, device, index, | ||||
| 					0x00000040, true, pengine); | ||||
| 	} else | ||||
| 	if (index == NVKM_ENGINE_CE1) { | ||||
| 		return nvkm_engine_new_(&gm107_ce, device, index, | ||||
| 					0x00000080, true, pengine); | ||||
| 	} else | ||||
| 	if (index == NVKM_ENGINE_CE2) { | ||||
| 		return nvkm_engine_new_(&gm107_ce, device, index, | ||||
| 					0x00200000, true, pengine); | ||||
| 	} | ||||
| 	return -ENODEV; | ||||
| 	return nvkm_engine_new_(&gm107_ce, device, index, true, pengine); | ||||
| } | ||||
|  |  | |||
|  | @ -38,17 +38,5 @@ int | |||
| gm200_ce_new(struct nvkm_device *device, int index, | ||||
| 	     struct nvkm_engine **pengine) | ||||
| { | ||||
| 	if (index == NVKM_ENGINE_CE0) { | ||||
| 		return nvkm_engine_new_(&gm200_ce, device, index, | ||||
| 					0x00000040, true, pengine); | ||||
| 	} else | ||||
| 	if (index == NVKM_ENGINE_CE1) { | ||||
| 		return nvkm_engine_new_(&gm200_ce, device, index, | ||||
| 					0x00000080, true, pengine); | ||||
| 	} else | ||||
| 	if (index == NVKM_ENGINE_CE2) { | ||||
| 		return nvkm_engine_new_(&gm200_ce, device, index, | ||||
| 					0x00200000, true, pengine); | ||||
| 	} | ||||
| 	return -ENODEV; | ||||
| 	return nvkm_engine_new_(&gm200_ce, device, index, true, pengine); | ||||
| } | ||||
|  |  | |||
|  | @ -67,7 +67,6 @@ gt215_ce = { | |||
| 	.code.size = sizeof(gt215_ce_code), | ||||
| 	.data.data = gt215_ce_data, | ||||
| 	.data.size = sizeof(gt215_ce_data), | ||||
| 	.pmc_enable = 0x00802000, | ||||
| 	.intr = gt215_ce_intr, | ||||
| 	.sclass = { | ||||
| 		{ -1, -1, GT212_DMA }, | ||||
|  |  | |||
|  | @ -130,6 +130,5 @@ int | |||
| g84_cipher_new(struct nvkm_device *device, int index, | ||||
| 	       struct nvkm_engine **pengine) | ||||
| { | ||||
| 	return nvkm_engine_new_(&g84_cipher, device, index, | ||||
| 				0x00004000, true, pengine); | ||||
| 	return nvkm_engine_new_(&g84_cipher, device, index, true, pengine); | ||||
| } | ||||
|  |  | |||
|  | @ -298,8 +298,7 @@ nvkm_disp_ctor(const struct nvkm_disp_func *func, struct nvkm_device *device, | |||
| 	disp->func = func; | ||||
| 	disp->head.nr = heads; | ||||
| 
 | ||||
| 	ret = nvkm_engine_ctor(&nvkm_disp, device, index, 0, | ||||
| 			       true, &disp->engine); | ||||
| 	ret = nvkm_engine_ctor(&nvkm_disp, device, index, true, &disp->engine); | ||||
| 	if (ret) | ||||
| 		return ret; | ||||
| 
 | ||||
|  |  | |||
|  | @ -152,6 +152,5 @@ nvkm_dma_new_(const struct nvkm_dma_func *func, struct nvkm_device *device, | |||
| 		return -ENOMEM; | ||||
| 	dma->func = func; | ||||
| 
 | ||||
| 	return nvkm_engine_ctor(&nvkm_dma, device, index, | ||||
| 				0, true, &dma->engine); | ||||
| 	return nvkm_engine_ctor(&nvkm_dma, device, index, true, &dma->engine); | ||||
| } | ||||
|  |  | |||
|  | @ -348,6 +348,6 @@ nvkm_falcon_new_(const struct nvkm_falcon_func *func, | |||
| 	falcon->data.size = func->data.size; | ||||
| 	*pengine = &falcon->engine; | ||||
| 
 | ||||
| 	return nvkm_engine_ctor(&nvkm_falcon, device, index, func->pmc_enable, | ||||
| 	return nvkm_engine_ctor(&nvkm_falcon, device, index, | ||||
| 				enable, &falcon->engine); | ||||
| } | ||||
|  |  | |||
|  | @ -261,8 +261,7 @@ nvkm_fifo_ctor(const struct nvkm_fifo_func *func, struct nvkm_device *device, | |||
| 		fifo->nr = nr; | ||||
| 	bitmap_clear(fifo->mask, 0, fifo->nr); | ||||
| 
 | ||||
| 	ret = nvkm_engine_ctor(&nvkm_fifo, device, index, 0x00000100, | ||||
| 			       true, &fifo->engine); | ||||
| 	ret = nvkm_engine_ctor(&nvkm_fifo, device, index, true, &fifo->engine); | ||||
| 	if (ret) | ||||
| 		return ret; | ||||
| 
 | ||||
|  |  | |||
|  | @ -128,9 +128,8 @@ nvkm_gr = { | |||
| 
 | ||||
| int | ||||
| nvkm_gr_ctor(const struct nvkm_gr_func *func, struct nvkm_device *device, | ||||
| 	     int index, u32 pmc_enable, bool enable, struct nvkm_gr *gr) | ||||
| 	     int index, bool enable, struct nvkm_gr *gr) | ||||
| { | ||||
| 	gr->func = func; | ||||
| 	return nvkm_engine_ctor(&nvkm_gr, device, index, pmc_enable, | ||||
| 				enable, &gr->engine); | ||||
| 	return nvkm_engine_ctor(&nvkm_gr, device, index, enable, &gr->engine); | ||||
| } | ||||
|  |  | |||
|  | @ -1776,7 +1776,7 @@ gf100_gr_ctor(const struct gf100_gr_func *func, struct nvkm_device *device, | |||
| 	gr->firmware = nvkm_boolopt(device->cfgopt, "NvGrUseFW", | ||||
| 				    func->fecs.ucode == NULL); | ||||
| 
 | ||||
| 	ret = nvkm_gr_ctor(&gf100_gr_, device, index, 0x08001000, | ||||
| 	ret = nvkm_gr_ctor(&gf100_gr_, device, index, | ||||
| 			   gr->firmware || func->fecs.ucode != NULL, | ||||
| 			   &gr->base); | ||||
| 	if (ret) | ||||
|  |  | |||
|  | @ -1422,6 +1422,5 @@ nv04_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr) | |||
| 	spin_lock_init(&gr->lock); | ||||
| 	*pgr = &gr->base; | ||||
| 
 | ||||
| 	return nvkm_gr_ctor(&nv04_gr, device, index, 0x00001000, | ||||
| 			    true, &gr->base); | ||||
| 	return nvkm_gr_ctor(&nv04_gr, device, index, true, &gr->base); | ||||
| } | ||||
|  |  | |||
|  | @ -1182,7 +1182,7 @@ nv10_gr_new_(const struct nvkm_gr_func *func, struct nvkm_device *device, | |||
| 	spin_lock_init(&gr->lock); | ||||
| 	*pgr = &gr->base; | ||||
| 
 | ||||
| 	return nvkm_gr_ctor(func, device, index, 0x00001000, true, &gr->base); | ||||
| 	return nvkm_gr_ctor(func, device, index, true, &gr->base); | ||||
| } | ||||
| 
 | ||||
| static const struct nvkm_gr_func | ||||
|  |  | |||
|  | @ -337,7 +337,7 @@ nv20_gr_new_(const struct nvkm_gr_func *func, struct nvkm_device *device, | |||
| 		return -ENOMEM; | ||||
| 	*pgr = &gr->base; | ||||
| 
 | ||||
| 	return nvkm_gr_ctor(func, device, index, 0x00001000, true, &gr->base); | ||||
| 	return nvkm_gr_ctor(func, device, index, true, &gr->base); | ||||
| } | ||||
| 
 | ||||
| static const struct nvkm_gr_func | ||||
|  |  | |||
|  | @ -438,7 +438,7 @@ nv40_gr_new_(const struct nvkm_gr_func *func, struct nvkm_device *device, | |||
| 	*pgr = &gr->base; | ||||
| 	INIT_LIST_HEAD(&gr->chan); | ||||
| 
 | ||||
| 	return nvkm_gr_ctor(func, device, index, 0x00001000, true, &gr->base); | ||||
| 	return nvkm_gr_ctor(func, device, index, true, &gr->base); | ||||
| } | ||||
| 
 | ||||
| static const struct nvkm_gr_func | ||||
|  |  | |||
|  | @ -768,7 +768,7 @@ nv50_gr_new_(const struct nvkm_gr_func *func, struct nvkm_device *device, | |||
| 	spin_lock_init(&gr->lock); | ||||
| 	*pgr = &gr->base; | ||||
| 
 | ||||
| 	return nvkm_gr_ctor(func, device, index, 0x00201000, true, &gr->base); | ||||
| 	return nvkm_gr_ctor(func, device, index, true, &gr->base); | ||||
| } | ||||
| 
 | ||||
| static const struct nvkm_gr_func | ||||
|  |  | |||
|  | @ -7,8 +7,7 @@ struct nvkm_fb_tile; | |||
| struct nvkm_fifo_chan; | ||||
| 
 | ||||
| int nvkm_gr_ctor(const struct nvkm_gr_func *, struct nvkm_device *, | ||||
| 		 int index, u32 pmc_enable, bool enable, | ||||
| 		 struct nvkm_gr *); | ||||
| 		 int index, bool enable, struct nvkm_gr *); | ||||
| 
 | ||||
| bool nv04_gr_idle(struct nvkm_gr *); | ||||
| 
 | ||||
|  |  | |||
|  | @ -39,6 +39,5 @@ g84_mpeg = { | |||
| int | ||||
| g84_mpeg_new(struct nvkm_device *device, int index, struct nvkm_engine **pmpeg) | ||||
| { | ||||
| 	return nvkm_engine_new_(&g84_mpeg, device, index, 0x00000002, | ||||
| 				true, pmpeg); | ||||
| 	return nvkm_engine_new_(&g84_mpeg, device, index, true, pmpeg); | ||||
| } | ||||
|  |  | |||
|  | @ -278,7 +278,7 @@ nv31_mpeg_new_(const struct nv31_mpeg_func *func, struct nvkm_device *device, | |||
| 	mpeg->func = func; | ||||
| 	*pmpeg = &mpeg->engine; | ||||
| 
 | ||||
| 	return nvkm_engine_ctor(&nv31_mpeg_, device, index, 0x00000002, | ||||
| 	return nvkm_engine_ctor(&nv31_mpeg_, device, index, | ||||
| 				true, &mpeg->engine); | ||||
| } | ||||
| 
 | ||||
|  |  | |||
|  | @ -212,6 +212,5 @@ nv44_mpeg_new(struct nvkm_device *device, int index, struct nvkm_engine **pmpeg) | |||
| 	INIT_LIST_HEAD(&mpeg->chan); | ||||
| 	*pmpeg = &mpeg->engine; | ||||
| 
 | ||||
| 	return nvkm_engine_ctor(&nv44_mpeg, device, index, 0x00000002, | ||||
| 				true, &mpeg->engine); | ||||
| 	return nvkm_engine_ctor(&nv44_mpeg, device, index, true, &mpeg->engine); | ||||
| } | ||||
|  |  | |||
|  | @ -130,6 +130,5 @@ nv50_mpeg = { | |||
| int | ||||
| nv50_mpeg_new(struct nvkm_device *device, int index, struct nvkm_engine **pmpeg) | ||||
| { | ||||
| 	return nvkm_engine_new_(&nv50_mpeg, device, index, 0x00400002, | ||||
| 				true, pmpeg); | ||||
| 	return nvkm_engine_new_(&nv50_mpeg, device, index, true, pmpeg); | ||||
| } | ||||
|  |  | |||
|  | @ -35,7 +35,6 @@ g98_mspdec_init(struct nvkm_falcon *mspdec) | |||
| 
 | ||||
| static const struct nvkm_falcon_func | ||||
| g98_mspdec = { | ||||
| 	.pmc_enable = 0x01020000, | ||||
| 	.init = g98_mspdec_init, | ||||
| 	.sclass = { | ||||
| 		{ -1, -1, G98_MSPDEC }, | ||||
|  |  | |||
|  | @ -35,7 +35,6 @@ gf100_mspdec_init(struct nvkm_falcon *mspdec) | |||
| 
 | ||||
| static const struct nvkm_falcon_func | ||||
| gf100_mspdec = { | ||||
| 	.pmc_enable = 0x00020000, | ||||
| 	.init = gf100_mspdec_init, | ||||
| 	.sclass = { | ||||
| 		{ -1, -1, GF100_MSPDEC }, | ||||
|  |  | |||
|  | @ -27,7 +27,6 @@ | |||
| 
 | ||||
| static const struct nvkm_falcon_func | ||||
| gk104_mspdec = { | ||||
| 	.pmc_enable = 0x00020000, | ||||
| 	.init = gf100_mspdec_init, | ||||
| 	.sclass = { | ||||
| 		{ -1, -1, GK104_MSPDEC }, | ||||
|  |  | |||
|  | @ -27,7 +27,6 @@ | |||
| 
 | ||||
| static const struct nvkm_falcon_func | ||||
| gt215_mspdec = { | ||||
| 	.pmc_enable = 0x01020000, | ||||
| 	.init = g98_mspdec_init, | ||||
| 	.sclass = { | ||||
| 		{ -1, -1, GT212_MSPDEC }, | ||||
|  |  | |||
|  | @ -35,7 +35,6 @@ g98_msppp_init(struct nvkm_falcon *msppp) | |||
| 
 | ||||
| static const struct nvkm_falcon_func | ||||
| g98_msppp = { | ||||
| 	.pmc_enable = 0x00400002, | ||||
| 	.init = g98_msppp_init, | ||||
| 	.sclass = { | ||||
| 		{ -1, -1, G98_MSPPP }, | ||||
|  |  | |||
|  | @ -35,7 +35,6 @@ gf100_msppp_init(struct nvkm_falcon *msppp) | |||
| 
 | ||||
| static const struct nvkm_falcon_func | ||||
| gf100_msppp = { | ||||
| 	.pmc_enable = 0x00000002, | ||||
| 	.init = gf100_msppp_init, | ||||
| 	.sclass = { | ||||
| 		{ -1, -1, GF100_MSPPP }, | ||||
|  |  | |||
|  | @ -27,7 +27,6 @@ | |||
| 
 | ||||
| static const struct nvkm_falcon_func | ||||
| gt215_msppp = { | ||||
| 	.pmc_enable = 0x00400002, | ||||
| 	.init = g98_msppp_init, | ||||
| 	.sclass = { | ||||
| 		{ -1, -1, GT212_MSPPP }, | ||||
|  |  | |||
|  | @ -35,7 +35,6 @@ g98_msvld_init(struct nvkm_falcon *msvld) | |||
| 
 | ||||
| static const struct nvkm_falcon_func | ||||
| g98_msvld = { | ||||
| 	.pmc_enable = 0x04008000, | ||||
| 	.init = g98_msvld_init, | ||||
| 	.sclass = { | ||||
| 		{ -1, -1, G98_MSVLD }, | ||||
|  |  | |||
|  | @ -35,7 +35,6 @@ gf100_msvld_init(struct nvkm_falcon *msvld) | |||
| 
 | ||||
| static const struct nvkm_falcon_func | ||||
| gf100_msvld = { | ||||
| 	.pmc_enable = 0x00008000, | ||||
| 	.init = gf100_msvld_init, | ||||
| 	.sclass = { | ||||
| 		{ -1, -1, GF100_MSVLD }, | ||||
|  |  | |||
|  | @ -27,7 +27,6 @@ | |||
| 
 | ||||
| static const struct nvkm_falcon_func | ||||
| gk104_msvld = { | ||||
| 	.pmc_enable = 0x00008000, | ||||
| 	.init = gf100_msvld_init, | ||||
| 	.sclass = { | ||||
| 		{ -1, -1, GK104_MSVLD }, | ||||
|  |  | |||
|  | @ -27,7 +27,6 @@ | |||
| 
 | ||||
| static const struct nvkm_falcon_func | ||||
| gt215_msvld = { | ||||
| 	.pmc_enable = 0x04008000, | ||||
| 	.init = g98_msvld_init, | ||||
| 	.sclass = { | ||||
| 		{ -1, -1, GT212_MSVLD }, | ||||
|  |  | |||
|  | @ -27,7 +27,6 @@ | |||
| 
 | ||||
| static const struct nvkm_falcon_func | ||||
| mcp89_msvld = { | ||||
| 	.pmc_enable = 0x04008000, | ||||
| 	.init = g98_msvld_init, | ||||
| 	.sclass = { | ||||
| 		{ -1, -1, IGT21A_MSVLD }, | ||||
|  |  | |||
|  | @ -863,5 +863,5 @@ nvkm_pm_ctor(const struct nvkm_pm_func *func, struct nvkm_device *device, | |||
| 	pm->func = func; | ||||
| 	INIT_LIST_HEAD(&pm->domains); | ||||
| 	INIT_LIST_HEAD(&pm->sources); | ||||
| 	return nvkm_engine_ctor(&nvkm_pm, device, index, 0, true, &pm->engine); | ||||
| 	return nvkm_engine_ctor(&nvkm_pm, device, index, true, &pm->engine); | ||||
| } | ||||
|  |  | |||
|  | @ -66,7 +66,6 @@ g98_sec = { | |||
| 	.code.size = sizeof(g98_sec_code), | ||||
| 	.data.data = g98_sec_data, | ||||
| 	.data.size = sizeof(g98_sec_data), | ||||
| 	.pmc_enable = 0x00004000, | ||||
| 	.intr = g98_sec_intr, | ||||
| 	.sclass = { | ||||
| 		{ -1, -1, G98_SEC }, | ||||
|  |  | |||
|  | @ -106,5 +106,5 @@ nvkm_sw_new_(const struct nvkm_sw_func *func, struct nvkm_device *device, | |||
| 	INIT_LIST_HEAD(&sw->chan); | ||||
| 	sw->func = func; | ||||
| 
 | ||||
| 	return nvkm_engine_ctor(&nvkm_sw, device, index, 0, true, &sw->engine); | ||||
| 	return nvkm_engine_ctor(&nvkm_sw, device, index, true, &sw->engine); | ||||
| } | ||||
|  |  | |||
|  | @ -27,7 +27,6 @@ | |||
| 
 | ||||
| static const struct nvkm_xtensa_func | ||||
| g84_vp = { | ||||
| 	.pmc_enable = 0x01020000, | ||||
| 	.fifo_val = 0x111, | ||||
| 	.unkd28 = 0x9c544, | ||||
| 	.sclass = { | ||||
|  |  | |||
|  | @ -187,6 +187,6 @@ nvkm_xtensa_new_(const struct nvkm_xtensa_func *func, | |||
| 	xtensa->addr = addr; | ||||
| 	*pengine = &xtensa->engine; | ||||
| 
 | ||||
| 	return nvkm_engine_ctor(&nvkm_xtensa, device, index, func->pmc_enable, | ||||
| 	return nvkm_engine_ctor(&nvkm_xtensa, device, index, | ||||
| 				enable, &xtensa->engine); | ||||
| } | ||||
|  |  | |||
|  | @ -77,7 +77,7 @@ void | |||
| nvkm_bar_ctor(const struct nvkm_bar_func *func, struct nvkm_device *device, | ||||
| 	      int index, struct nvkm_bar *bar) | ||||
| { | ||||
| 	nvkm_subdev_ctor(&nvkm_bar, device, index, 0, &bar->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_bar, device, index, &bar->subdev); | ||||
| 	bar->func = func; | ||||
| 	spin_lock_init(&bar->lock); | ||||
| } | ||||
|  |  | |||
|  | @ -105,7 +105,7 @@ nvkm_bios_new(struct nvkm_device *device, int index, struct nvkm_bios **pbios) | |||
| 
 | ||||
| 	if (!(bios = *pbios = kzalloc(sizeof(*bios), GFP_KERNEL))) | ||||
| 		return -ENOMEM; | ||||
| 	nvkm_subdev_ctor(&nvkm_bios, device, index, 0, &bios->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_bios, device, index, &bios->subdev); | ||||
| 
 | ||||
| 	ret = nvbios_shadow(bios); | ||||
| 	if (ret) | ||||
|  |  | |||
|  | @ -58,7 +58,7 @@ nvkm_bus_new_(const struct nvkm_bus_func *func, struct nvkm_device *device, | |||
| 	struct nvkm_bus *bus; | ||||
| 	if (!(bus = *pbus = kzalloc(sizeof(*bus), GFP_KERNEL))) | ||||
| 		return -ENOMEM; | ||||
| 	nvkm_subdev_ctor(&nvkm_bus, device, index, 0, &bus->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_bus, device, index, &bus->subdev); | ||||
| 	bus->func = func; | ||||
| 	return 0; | ||||
| } | ||||
|  |  | |||
|  | @ -564,7 +564,7 @@ nvkm_clk_ctor(const struct nvkm_clk_func *func, struct nvkm_device *device, | |||
| 	int ret, idx, arglen; | ||||
| 	const char *mode; | ||||
| 
 | ||||
| 	nvkm_subdev_ctor(&nvkm_clk, device, index, 0, &clk->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_clk, device, index, &clk->subdev); | ||||
| 	clk->func = func; | ||||
| 	INIT_LIST_HEAD(&clk->states); | ||||
| 	clk->domains = func->domains; | ||||
|  |  | |||
|  | @ -130,7 +130,7 @@ nvkm_devinit_ctor(const struct nvkm_devinit_func *func, | |||
| 		  struct nvkm_device *device, int index, | ||||
| 		  struct nvkm_devinit *init) | ||||
| { | ||||
| 	nvkm_subdev_ctor(&nvkm_devinit, device, index, 0, &init->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_devinit, device, index, &init->subdev); | ||||
| 	init->func = func; | ||||
| 	init->force_post = nvkm_boolopt(device->cfgopt, "NvForcePost", false); | ||||
| } | ||||
|  |  | |||
|  | @ -156,7 +156,7 @@ void | |||
| nvkm_fb_ctor(const struct nvkm_fb_func *func, struct nvkm_device *device, | ||||
| 	     int index, struct nvkm_fb *fb) | ||||
| { | ||||
| 	nvkm_subdev_ctor(&nvkm_fb, device, index, 0, &fb->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_fb, device, index, &fb->subdev); | ||||
| 	fb->func = func; | ||||
| 	fb->tile.regions = fb->func->tile.regions; | ||||
| } | ||||
|  |  | |||
|  | @ -47,7 +47,7 @@ nvkm_fuse_new_(const struct nvkm_fuse_func *func, struct nvkm_device *device, | |||
| 	struct nvkm_fuse *fuse; | ||||
| 	if (!(fuse = *pfuse = kzalloc(sizeof(*fuse), GFP_KERNEL))) | ||||
| 		return -ENOMEM; | ||||
| 	nvkm_subdev_ctor(&nvkm_fuse, device, index, 0, &fuse->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_fuse, device, index, &fuse->subdev); | ||||
| 	fuse->func = func; | ||||
| 	spin_lock_init(&fuse->lock); | ||||
| 	return 0; | ||||
|  |  | |||
|  | @ -216,7 +216,7 @@ nvkm_gpio_new_(const struct nvkm_gpio_func *func, struct nvkm_device *device, | |||
| 	if (!(gpio = *pgpio = kzalloc(sizeof(*gpio), GFP_KERNEL))) | ||||
| 		return -ENOMEM; | ||||
| 
 | ||||
| 	nvkm_subdev_ctor(&nvkm_gpio, device, index, 0, &gpio->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_gpio, device, index, &gpio->subdev); | ||||
| 	gpio->func = func; | ||||
| 
 | ||||
| 	return nvkm_event_init(&nvkm_gpio_intr_func, 2, func->lines, | ||||
|  |  | |||
|  | @ -254,7 +254,7 @@ nvkm_i2c_new_(const struct nvkm_i2c_func *func, struct nvkm_device *device, | |||
| 	if (!(i2c = *pi2c = kzalloc(sizeof(*i2c), GFP_KERNEL))) | ||||
| 		return -ENOMEM; | ||||
| 
 | ||||
| 	nvkm_subdev_ctor(&nvkm_i2c, device, index, 0, &i2c->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_i2c, device, index, &i2c->subdev); | ||||
| 	i2c->func = func; | ||||
| 	INIT_LIST_HEAD(&i2c->pad); | ||||
| 	INIT_LIST_HEAD(&i2c->bus); | ||||
|  |  | |||
|  | @ -117,6 +117,6 @@ gf100_ibus_new(struct nvkm_device *device, int index, | |||
| 	struct nvkm_subdev *ibus; | ||||
| 	if (!(ibus = *pibus = kzalloc(sizeof(*ibus), GFP_KERNEL))) | ||||
| 		return -ENOMEM; | ||||
| 	nvkm_subdev_ctor(&gf100_ibus, device, index, 0, ibus); | ||||
| 	nvkm_subdev_ctor(&gf100_ibus, device, index, ibus); | ||||
| 	return 0; | ||||
| } | ||||
|  |  | |||
|  | @ -46,6 +46,6 @@ gf117_ibus_new(struct nvkm_device *device, int index, | |||
| 	struct nvkm_subdev *ibus; | ||||
| 	if (!(ibus = *pibus = kzalloc(sizeof(*ibus), GFP_KERNEL))) | ||||
| 		return -ENOMEM; | ||||
| 	nvkm_subdev_ctor(&gf117_ibus, device, index, 0, ibus); | ||||
| 	nvkm_subdev_ctor(&gf117_ibus, device, index, ibus); | ||||
| 	return 0; | ||||
| } | ||||
|  |  | |||
|  | @ -120,6 +120,6 @@ gk104_ibus_new(struct nvkm_device *device, int index, | |||
| 	struct nvkm_subdev *ibus; | ||||
| 	if (!(ibus = *pibus = kzalloc(sizeof(*ibus), GFP_KERNEL))) | ||||
| 		return -ENOMEM; | ||||
| 	nvkm_subdev_ctor(&gk104_ibus, device, index, 0, ibus); | ||||
| 	nvkm_subdev_ctor(&gk104_ibus, device, index, ibus); | ||||
| 	return 0; | ||||
| } | ||||
|  |  | |||
|  | @ -84,6 +84,6 @@ gk20a_ibus_new(struct nvkm_device *device, int index, | |||
| 	struct nvkm_subdev *ibus; | ||||
| 	if (!(ibus = *pibus = kzalloc(sizeof(*ibus), GFP_KERNEL))) | ||||
| 		return -ENOMEM; | ||||
| 	nvkm_subdev_ctor(&gk20a_ibus, device, index, 0, ibus); | ||||
| 	nvkm_subdev_ctor(&gk20a_ibus, device, index, ibus); | ||||
| 	return 0; | ||||
| } | ||||
|  |  | |||
|  | @ -35,6 +35,6 @@ gm200_ibus_new(struct nvkm_device *device, int index, | |||
| 	struct nvkm_subdev *ibus; | ||||
| 	if (!(ibus = *pibus = kzalloc(sizeof(*ibus), GFP_KERNEL))) | ||||
| 		return -ENOMEM; | ||||
| 	nvkm_subdev_ctor(&gm200_ibus, device, index, 0, ibus); | ||||
| 	nvkm_subdev_ctor(&gm200_ibus, device, index, ibus); | ||||
| 	return 0; | ||||
| } | ||||
|  |  | |||
|  | @ -337,7 +337,7 @@ void | |||
| nvkm_iccsense_ctor(struct nvkm_device *device, int index, | ||||
| 		   struct nvkm_iccsense *iccsense) | ||||
| { | ||||
| 	nvkm_subdev_ctor(&iccsense_func, device, index, 0, &iccsense->subdev); | ||||
| 	nvkm_subdev_ctor(&iccsense_func, device, index, &iccsense->subdev); | ||||
| } | ||||
| 
 | ||||
| int | ||||
|  |  | |||
|  | @ -311,7 +311,7 @@ nvkm_instmem_ctor(const struct nvkm_instmem_func *func, | |||
| 		  struct nvkm_device *device, int index, | ||||
| 		  struct nvkm_instmem *imem) | ||||
| { | ||||
| 	nvkm_subdev_ctor(&nvkm_instmem, device, index, 0, &imem->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_instmem, device, index, &imem->subdev); | ||||
| 	imem->func = func; | ||||
| 	spin_lock_init(&imem->lock); | ||||
| 	INIT_LIST_HEAD(&imem->list); | ||||
|  |  | |||
|  | @ -138,7 +138,7 @@ nvkm_ltc_new_(const struct nvkm_ltc_func *func, struct nvkm_device *device, | |||
| 	if (!(ltc = *pltc = kzalloc(sizeof(*ltc), GFP_KERNEL))) | ||||
| 		return -ENOMEM; | ||||
| 
 | ||||
| 	nvkm_subdev_ctor(&nvkm_ltc, device, index, 0, <c->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_ltc, device, index, <c->subdev); | ||||
| 	ltc->func = func; | ||||
| 	ltc->zbc_min = 1; /* reserve 0 for disabled */ | ||||
| 	ltc->zbc_max = min(func->zbc, NVKM_LTC_MAX_ZBC_CNT) - 1; | ||||
|  |  | |||
|  | @ -103,11 +103,6 @@ nvkm_mc_reset_(struct nvkm_mc *mc, enum nvkm_devidx devidx) | |||
| 		} | ||||
| 	} | ||||
| 
 | ||||
| 	if (!pmc_enable) { | ||||
| 		struct nvkm_subdev *subdev = nvkm_device_subdev(device, devidx); | ||||
| 		pmc_enable = subdev->pmc_enable; | ||||
| 	} | ||||
| 
 | ||||
| 	if (pmc_enable) { | ||||
| 		nvkm_mask(device, 0x000200, pmc_enable, 0x00000000); | ||||
| 		nvkm_mask(device, 0x000200, pmc_enable, pmc_enable); | ||||
|  | @ -162,7 +157,7 @@ nvkm_mc_new_(const struct nvkm_mc_func *func, struct nvkm_device *device, | |||
| 	if (!(mc = *pmc = kzalloc(sizeof(*mc), GFP_KERNEL))) | ||||
| 		return -ENOMEM; | ||||
| 
 | ||||
| 	nvkm_subdev_ctor(&nvkm_mc, device, index, 0, &mc->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_mc, device, index, &mc->subdev); | ||||
| 	mc->func = func; | ||||
| 	return 0; | ||||
| } | ||||
|  |  | |||
|  | @ -524,7 +524,7 @@ void | |||
| nvkm_mmu_ctor(const struct nvkm_mmu_func *func, struct nvkm_device *device, | ||||
| 	      int index, struct nvkm_mmu *mmu) | ||||
| { | ||||
| 	nvkm_subdev_ctor(&nvkm_mmu, device, index, 0, &mmu->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_mmu, device, index, &mmu->subdev); | ||||
| 	mmu->func = func; | ||||
| 	mmu->limit = func->limit; | ||||
| 	mmu->dma_bits = func->dma_bits; | ||||
|  |  | |||
|  | @ -241,7 +241,7 @@ nvkm_mxm_new_(struct nvkm_device *device, int index, struct nvkm_mxm **pmxm) | |||
| 	if (!(mxm = *pmxm = kzalloc(sizeof(*mxm), GFP_KERNEL))) | ||||
| 		return -ENOMEM; | ||||
| 
 | ||||
| 	nvkm_subdev_ctor(&nvkm_mxm, device, index, 0, &mxm->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_mxm, device, index, &mxm->subdev); | ||||
| 
 | ||||
| 	data = mxm_table(bios, &ver, &len); | ||||
| 	if (!data || !(ver = nvbios_rd08(bios, data))) { | ||||
|  |  | |||
|  | @ -168,7 +168,7 @@ nvkm_pci_new_(const struct nvkm_pci_func *func, struct nvkm_device *device, | |||
| 
 | ||||
| 	if (!(pci = *ppci = kzalloc(sizeof(**ppci), GFP_KERNEL))) | ||||
| 		return -ENOMEM; | ||||
| 	nvkm_subdev_ctor(&nvkm_pci_func, device, index, 0, &pci->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_pci_func, device, index, &pci->subdev); | ||||
| 	pci->func = func; | ||||
| 	pci->pdev = device->func->pci(device)->pdev; | ||||
| 	pci->irq = -1; | ||||
|  |  | |||
|  | @ -274,7 +274,7 @@ nvkm_pmu_new_(const struct nvkm_pmu_func *func, struct nvkm_device *device, | |||
| 	struct nvkm_pmu *pmu; | ||||
| 	if (!(pmu = *ppmu = kzalloc(sizeof(*pmu), GFP_KERNEL))) | ||||
| 		return -ENOMEM; | ||||
| 	nvkm_subdev_ctor(&nvkm_pmu, device, index, 0, &pmu->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_pmu, device, index, &pmu->subdev); | ||||
| 	pmu->func = func; | ||||
| 	INIT_WORK(&pmu->recv.work, nvkm_pmu_recv); | ||||
| 	init_waitqueue_head(&pmu->recv.wait); | ||||
|  |  | |||
|  | @ -220,7 +220,7 @@ gk20a_pmu_new(struct nvkm_device *device, int index, struct nvkm_pmu **ppmu) | |||
| 	pmu->base.func = &func; | ||||
| 	*ppmu = &pmu->base; | ||||
| 
 | ||||
| 	nvkm_subdev_ctor(&gk20a_pmu, device, index, 0, &pmu->base.subdev); | ||||
| 	nvkm_subdev_ctor(&gk20a_pmu, device, index, &pmu->base.subdev); | ||||
| 	pmu->data = &gk20a_dvfs_data; | ||||
| 	nvkm_alarm_init(&pmu->alarm, gk20a_pmu_dvfs_work); | ||||
| 	return 0; | ||||
|  |  | |||
|  | @ -264,7 +264,7 @@ nvkm_secboot_ctor(const struct nvkm_secboot_func *func, | |||
| { | ||||
| 	unsigned long fid; | ||||
| 
 | ||||
| 	nvkm_subdev_ctor(&nvkm_secboot, device, index, 0, &sb->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_secboot, device, index, &sb->subdev); | ||||
| 	sb->func = func; | ||||
| 
 | ||||
| 	/* setup the performing falcon's base address and masks */ | ||||
|  |  | |||
|  | @ -366,7 +366,7 @@ nvkm_therm_new_(const struct nvkm_therm_func *func, struct nvkm_device *device, | |||
| 	if (!(therm = *ptherm = kzalloc(sizeof(*therm), GFP_KERNEL))) | ||||
| 		return -ENOMEM; | ||||
| 
 | ||||
| 	nvkm_subdev_ctor(&nvkm_therm, device, index, 0, &therm->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_therm, device, index, &therm->subdev); | ||||
| 	therm->func = func; | ||||
| 
 | ||||
| 	nvkm_alarm_init(&therm->alarm, nvkm_therm_alarm); | ||||
|  |  | |||
|  | @ -143,7 +143,7 @@ nvkm_timer_new_(const struct nvkm_timer_func *func, struct nvkm_device *device, | |||
| 	if (!(tmr = *ptmr = kzalloc(sizeof(*tmr), GFP_KERNEL))) | ||||
| 		return -ENOMEM; | ||||
| 
 | ||||
| 	nvkm_subdev_ctor(&nvkm_timer, device, index, 0, &tmr->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_timer, device, index, &tmr->subdev); | ||||
| 	tmr->func = func; | ||||
| 	INIT_LIST_HEAD(&tmr->alarms); | ||||
| 	spin_lock_init(&tmr->lock); | ||||
|  |  | |||
|  | @ -141,7 +141,7 @@ nvkm_top_new_(const struct nvkm_top_func *func, struct nvkm_device *device, | |||
| 	struct nvkm_top *top; | ||||
| 	if (!(top = *ptop = kzalloc(sizeof(*top), GFP_KERNEL))) | ||||
| 		return -ENOMEM; | ||||
| 	nvkm_subdev_ctor(&nvkm_top, device, index, 0, &top->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_top, device, index, &top->subdev); | ||||
| 	top->func = func; | ||||
| 	INIT_LIST_HEAD(&top->device); | ||||
| 	return 0; | ||||
|  |  | |||
|  | @ -177,7 +177,7 @@ nvkm_volt_ctor(const struct nvkm_volt_func *func, struct nvkm_device *device, | |||
| 	struct nvkm_bios *bios = device->bios; | ||||
| 	int i; | ||||
| 
 | ||||
| 	nvkm_subdev_ctor(&nvkm_volt, device, index, 0, &volt->subdev); | ||||
| 	nvkm_subdev_ctor(&nvkm_volt, device, index, &volt->subdev); | ||||
| 	volt->func = func; | ||||
| 
 | ||||
| 	/* Assuming the non-bios device should build the voltage table later */ | ||||
|  |  | |||
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