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mailbox: sophgo: add mailbox driver for CV18XX series SoC
Add mailbox controller driver for CV18XX SoCs, which provides 8 channels and each channel has an 8-byte FIFO. Signed-off-by: Yuntao Dai <d1581209858@live.com> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech> Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
This commit is contained in:
Yuntao Dai
Jassi Brar
parent
fca8d64001
commit
529015a0e7
3 changed files with 232 additions and 0 deletions
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@ -36,6 +36,16 @@ config ARM_MHU_V3
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that provides different means of transports: supported extensions
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will be discovered and possibly managed at probe-time.
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config CV1800_MBOX
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tristate "cv1800 mailbox"
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depends on ARCH_SOPHGO || COMPILE_TEST
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help
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Mailbox driver implementation for Sophgo CV18XX SoCs. This driver
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can be used to send message between different processors in SoC. Any
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processer can write data in a channel, and set co-responding register
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to raise interrupt to notice another processor, and it is allowed to
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send data to itself.
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config EXYNOS_MBOX
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tristate "Exynos Mailbox"
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depends on ARCH_EXYNOS || COMPILE_TEST
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@ -11,6 +11,8 @@ obj-$(CONFIG_ARM_MHU_V2) += arm_mhuv2.o
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obj-$(CONFIG_ARM_MHU_V3) += arm_mhuv3.o
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obj-$(CONFIG_CV1800_MBOX) += cv1800-mailbox.o
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obj-$(CONFIG_EXYNOS_MBOX) += exynos-mailbox.o
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obj-$(CONFIG_IMX_MBOX) += imx-mailbox.o
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220
drivers/mailbox/cv1800-mailbox.c
Normal file
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drivers/mailbox/cv1800-mailbox.c
Normal file
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@ -0,0 +1,220 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2024 Sophgo Technology Inc.
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* Copyright (C) 2024 Yuntao Dai <d1581209858@live.com>
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* Copyright (C) 2025 Junhui Liu <junhui.liu@pigmoral.tech>
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*/
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#include <linux/bits.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kfifo.h>
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#include <linux/mailbox_client.h>
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#include <linux/mailbox_controller.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#define RECV_CPU 1
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#define MAILBOX_MAX_CHAN 8
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#define MAILBOX_MSG_LEN 8
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#define MBOX_EN_REG(cpu) (cpu << 2)
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#define MBOX_DONE_REG(cpu) ((cpu << 2) + 2)
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#define MBOX_SET_CLR_REG(cpu) (0x10 + (cpu << 4))
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#define MBOX_SET_INT_REG(cpu) (0x18 + (cpu << 4))
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#define MBOX_SET_REG 0x60
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#define MAILBOX_CONTEXT_OFFSET 0x0400
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#define MAILBOX_CONTEXT_SIZE 0x0040
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#define MBOX_CONTEXT_BASE_INDEX(base, index) \
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((u64 __iomem *)(base + MAILBOX_CONTEXT_OFFSET) + index)
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/**
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* struct cv1800_mbox_chan_priv - cv1800 mailbox channel private data
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* @idx: index of channel
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* @cpu: send to which processor
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*/
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struct cv1800_mbox_chan_priv {
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int idx;
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int cpu;
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};
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struct cv1800_mbox {
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struct mbox_controller mbox;
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struct cv1800_mbox_chan_priv priv[MAILBOX_MAX_CHAN];
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struct mbox_chan chans[MAILBOX_MAX_CHAN];
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u64 __iomem *content[MAILBOX_MAX_CHAN];
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void __iomem *mbox_base;
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int recvid;
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};
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static irqreturn_t cv1800_mbox_isr(int irq, void *dev_id)
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{
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struct cv1800_mbox *mbox = (struct cv1800_mbox *)dev_id;
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size_t i;
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u64 msg;
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int ret = IRQ_NONE;
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for (i = 0; i < MAILBOX_MAX_CHAN; i++) {
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if (mbox->content[i] && mbox->chans[i].cl) {
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memcpy_fromio(&msg, mbox->content[i], MAILBOX_MSG_LEN);
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mbox->content[i] = NULL;
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mbox_chan_received_data(&mbox->chans[i], (void *)&msg);
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ret = IRQ_HANDLED;
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}
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}
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return ret;
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}
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static irqreturn_t cv1800_mbox_irq(int irq, void *dev_id)
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{
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struct cv1800_mbox *mbox = (struct cv1800_mbox *)dev_id;
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u8 set, valid;
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size_t i;
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int ret = IRQ_NONE;
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set = readb(mbox->mbox_base + MBOX_SET_INT_REG(RECV_CPU));
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if (!set)
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return ret;
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for (i = 0; i < MAILBOX_MAX_CHAN; i++) {
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valid = set & BIT(i);
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if (valid) {
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mbox->content[i] =
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MBOX_CONTEXT_BASE_INDEX(mbox->mbox_base, i);
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writeb(valid, mbox->mbox_base +
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MBOX_SET_CLR_REG(RECV_CPU));
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writeb(~valid, mbox->mbox_base + MBOX_EN_REG(RECV_CPU));
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ret = IRQ_WAKE_THREAD;
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}
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}
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return ret;
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}
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static int cv1800_mbox_send_data(struct mbox_chan *chan, void *data)
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{
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struct cv1800_mbox_chan_priv *priv =
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(struct cv1800_mbox_chan_priv *)chan->con_priv;
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struct cv1800_mbox *mbox = dev_get_drvdata(chan->mbox->dev);
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int idx = priv->idx;
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int cpu = priv->cpu;
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u8 en, valid;
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memcpy_toio(MBOX_CONTEXT_BASE_INDEX(mbox->mbox_base, idx),
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data, MAILBOX_MSG_LEN);
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valid = BIT(idx);
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writeb(valid, mbox->mbox_base + MBOX_SET_CLR_REG(cpu));
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en = readb(mbox->mbox_base + MBOX_EN_REG(cpu));
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writeb(en | valid, mbox->mbox_base + MBOX_EN_REG(cpu));
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writeb(valid, mbox->mbox_base + MBOX_SET_REG);
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return 0;
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}
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static bool cv1800_last_tx_done(struct mbox_chan *chan)
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{
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struct cv1800_mbox_chan_priv *priv =
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(struct cv1800_mbox_chan_priv *)chan->con_priv;
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struct cv1800_mbox *mbox = dev_get_drvdata(chan->mbox->dev);
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u8 en;
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en = readb(mbox->mbox_base + MBOX_EN_REG(priv->cpu));
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return !(en & BIT(priv->idx));
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}
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static const struct mbox_chan_ops cv1800_mbox_chan_ops = {
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.send_data = cv1800_mbox_send_data,
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.last_tx_done = cv1800_last_tx_done,
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};
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static struct mbox_chan *cv1800_mbox_xlate(struct mbox_controller *mbox,
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const struct of_phandle_args *spec)
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{
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struct cv1800_mbox_chan_priv *priv;
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int idx = spec->args[0];
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int cpu = spec->args[1];
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if (idx >= mbox->num_chans)
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return ERR_PTR(-EINVAL);
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priv = mbox->chans[idx].con_priv;
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priv->cpu = cpu;
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return &mbox->chans[idx];
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}
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static const struct of_device_id cv1800_mbox_of_match[] = {
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{ .compatible = "sophgo,cv1800b-mailbox", },
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{},
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};
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MODULE_DEVICE_TABLE(of, cv1800_mbox_of_match);
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static int cv1800_mbox_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct cv1800_mbox *mb;
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int irq, idx, err;
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mb = devm_kzalloc(dev, sizeof(*mb), GFP_KERNEL);
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if (!mb)
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return -ENOMEM;
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mb->mbox_base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(mb->mbox_base))
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return dev_err_probe(dev, PTR_ERR(mb->mbox_base),
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"Failed to map resource\n");
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mb->mbox.dev = dev;
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mb->mbox.chans = mb->chans;
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mb->mbox.txdone_poll = true;
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mb->mbox.ops = &cv1800_mbox_chan_ops;
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mb->mbox.num_chans = MAILBOX_MAX_CHAN;
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mb->mbox.of_xlate = cv1800_mbox_xlate;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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err = devm_request_threaded_irq(dev, irq, cv1800_mbox_irq,
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cv1800_mbox_isr, IRQF_ONESHOT,
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dev_name(&pdev->dev), mb);
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if (err < 0)
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return dev_err_probe(dev, err, "Failed to register irq\n");
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for (idx = 0; idx < MAILBOX_MAX_CHAN; idx++) {
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mb->priv[idx].idx = idx;
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mb->mbox.chans[idx].con_priv = &mb->priv[idx];
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}
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platform_set_drvdata(pdev, mb);
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err = devm_mbox_controller_register(dev, &mb->mbox);
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if (err)
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return dev_err_probe(dev, err, "Failed to register mailbox\n");
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return 0;
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}
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static struct platform_driver cv1800_mbox_driver = {
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.driver = {
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.name = "cv1800-mbox",
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.of_match_table = cv1800_mbox_of_match,
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},
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.probe = cv1800_mbox_probe,
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};
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module_platform_driver(cv1800_mbox_driver);
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MODULE_DESCRIPTION("cv1800 mailbox driver");
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MODULE_LICENSE("GPL");
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