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drm/i915/dsi: set pipe_bpp on ICL configure config

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The ICL DSI pipe_bpp currently comes from
compute_baseline_pipe_bpp(). Fix it.

Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/191f5c4fa5f4af29d4bf7e30bb35f45ce05b33f0.1575974743.git.jani.nikula@intel.com
This commit is contained in:
Jani Nikula 2019-12-10 12:50:53 +02:00
parent fbacb15ea8
commit 50003bf50d
1 changed files with 5 additions and 0 deletions
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5
drivers/gpu/drm/i915/display/icl_dsi.c
View file

@ -1286,6 +1286,11 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
else
pipe_config->cpu_transcoder = TRANSCODER_DSI_0;
if (intel_dsi->pixel_format == MIPI_DSI_FMT_RGB888)
pipe_config->pipe_bpp = 24;
else
pipe_config->pipe_bpp = 18;
pipe_config->clock_set = true;
pipe_config->port_clock = intel_dsi_bitrate(intel_dsi) / 5;