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drm/amdgpu/vcn3.0: convert to IP version checking

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Use IP versions rather than asic_type to differentiate
IP version specific features.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2021-08-09 11:40:48 -04:00
parent bc7c3d1d8a
commit 4edbbfde89
1 changed files with 4 additions and 4 deletions
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8
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
View file

@ -95,7 +95,7 @@ static int vcn_v3_0_early_init(void *handle)
adev->vcn.num_enc_rings = 1;
} else {
if (adev->asic_type == CHIP_SIENNA_CICHLID) {
if (adev->ip_versions[UVD_HWIP] == IP_VERSION(3, 0, 0)) {
u32 harvest;
adev->vcn.num_vcn_inst = VCN_INSTANCES_SIENNA_CICHLID;
@ -112,7 +112,7 @@ static int vcn_v3_0_early_init(void *handle)
} else
adev->vcn.num_vcn_inst = 1;
if (adev->asic_type == CHIP_BEIGE_GOBY)
if (adev->ip_versions[UVD_HWIP] == IP_VERSION(3, 0, 33))
adev->vcn.num_enc_rings = 0;
else
adev->vcn.num_enc_rings = 2;
@ -1272,7 +1272,7 @@ static int vcn_v3_0_start(struct amdgpu_device *adev)
fw_shared->rb.wptr = lower_32_bits(ring->wptr);
fw_shared->multi_queue.decode_queue_mode &= cpu_to_le32(~FW_QUEUE_RING_RESET);
if (adev->asic_type != CHIP_BEIGE_GOBY) {
if (adev->ip_versions[UVD_HWIP] != IP_VERSION(3, 0, 33)) {
fw_shared->multi_queue.encode_generalpurpose_queue_mode |= cpu_to_le32(FW_QUEUE_RING_RESET);
ring = &adev->vcn.inst[i].ring_enc[0];
WREG32_SOC15(VCN, i, mmUVD_RB_RPTR, lower_32_bits(ring->wptr));
@ -1644,7 +1644,7 @@ static int vcn_v3_0_pause_dpg_mode(struct amdgpu_device *adev,
UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK,
~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK);
if (adev->asic_type != CHIP_BEIGE_GOBY) {
if (adev->ip_versions[UVD_HWIP] != IP_VERSION(3, 0, 33)) {
/* Restore */
fw_shared = adev->vcn.inst[inst_idx].fw_shared_cpu_addr;
fw_shared->multi_queue.encode_generalpurpose_queue_mode |= cpu_to_le32(FW_QUEUE_RING_RESET);