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drm/radeon: add get_allowed_info_register for SI

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Registers that can be fetched from the info ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2014-10-01 10:03:31 -04:00
parent e66582f9ff
commit 4af692f6e3
4 changed files with 34 additions and 0 deletions
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1
drivers/gpu/drm/radeon/radeon_asic.c
View file

@ -1908,6 +1908,7 @@ static struct radeon_asic si_asic = {
.mc_wait_for_idle = &evergreen_mc_wait_for_idle, .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
.get_xclk = &si_get_xclk, .get_xclk = &si_get_xclk,
.get_gpu_clock_counter = &si_get_gpu_clock_counter, .get_gpu_clock_counter = &si_get_gpu_clock_counter,
.get_allowed_info_register = si_get_allowed_info_register,
.gart = { .gart = {
.tlb_flush = &si_pcie_gart_tlb_flush, .tlb_flush = &si_pcie_gart_tlb_flush,
.get_page_entry = &rs600_gart_get_page_entry, .get_page_entry = &rs600_gart_get_page_entry,

2
drivers/gpu/drm/radeon/radeon_asic.h
View file

@ -746,6 +746,8 @@ u32 si_get_xclk(struct radeon_device *rdev);
uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev); uint64_t si_get_gpu_clock_counter(struct radeon_device *rdev);
int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk); int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk);
int si_get_temp(struct radeon_device *rdev); int si_get_temp(struct radeon_device *rdev);
int si_get_allowed_info_register(struct radeon_device *rdev,
u32 reg, u32 *val);
int si_dpm_init(struct radeon_device *rdev); int si_dpm_init(struct radeon_device *rdev);
void si_dpm_setup_asic(struct radeon_device *rdev); void si_dpm_setup_asic(struct radeon_device *rdev);
int si_dpm_enable(struct radeon_device *rdev); int si_dpm_enable(struct radeon_device *rdev);

30
drivers/gpu/drm/radeon/si.c
View file

@ -1264,6 +1264,36 @@ static void si_init_golden_registers(struct radeon_device *rdev)
} }
} }
/**
* si_get_allowed_info_register - fetch the register for the info ioctl
*
* @rdev: radeon_device pointer
* @reg: register offset in bytes
* @val: register value
*
* Returns 0 for success or -EINVAL for an invalid register
*
*/
int si_get_allowed_info_register(struct radeon_device *rdev,
u32 reg, u32 *val)
{
switch (reg) {
case GRBM_STATUS:
case GRBM_STATUS2:
case GRBM_STATUS_SE0:
case GRBM_STATUS_SE1:
case SRBM_STATUS:
case SRBM_STATUS2:
case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET):
case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET):
case UVD_STATUS:
*val = RREG32(reg);
return 0;
default:
return -EINVAL;
}
}
#define PCIE_BUS_CLK 10000 #define PCIE_BUS_CLK 10000
#define TCLK (PCIE_BUS_CLK / 10) #define TCLK (PCIE_BUS_CLK / 10)

1
drivers/gpu/drm/radeon/sid.h
View file

@ -1556,6 +1556,7 @@
#define UVD_UDEC_DBW_ADDR_CONFIG 0xEF54 #define UVD_UDEC_DBW_ADDR_CONFIG 0xEF54
#define UVD_RBC_RB_RPTR 0xF690 #define UVD_RBC_RB_RPTR 0xF690
#define UVD_RBC_RB_WPTR 0xF694 #define UVD_RBC_RB_WPTR 0xF694
#define UVD_STATUS 0xf6bc
#define UVD_CGC_CTRL 0xF4B0 #define UVD_CGC_CTRL 0xF4B0
# define DCM (1 << 0) # define DCM (1 << 0)