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usb: dwc2: Add hibernation updates for ULPI PHY

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Added programmming of ULPI_LATCH_EN_DURING_HIB_ENTRY bit in GPWRDN
register when using ULPI PHY during entry/exit to/from hibernation.
This bit set to 1 during entering to hibernation if ULPI PHY used.
On exiting from hibernation this bit reset to 0.
Applicable for both host and device modes.

Signed-off-by: Minas Harutyunyan <Minas.Harutyunyan@synopsys.com>
Link: https://lore.kernel.org/r/e024cb39a7177ec201c873df25ca6365f2e55947.1708948356.git.Minas.Harutyunyan@synopsys.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Minas Harutyunyan 2024-03-13 09:20:03 +00:00 • committed by Greg Kroah-Hartman
parent 535a88dc7d
commit 4483ef3c16
4 changed files with 43 additions and 0 deletions
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5
drivers/usb/dwc2/core.c
View file

@ -249,6 +249,11 @@ void dwc2_hib_restore_common(struct dwc2_hsotg *hsotg, int rem_wakeup,
dwc2_writel(hsotg, gpwrdn, GPWRDN); dwc2_writel(hsotg, gpwrdn, GPWRDN);
udelay(10); udelay(10);
/* Reset ULPI latch */
gpwrdn = dwc2_readl(hsotg, GPWRDN);
gpwrdn &= ~GPWRDN_ULPI_LATCH_EN_DURING_HIB_ENTRY;
dwc2_writel(hsotg, gpwrdn, GPWRDN);
/* Disable PMU interrupt */ /* Disable PMU interrupt */
gpwrdn = dwc2_readl(hsotg, GPWRDN); gpwrdn = dwc2_readl(hsotg, GPWRDN);
gpwrdn &= ~GPWRDN_PMUINTSEL; gpwrdn &= ~GPWRDN_PMUINTSEL;

5
drivers/usb/dwc2/core_intr.c
View file

@ -705,6 +705,11 @@ static inline void dwc_handle_gpwrdn_disc_det(struct dwc2_hsotg *hsotg,
gpwrdn_tmp &= ~GPWRDN_PMUINTSEL; gpwrdn_tmp &= ~GPWRDN_PMUINTSEL;
dwc2_writel(hsotg, gpwrdn_tmp, GPWRDN); dwc2_writel(hsotg, gpwrdn_tmp, GPWRDN);
/* Reset ULPI latch */
gpwrdn = dwc2_readl(hsotg, GPWRDN);
gpwrdn &= ~GPWRDN_ULPI_LATCH_EN_DURING_HIB_ENTRY;
dwc2_writel(hsotg, gpwrdn, GPWRDN);
/* De-assert Wakeup Logic */ /* De-assert Wakeup Logic */
gpwrdn_tmp = dwc2_readl(hsotg, GPWRDN); gpwrdn_tmp = dwc2_readl(hsotg, GPWRDN);
gpwrdn_tmp &= ~GPWRDN_PMUACTV; gpwrdn_tmp &= ~GPWRDN_PMUACTV;

23
drivers/usb/dwc2/gadget.c
View file

@ -5309,6 +5309,8 @@ void dwc2_gadget_program_ref_clk(struct dwc2_hsotg *hsotg)
int dwc2_gadget_enter_hibernation(struct dwc2_hsotg *hsotg) int dwc2_gadget_enter_hibernation(struct dwc2_hsotg *hsotg)
{ {
u32 gpwrdn; u32 gpwrdn;
u32 gusbcfg;
u32 pcgcctl;
int ret = 0; int ret = 0;
/* Change to L2(suspend) state */ /* Change to L2(suspend) state */
@ -5328,6 +5330,22 @@ int dwc2_gadget_enter_hibernation(struct dwc2_hsotg *hsotg)
} }
gpwrdn = GPWRDN_PWRDNRSTN; gpwrdn = GPWRDN_PWRDNRSTN;
udelay(10);
gusbcfg = dwc2_readl(hsotg, GUSBCFG);
if (gusbcfg & GUSBCFG_ULPI_UTMI_SEL) {
/* ULPI interface */
gpwrdn |= GPWRDN_ULPI_LATCH_EN_DURING_HIB_ENTRY;
}
dwc2_writel(hsotg, gpwrdn, GPWRDN);
udelay(10);
/* Suspend the Phy Clock */
pcgcctl = dwc2_readl(hsotg, PCGCTL);
pcgcctl |= PCGCTL_STOPPCLK;
dwc2_writel(hsotg, pcgcctl, PCGCTL);
udelay(10);
gpwrdn = dwc2_readl(hsotg, GPWRDN);
gpwrdn |= GPWRDN_PMUACTV; gpwrdn |= GPWRDN_PMUACTV;
dwc2_writel(hsotg, gpwrdn, GPWRDN); dwc2_writel(hsotg, gpwrdn, GPWRDN);
udelay(10); udelay(10);
@ -5428,6 +5446,11 @@ int dwc2_gadget_exit_hibernation(struct dwc2_hsotg *hsotg,
if (reset) if (reset)
dwc2_clear_bit(hsotg, DCFG, DCFG_DEVADDR_MASK); dwc2_clear_bit(hsotg, DCFG, DCFG_DEVADDR_MASK);
/* Reset ULPI latch */
gpwrdn = dwc2_readl(hsotg, GPWRDN);
gpwrdn &= ~GPWRDN_ULPI_LATCH_EN_DURING_HIB_ENTRY;
dwc2_writel(hsotg, gpwrdn, GPWRDN);
/* De-assert Wakeup Logic */ /* De-assert Wakeup Logic */
gpwrdn = dwc2_readl(hsotg, GPWRDN); gpwrdn = dwc2_readl(hsotg, GPWRDN);
gpwrdn &= ~GPWRDN_PMUACTV; gpwrdn &= ~GPWRDN_PMUACTV;

10
drivers/usb/dwc2/hcd.c
View file

@ -5503,6 +5503,11 @@ int dwc2_host_enter_hibernation(struct dwc2_hsotg *hsotg)
gusbcfg = dwc2_readl(hsotg, GUSBCFG); gusbcfg = dwc2_readl(hsotg, GUSBCFG);
if (gusbcfg & GUSBCFG_ULPI_UTMI_SEL) { if (gusbcfg & GUSBCFG_ULPI_UTMI_SEL) {
/* ULPI interface */ /* ULPI interface */
udelay(10);
gpwrdn = dwc2_readl(hsotg, GPWRDN);
gpwrdn |= GPWRDN_ULPI_LATCH_EN_DURING_HIB_ENTRY;
dwc2_writel(hsotg, gpwrdn, GPWRDN);
udelay(10);
/* Suspend the Phy Clock */ /* Suspend the Phy Clock */
pcgcctl = dwc2_readl(hsotg, PCGCTL); pcgcctl = dwc2_readl(hsotg, PCGCTL);
pcgcctl |= PCGCTL_STOPPCLK; pcgcctl |= PCGCTL_STOPPCLK;
@ -5609,6 +5614,11 @@ int dwc2_host_exit_hibernation(struct dwc2_hsotg *hsotg, int rem_wakeup,
dwc2_writel(hsotg, gr->gusbcfg, GUSBCFG); dwc2_writel(hsotg, gr->gusbcfg, GUSBCFG);
dwc2_writel(hsotg, hr->hcfg, HCFG); dwc2_writel(hsotg, hr->hcfg, HCFG);
/* Reset ULPI latch */
gpwrdn = dwc2_readl(hsotg, GPWRDN);
gpwrdn &= ~GPWRDN_ULPI_LATCH_EN_DURING_HIB_ENTRY;
dwc2_writel(hsotg, gpwrdn, GPWRDN);
/* De-assert Wakeup Logic */ /* De-assert Wakeup Logic */
gpwrdn = dwc2_readl(hsotg, GPWRDN); gpwrdn = dwc2_readl(hsotg, GPWRDN);
gpwrdn &= ~GPWRDN_PMUACTV; gpwrdn &= ~GPWRDN_PMUACTV;