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ice: Reset TS memory for all quads

Browse source 
In E822 products, the owner PF should reset memory for all quads, not
only for the one where assigned lport is.

Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
This commit is contained in:
Karol Kolacinski 2022-12-05 11:52:41 -08:00 • committed by Tony Nguyen
parent 0357d5cab8
commit 407b66c07e
3 changed files with 42 additions and 27 deletions
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29
drivers/net/ethernet/intel/ice/ice_ptp.c
View file

@ -1059,19 +1059,6 @@ static u64 ice_base_incval(struct ice_pf *pf)
return incval;
}
/**
* ice_ptp_reset_ts_memory_quad - Reset timestamp memory for one quad
* @pf: The PF private data structure
* @quad: The quad (0-4)
*/
static void ice_ptp_reset_ts_memory_quad(struct ice_pf *pf, int quad)
{
struct ice_hw *hw = &pf->hw;
ice_write_quad_reg_e822(hw, quad, Q_REG_TS_CTRL, Q_REG_TS_CTRL_M);
ice_write_quad_reg_e822(hw, quad, Q_REG_TS_CTRL, ~(u32)Q_REG_TS_CTRL_M);
}
/**
* ice_ptp_check_tx_fifo - Check whether Tx FIFO is in an OK state
* @port: PTP port for which Tx FIFO is checked
@ -1124,7 +1111,7 @@ static int ice_ptp_check_tx_fifo(struct ice_ptp_port *port)
dev_dbg(ice_pf_to_dev(pf),
"Port %d Tx FIFO still not empty; resetting quad %d\n",
port->port_num, quad);
ice_ptp_reset_ts_memory_quad(pf, quad);
ice_ptp_reset_ts_memory_quad_e822(hw, quad);
port->tx_fifo_busy_cnt = FIFO_OK;
return 0;
}
@ -1370,18 +1357,6 @@ int ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup)
return ice_ptp_port_phy_restart(ptp_port);
}
/**
* ice_ptp_reset_ts_memory - Reset timestamp memory for all quads
* @pf: The PF private data structure
*/
static void ice_ptp_reset_ts_memory(struct ice_pf *pf)
{
int quad;
quad = pf->hw.port_info->lport / ICE_PORTS_PER_QUAD;
ice_ptp_reset_ts_memory_quad(pf, quad);
}
/**
* ice_ptp_tx_ena_intr - Enable or disable the Tx timestamp interrupt
* @pf: PF private structure
@ -1397,7 +1372,7 @@ static int ice_ptp_tx_ena_intr(struct ice_pf *pf, bool ena, u32 threshold)
int quad;
u32 val;
ice_ptp_reset_ts_memory(pf);
ice_ptp_reset_ts_memory(hw);
for (quad = 0; quad < ICE_MAX_QUAD; quad++) {
err = ice_read_quad_reg_e822(hw, quad, Q_REG_TX_MEM_GBL_CFG,

38
drivers/net/ethernet/intel/ice/ice_ptp_hw.c
View file

@ -655,6 +655,32 @@ ice_clear_phy_tstamp_e822(struct ice_hw *hw, u8 quad, u8 idx)
return 0;
}
/**
* ice_ptp_reset_ts_memory_quad_e822 - Clear all timestamps from the quad block
* @hw: pointer to the HW struct
* @quad: the quad to read from
*
* Clear all timestamps from the PHY quad block that is shared between the
* internal PHYs on the E822 devices.
*/
void ice_ptp_reset_ts_memory_quad_e822(struct ice_hw *hw, u8 quad)
{
ice_write_quad_reg_e822(hw, quad, Q_REG_TS_CTRL, Q_REG_TS_CTRL_M);
ice_write_quad_reg_e822(hw, quad, Q_REG_TS_CTRL, ~(u32)Q_REG_TS_CTRL_M);
}
/**
* ice_ptp_reset_ts_memory_e822 - Clear all timestamps from all quad blocks
* @hw: pointer to the HW struct
*/
static void ice_ptp_reset_ts_memory_e822(struct ice_hw *hw)
{
unsigned int quad;
for (quad = 0; quad < ICE_MAX_QUAD; quad++)
ice_ptp_reset_ts_memory_quad_e822(hw, quad);
}
/**
* ice_read_cgu_reg_e822 - Read a CGU register
* @hw: pointer to the HW struct
@ -3247,6 +3273,18 @@ bool ice_is_pca9575_present(struct ice_hw *hw)
return !status && handle;
}
/**
* ice_ptp_reset_ts_memory - Reset timestamp memory for all blocks
* @hw: pointer to the HW struct
*/
void ice_ptp_reset_ts_memory(struct ice_hw *hw)
{
if (ice_is_e810(hw))
return;
ice_ptp_reset_ts_memory_e822(hw);
}
/**
* ice_ptp_init_phc - Initialize PTP hardware clock
* @hw: pointer to the HW struct

2
drivers/net/ethernet/intel/ice/ice_ptp_hw.h
View file

@ -133,6 +133,7 @@ int ice_ptp_write_incval_locked(struct ice_hw *hw, u64 incval);
int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj);
int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp);
int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx);
void ice_ptp_reset_ts_memory(struct ice_hw *hw);
int ice_ptp_init_phc(struct ice_hw *hw);
/* E822 family functions */
@ -141,6 +142,7 @@ int ice_write_phy_reg_e822(struct ice_hw *hw, u8 port, u16 offset, u32 val);
int ice_read_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 *val);
int ice_write_quad_reg_e822(struct ice_hw *hw, u8 quad, u16 offset, u32 val);
int ice_ptp_prep_port_adj_e822(struct ice_hw *hw, u8 port, s64 time);
void ice_ptp_reset_ts_memory_quad_e822(struct ice_hw *hw, u8 quad);
/**
* ice_e822_time_ref - Get the current TIME_REF from capabilities