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wifi: ath11k: Fix miscellaneous spelling errors
Fix misspellings flagged by 'codespell'. Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20220909145535.20437-1-quic_jjohnson@quicinc.com
This commit is contained in:
parent
b8a71b9536
commit
3fecca0e7d
17 changed files with 28 additions and 28 deletions
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@ -250,7 +250,7 @@ const struct ce_attr ath11k_host_ce_config_qcn9074[] = {
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static bool ath11k_ce_need_shadow_fix(int ce_id)
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{
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/* only ce4 needs shadow workaroud*/
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/* only ce4 needs shadow workaround */
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if (ce_id == 4)
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return true;
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return false;
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@ -1042,7 +1042,7 @@ int ath11k_ce_alloc_pipes(struct ath11k_base *ab)
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ret = ath11k_ce_alloc_pipe(ab, i);
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if (ret) {
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/* Free any parial successful allocation */
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/* Free any partial successful allocation */
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ath11k_ce_free_pipes(ab);
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return ret;
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}
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@ -887,7 +887,7 @@ struct ath11k_base {
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/* Below regd's are protected by ab->data_lock */
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/* This is the regd set for every radio
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* by the firmware during initializatin
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* by the firmware during initialization
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*/
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struct ieee80211_regdomain *default_regd[MAX_RADIOS];
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/* This regd is set during dynamic country setting
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@ -630,7 +630,7 @@ struct htt_tx_hwq_tried_mpdu_cnt_hist_tlv_v {
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* completing the burst, we identify the txop used in the burst and
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* incr the corresponding bin.
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* Each bin represents 1ms & we have 10 bins in this histogram.
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* they are deined in FW using the following macros
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* they are defined in FW using the following macros
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* #define WAL_MAX_TXOP_USED_CNT_HISTOGRAM 10
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* #define WAL_TXOP_USED_HISTOGRAM_INTERVAL 1000 ( 1 ms )
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*/
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@ -1897,7 +1897,7 @@ struct htt_phy_counters_tlv {
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u32 phytx_abort_cnt;
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/* number of times rx abort initiated by phy */
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u32 phyrx_abort_cnt;
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/* number of rx defered count initiated by phy */
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/* number of rx deferred count initiated by phy */
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u32 phyrx_defer_abort_cnt;
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/* number of sizing events generated at LSTF */
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u32 rx_gain_adj_lstf_event_cnt;
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@ -967,7 +967,7 @@ static void ath11k_dp_update_vdev_search(struct ath11k_vif *arvif)
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{
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/* When v2_map_support is true:for STA mode, enable address
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* search index, tcl uses ast_hash value in the descriptor.
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* When v2_map_support is false: for STA mode, dont' enable
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* When v2_map_support is false: for STA mode, don't enable
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* address search index.
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*/
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switch (arvif->vdev_type) {
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@ -303,7 +303,7 @@ struct ath11k_dp {
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#define HTT_TX_WBM_COMP_STATUS_OFFSET 8
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/* HTT tx completion is overlayed in wbm_release_ring */
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/* HTT tx completion is overlaid in wbm_release_ring */
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#define HTT_TX_WBM_COMP_INFO0_STATUS GENMASK(12, 9)
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#define HTT_TX_WBM_COMP_INFO0_REINJECT_REASON GENMASK(16, 13)
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#define HTT_TX_WBM_COMP_INFO0_REINJECT_REASON GENMASK(16, 13)
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@ -470,7 +470,7 @@ enum htt_srng_ring_id {
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* 3'b010: 4 usec
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* 3'b011: 8 usec (default)
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* 3'b100: 16 usec
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* Others: Reserverd
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* Others: Reserved
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* b'19 - response_required:
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* Host needs HTT_T2H_MSG_TYPE_SRING_SETUP_DONE as response
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* b'20:31 - reserved: reserved for future use
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@ -2499,7 +2499,7 @@ static void ath11k_dp_rx_deliver_msdu(struct ath11k *ar, struct napi_struct *nap
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/* PN for multicast packets are not validate in HW,
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* so skip 802.3 rx path
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* Also, fast_rx expectes the STA to be authorized, hence
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* Also, fast_rx expects the STA to be authorized, hence
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* eapol packets are sent in slow path.
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*/
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if (decap == DP_RX_DECAP_TYPE_ETHERNET2_DIX && !is_eapol &&
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@ -752,7 +752,7 @@ int ath11k_dp_tx_send_reo_cmd(struct ath11k_base *ab, struct dp_rx_tid *rx_tid,
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return 0;
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/* Can this be optimized so that we keep the pending command list only
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* for tid delete command to free up the resoruce on the command status
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* for tid delete command to free up the resource on the command status
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* indication?
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*/
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dp_cmd = kzalloc(sizeof(*dp_cmd), GFP_ATOMIC);
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@ -1164,7 +1164,7 @@ void ath11k_hal_srng_shadow_update_hp_tp(struct ath11k_base *ab,
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{
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lockdep_assert_held(&srng->lock);
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/* check whether the ring is emptry. Update the shadow
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/* check whether the ring is empty. Update the shadow
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* HP only when then ring isn't empty.
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*/
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if (srng->ring_dir == HAL_SRNG_DIR_SRC &&
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@ -243,7 +243,7 @@ struct ath11k_base;
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#define HAL_WBM0_RELEASE_RING_HP 0x000030c0
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#define HAL_WBM1_RELEASE_RING_HP 0x000030c8
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/* TCL ring feild mask and offset */
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/* TCL ring field mask and offset */
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#define HAL_TCL1_RING_BASE_MSB_RING_SIZE GENMASK(27, 8)
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#define HAL_TCL1_RING_BASE_MSB_RING_BASE_ADDR_MSB GENMASK(7, 0)
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#define HAL_TCL1_RING_ID_ENTRY_SIZE GENMASK(7, 0)
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@ -268,7 +268,7 @@ struct ath11k_base;
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#define HAL_TCL1_RING_FIELD_DSCP_TID_MAP6 GENMASK(20, 18)
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#define HAL_TCL1_RING_FIELD_DSCP_TID_MAP7 GENMASK(23, 21)
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/* REO ring feild mask and offset */
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/* REO ring field mask and offset */
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#define HAL_REO1_RING_BASE_MSB_RING_SIZE GENMASK(27, 8)
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#define HAL_REO1_RING_BASE_MSB_RING_BASE_ADDR_MSB GENMASK(7, 0)
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#define HAL_REO1_RING_ID_RING_ID GENMASK(15, 8)
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@ -636,7 +636,7 @@ struct hal_srng {
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} u;
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};
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/* Interrupt mitigation - Batch threshold in terms of numer of frames */
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/* Interrupt mitigation - Batch threshold in terms of number of frames */
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#define HAL_SRNG_INT_BATCH_THRESHOLD_TX 256
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#define HAL_SRNG_INT_BATCH_THRESHOLD_RX 128
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#define HAL_SRNG_INT_BATCH_THRESHOLD_OTHER 1
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@ -607,7 +607,7 @@ struct rx_msdu_desc {
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*
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* msdu_continuation
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* When set, this MSDU buffer was not able to hold the entire MSDU.
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* The next buffer will therefor contain additional information
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* The next buffer will therefore contain additional information
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* related to this MSDU.
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*
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* msdu_length
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@ -643,7 +643,7 @@ struct rx_msdu_desc {
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*
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* da_idx_timeout
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* Indicates, an unsuccessful MAC destination address search due
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* to the expiration of search timer fot this MSDU.
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* to the expiration of search timer for this MSDU.
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*/
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enum hal_reo_dest_ring_buffer_type {
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@ -1678,7 +1678,7 @@ struct hal_wbm_release_ring {
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* Producer: SW/TQM/RXDMA/REO/SWITCH
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* Consumer: WBM/SW/FW
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*
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* HTT tx status is overlayed on wbm_release ring on 4-byte words 2, 3, 4 and 5
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* HTT tx status is overlaid on wbm_release ring on 4-byte words 2, 3, 4 and 5
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* for software based completions.
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*
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* buf_addr_info
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@ -2159,7 +2159,7 @@ struct hal_reo_status_hdr {
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* commands.
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*
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* execution_time (in us)
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* The amount of time REO took to excecute the command. Note that
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* The amount of time REO took to execute the command. Note that
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* this time does not include the duration of the command waiting
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* in the command ring, before the execution started.
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*
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@ -3059,7 +3059,7 @@ static int ath11k_mac_config_obss_pd(struct ath11k *ar,
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return ret;
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}
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/* Enable all patial BSSID mask for SRG */
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/* Enable all partial BSSID mask for SRG */
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ret = ath11k_wmi_pdev_srg_obss_bssid_enable_bitmap(ar, bitmap);
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if (ret) {
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ath11k_warn(ar->ab,
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@ -3077,7 +3077,7 @@ static int ath11k_mac_config_obss_pd(struct ath11k *ar,
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return ret;
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}
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/* Enable all patial BSSID mask for non-SRG */
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/* Enable all partial BSSID mask for non-SRG */
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ret = ath11k_wmi_pdev_non_srg_obss_bssid_enable_bitmap(ar, bitmap);
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if (ret) {
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ath11k_warn(ar->ab,
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@ -1879,7 +1879,7 @@ static int ath11k_qmi_respond_fw_mem_request(struct ath11k_base *ab)
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/* For QCA6390 by default FW requests a block of ~4M contiguous
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* DMA memory, it's hard to allocate from OS. So host returns
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* failure to FW and FW will then request mulitple blocks of small
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* failure to FW and FW will then request multiple blocks of small
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* chunk size memory.
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*/
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if (!(ab->hw_params.fixed_mem_region ||
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@ -877,7 +877,7 @@ struct rx_msdu_start_wcn6855 {
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*
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* l4_offset
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* Depending upon mode bit, this field either indicates the
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* L4 offset nin bytes from the start of RX_HEADER (only valid
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* L4 offset in bytes from the start of RX_HEADER (only valid
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* if either ipv4_proto or ipv6_proto is set to 1) or indicates
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* the offset in bytes to the start of TCP or UDP header from
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* the start of the IP header after decapsulation (Only valid if
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@ -99,7 +99,7 @@ static ssize_t ath11k_thermal_show_temp(struct device *dev,
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temperature = ar->thermal.temperature;
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spin_unlock_bh(&ar->data_lock);
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/* display in millidegree celcius */
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/* display in millidegree Celsius */
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ret = snprintf(buf, PAGE_SIZE, "%d\n", temperature * 1000);
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out:
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mutex_unlock(&ar->conf_mutex);
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@ -19,7 +19,7 @@ struct ath11k_thermal {
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/* protected by conf_mutex */
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u32 throttle_state;
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/* temperature value in Celcius degree
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/* temperature value in Celsius degree
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* protected by data_lock
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*/
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int temperature;
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@ -416,7 +416,7 @@ ath11k_pull_mac_phy_cap_svc_ready_ext(struct ath11k_pdev_wmi *wmi_handle,
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/* tx/rx chainmask reported from fw depends on the actual hw chains used,
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* For example, for 4x4 capable macphys, first 4 chains can be used for first
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* mac and the remaing 4 chains can be used for the second mac or vice-versa.
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* mac and the remaining 4 chains can be used for the second mac or vice-versa.
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* In this case, tx/rx chainmask 0xf will be advertised for first mac and 0xf0
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* will be advertised for second mac or vice-versa. Compute the shift value
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* for tx/rx chainmask which will be used to advertise supported ht/vht rates to
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@ -17,7 +17,7 @@ struct ath11k_vif;
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#define PSOC_HOST_MAX_NUM_SS (8)
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/* defines to set Packet extension values whic can be 0 us, 8 usec or 16 usec */
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/* defines to set Packet extension values which can be 0 us, 8 usec or 16 usec */
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#define MAX_HE_NSS 8
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#define MAX_HE_MODULATION 8
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#define MAX_HE_RU 4
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@ -4482,7 +4482,7 @@ struct wmi_pdev_radar_ev {
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} __packed;
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struct wmi_pdev_temperature_event {
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/* temperature value in Celcius degree */
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/* temperature value in Celsius degree */
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s32 temp;
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u32 pdev_id;
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} __packed;
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@ -4708,7 +4708,7 @@ enum wmi_sta_ps_param_tx_wake_threshold {
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*/
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enum wmi_sta_ps_param_pspoll_count {
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WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
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/* Values greater than 0 indicate the maximum numer of PS-Poll frames
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/* Values greater than 0 indicate the maximum number of PS-Poll frames
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* FW will send before waking up.
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*/
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};
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