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ARM: OMAP2+: hwmod data: Fix PMU interrupt definitions
Commit7d7e1eb(ARM: OMAP2+: Prepare for irqs.h removal) and commitec2c082(ARM: OMAP2+: Remove hardcoded IRQs and enable SPARSE_IRQ) updated the way interrupts for OMAP2/3 devices are defined in the HWMOD data structures to being an index plus a fixed offset (defined by OMAP_INTC_START). The definition of the PMU interrupts on OMAP2/3 devices is missing the OMAP_INTC_START offset and so this is causing the allocation of PMU interrupts to fail on OMAP2/3 devices. So add the offset to fix this. This is patch is based upon Tony's master branch for OMAP. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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2efd543993
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2 changed files with 2 additions and 2 deletions
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@ -219,7 +219,7 @@ struct omap_hwmod omap2xxx_l4_wkup_hwmod = {
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/* MPU */
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/* MPU */
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static struct omap_hwmod_irq_info omap2xxx_mpu_irqs[] = {
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static struct omap_hwmod_irq_info omap2xxx_mpu_irqs[] = {
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{ .name = "pmu", .irq = 3 },
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{ .name = "pmu", .irq = 3 + OMAP_INTC_START },
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{ .irq = -1 }
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{ .irq = -1 }
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};
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};
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@ -94,7 +94,7 @@ static struct omap_hwmod omap3xxx_l4_sec_hwmod = {
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/* MPU */
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/* MPU */
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static struct omap_hwmod_irq_info omap3xxx_mpu_irqs[] = {
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static struct omap_hwmod_irq_info omap3xxx_mpu_irqs[] = {
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{ .name = "pmu", .irq = 3 },
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{ .name = "pmu", .irq = 3 + OMAP_INTC_START },
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{ .irq = -1 }
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{ .irq = -1 }
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};
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};
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