Amlogic ARM64 DT changes for v5.18:

- New Boards:
  - Amediatek X96-AIR (Amlogic S905X3)
  - CYX A95XF3-AIR (Amlogic S905X3)
  - Haochuangy H96-Max (Amlogic S905X3)
  - Amlogic AQ222 (Amlogic S4)
  - OSMC Vero 4K+ (Amlogic S905D)
 - Initial support for Amlogic S4
 - Support for uart_ao_b & pwm_f on G12 SoCs
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmITd8cACgkQd9zb2sjI
 SdHmpRAAl2jQspBK/xAfWhPIDTq24N0dv1nM5NfSxQWTkKc81+BkRQ8RBxstOMh/
 8r+t9PTYY6kl7A07F7cACvL28xvITBkIoP/OQa6ycMORz8sd/TIhP+zaXK7VjiXv
 IQ8C+dqcm0Jow/iO2FqWLj1juJPYZ/4W2SfiImIPrpmQc0qmKz0so+KBAZiBYYLt
 hOi7LWGddbk/FnUsXRgbXkIzc5+xbgHDquOJkeO1umO3Xx/70fCRIZ6j4nc8SHBr
 4kuE7mSToqsNkI4XwNQYhcbjfPaqUg7feAvKJfmidWSpKWRSjYdR0oUCks0PAAth
 FIxkvLPHxsd4jA30Q2PKYVowuVh44dBk8gCdhJ0NrHi9YZkpAuCwt2uySXB0iQnT
 AVNgWnb6OdAUjfd/94nu4/d/pDW0H1GHwKc4/wqjcGaLjL1cm/Cv9PKagIfwoDcA
 4HKY23TE9jwXZp0ZRgCgI0pEg/j9XCUvoxzei3oq8FCtNrvP0FvkrTuMk2xhzuIq
 9O5963EBLFFpDYcalds3aJgKNzX+EfsC70bpv+VXTYbv/iHW+1RdMqlIWSWb9twc
 KMrohiiK0hlu+gQEHUQKaWKuC63XF4WYHB1DQb+bdCm1ak+gLCAuzKokj4dL5b69
 zBwnO5RvshX+n3ThqTC2uOFnLx24V10xAL55faMxa66KwnnHdyo=
 =/1MJ
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIY72sACgkQmmx57+YA
 GNmfhQ/7BpbYlPrAH9/u0xijjsOmqDq9ml2Hj5x85NtG+0qDgVepEEmsGJ2MfMuj
 UZt3sh+YAoxQhSG8rOuwCUCoBJFyVSQlR9JykmUZrVZ/mmJ5oZS8jWL30PJZ7B98
 k3ArlS65lxrtnFljcDRV+HSpBe6cpWQokwPvH14OaKFFkOeGSoXUBvOi6oarTrqo
 PeU+O2dgYAGYnAcgnvv2ITs8Z+32KvhQ0V6VIirwtHQEUxHSDPCCYrxOpBgzeZB/
 /Cb6EaSf6xuKgcWEb05AP6NKzMdmjJVumDuqm53f1jgkPRQsuqwFqOCn2w8Glr/7
 2f+1a85V8Bm2o70r+C4hXuHIjMmpYpgR7t3LdGwvOtJITzld8KFeioZYCkL/OjUe
 lCxf/gOIDM+qItF0hq79u4G5CGRPQ3GqHHixrYbpBgHQB7r3HMA4IB6qL6tqlz8t
 B86baw361P2riYIBFdL+ERMouM2rkI2GOm6lFvIZgfnLNJLprEDhNUXuyWjY303f
 2lUCI2KEW+w7cHBscoUTju/D5frg/JeDjWzM1rwCEByJDde1B4MRPoDPq+v12vBS
 97j+m/nSPmloAe5jiFk7R7xN04DSSDYAseehOuZoStu4ynhoboo1HUIWJ5bQ7Se4
 IRRTdVwmNZPdfC9iRwiOEsLQf5G7jCcRawhXLWneAbR/2pc/xjA=
 =FCVR
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-arm64-dt-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/dt

Amlogic ARM64 DT changes for v5.18:
- New Boards:
 - Amediatek X96-AIR (Amlogic S905X3)
 - CYX A95XF3-AIR (Amlogic S905X3)
 - Haochuangy H96-Max (Amlogic S905X3)
 - Amlogic AQ222 (Amlogic S4)
 - OSMC Vero 4K+ (Amlogic S905D)
- Initial support for Amlogic S4
- Support for uart_ao_b & pwm_f on G12 SoCs

* tag 'amlogic-arm64-dt-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  arm64: dts: meson: add support for OSMC Vero 4K+
  dt-bindings: arm: amlogic: add Vero 4K+ bindings
  dt-bindings: vendor-prefixes: add osmc prefix
  arm64: dts: meson-g12-common: add uart_ao_b pins muxing
  arm64: dts: meson-g12-common: add more pwm_f options
  arm64: dts: add support for S4 based Amlogic AQ222
  arm64: dts: meson: add initial device-tree for H96-Max
  dt-bindings: arm: amlogic: add H96-Max bindings
  dt-bindings: vendor-prefixes: add haochuangyi prefix
  arm64: dts: meson: add initial device-trees for A95XF3-AIR
  dt-bindings: arm: amlogic: add A95XF3-AIR bindings
  dt-bindings: vendor-prefixes: add cyx prefix
  arm64: dts: meson: add initial device-trees for X96-AIR
  dt-bindings: arm: amlogic: add X96-AIR bindings
  arm64: dts: meson: add common SM1 ac2xx dtsi
  arm64: dts: meson-sm1: add spdifin and pdifout nodes
  dt-bindings: arm: amlogic: add S4 based AQ222 bindings

Link: https://lore.kernel.org/r/a7cd9937-d441-3e1f-9709-8e80cc8814f1@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-02-25 16:02:02 +01:00
commit 3b364358cb
14 changed files with 1268 additions and 0 deletions

View file

@ -108,6 +108,7 @@ properties:
- amlogic,p230
- amlogic,p231
- libretech,aml-s905d-pc
- osmc,vero4k-plus
- phicomm,n1
- smartlabs,sml5442tw
- videostrong,gxl-kii-pro
@ -170,9 +171,14 @@ properties:
- description: Boards with the Amlogic Meson SM1 S905X3/D3/Y3 SoC
items:
- enum:
- amediatech,x96-air
- amediatech,x96-air-gbit
- bananapi,bpi-m5
- cyx,a95xf3-air
- cyx,a95xf3-air-gbit
- hardkernel,odroid-c4
- hardkernel,odroid-hc4
- haochuangyi,h96-max
- khadas,vim3l
- seirobotics,sei610
- const: amlogic,sm1
@ -183,6 +189,12 @@ properties:
- amlogic,ad401
- const: amlogic,a1
- description: Boards with the Amlogic Meson S4 S805X2 SoC
items:
- enum:
- amlogic,aq222
- const: amlogic,s4
additionalProperties: true
...

View file

@ -285,6 +285,8 @@ patternProperties:
description: CUI Devices
"^cypress,.*":
description: Cypress Semiconductor Corporation
"^cyx,.*":
description: Shenzhen CYX Industrial Co., Ltd
"^cznic,.*":
description: CZ.NIC, z.s.p.o.
"^dallas,.*":
@ -491,6 +493,8 @@ patternProperties:
deprecated: true
"^hannstar,.*":
description: HannStar Display Corporation
"^haochuangyi,.*":
description: Shenzhen Haochuangyi Technology Co.,Ltd
"^haoyu,.*":
description: Haoyu Microelectronic Co. Ltd.
"^hardkernel,.*":
@ -896,6 +900,8 @@ patternProperties:
description: Ortus Technology Co., Ltd.
"^osddisplays,.*":
description: OSD Displays
"^osmc,.*":
description: Sam Nazarko Trading Ltd. (Open Source Media Centre)
"^ouya,.*":
description: Ouya Inc.
"^overkiz,.*":

View file

@ -36,6 +36,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p230.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p231.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-phicomm-n1.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-sml5442tw.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-vero4k-plus.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s805x-p241.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905w-p281.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905w-tx3-mini.dtb
@ -51,9 +52,15 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-rbox-pro.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-libretech-pc.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-vega-s96.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-wetek-core2.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-a95xf3-air.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-a95xf3-air-gbit.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-bananapi-m5.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-h96-max.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-c4.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-hc4.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-sei610.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-x96-air-gbit.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-s4-s805x2-aq222.dtb

View file

@ -839,6 +839,22 @@
};
};
pwm_f_z_pins: pwm-f-z {
mux {
groups = "pwm_f_z";
function = "pwm_f";
bias-disable;
};
};
pwm_f_a_pins: pwm-f-a {
mux {
groups = "pwm_f_a";
function = "pwm_f";
bias-disable;
};
};
pwm_f_x_pins: pwm-f-x {
mux {
groups = "pwm_f_x";
@ -1881,6 +1897,33 @@
};
};
uart_ao_b_2_3_pins: uart-ao-b-2-3 {
mux {
groups = "uart_ao_b_tx_2",
"uart_ao_b_rx_3";
function = "uart_ao_b";
bias-disable;
};
};
uart_ao_b_8_9_pins: uart-ao-b-8-9 {
mux {
groups = "uart_ao_b_tx_8",
"uart_ao_b_rx_9";
function = "uart_ao_b";
bias-disable;
};
};
uart_ao_b_cts_rts_pins: uart-ao-b-cts-rts {
mux {
groups = "uart_ao_b_cts",
"uart_ao_b_rts";
function = "uart_ao_b";
bias-disable;
};
};
pwm_a_e_pins: pwm-a-e {
mux {
groups = "pwm_a_e";

View file

@ -0,0 +1,117 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Author: Christian Hewitt <christianshewitt@gmail.com>
*/
/dts-v1/;
#include "meson-gxl-s905d.dtsi"
#include "meson-gx-p23x-q20x.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
compatible = "osmc,vero4k-plus", "amlogic,s905d", "amlogic,meson-gxl";
model = "OSMC Vero 4K Plus";
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <20>;
button@0 {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
};
};
leds {
compatible = "gpio-leds";
led-standby {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_POWER;
gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_LOW>;
default-state = "off";
panic-indicator;
};
};
};
&ethmac {
pinctrl-0 = <&eth_pins>;
pinctrl-names = "default";
phy-mode = "rgmii-txid";
phy-handle = <&external_phy>;
amlogic,tx-delay-ns = <0>;
};
&external_mdio {
external_phy: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
pinctrl-0 = <&eth_phy_irq_pin>;
pinctrl-names = "default";
reg = <0>;
max-speed = <1000>;
reset-assert-us = <10000>;
reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
};
};
&pinctrl_periphs {
/* Ensure the phy irq pin is properly configured as input */
eth_phy_irq_pin: eth-phy-irq {
mux {
groups = "GPIOZ_15";
function = "gpio_periphs";
bias-disable;
output-disable;
};
};
};
&sd_emmc_a {
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
};
&uart_A {
status = "okay";
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
pinctrl-names = "default";
uart-has-rtscts;
bluetooth {
compatible = "brcm,bcm43438-bt";
shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
max-speed = <2000000>;
clocks = <&wifi32k>;
clock-names = "lpo";
};
};
&usb {
dr_mode = "host";
};
&usb2_phy0 {
/* HDMI_5V also supplies the USB VBUS */
phy-supply = <&hdmi_5v>;
};
&usb2_phy0 {
/* HDMI_5V also supplies the USB VBUS */
phy-supply = <&hdmi_5v>;
};

View file

@ -0,0 +1,30 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Amlogic, Inc. All rights reserved.
*/
/dts-v1/;
#include "meson-s4.dtsi"
/ {
model = "Amlogic Meson S4 AQ222 Development Board";
compatible = "amlogic,aq222", "amlogic,s4";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
aliases {
serial0 = &uart_B;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x40000000>;
};
};
&uart_B {
status = "okay";
};

View file

@ -0,0 +1,99 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Amlogic, Inc. All rights reserved.
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a35","arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
};
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a35","arm,armv8";
reg = <0x0 0x1>;
enable-method = "psci";
};
cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a35","arm,armv8";
reg = <0x0 0x2>;
enable-method = "psci";
};
cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a35","arm,armv8";
reg = <0x0 0x3>;
enable-method = "psci";
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
xtal: xtal-clk {
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "xtal";
#clock-cells = <0>;
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
gic: interrupt-controller@fff01000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0x0 0xfff01000 0 0x1000>,
<0x0 0xfff02000 0 0x2000>,
<0x0 0xfff04000 0 0x2000>,
<0x0 0xfff06000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
apb4: apb4@fe000000 {
compatible = "simple-bus";
reg = <0x0 0xfe000000 0x0 0x480000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
uart_B: serial@7a000 {
compatible = "amlogic,meson-s4-uart",
"amlogic,meson-ao-uart";
reg = <0x0 0x7a000 0x0 0x18>;
interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
clocks = <&xtal>, <&xtal>, <&xtal>;
clock-names = "xtal", "pclk", "baud";
};
};
};
};

View file

@ -0,0 +1,129 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre SAS. All rights reserved.
* Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
*/
/dts-v1/;
#include "meson-sm1-ac2xx.dtsi"
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
/ {
compatible = "cyx,a95xf3-air-gbit", "amlogic,sm1";
model = "Shenzhen CYX Industrial Co., Ltd A95XF3-AIR";
sound {
compatible = "amlogic,axg-sound-card";
model = "A95XF3-AIR";
audio-aux-devs = <&tdmout_b>;
audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
status = "okay";
dai-link-0 {
sound-dai = <&frddr_a>;
};
dai-link-1 {
sound-dai = <&frddr_b>;
};
dai-link-2 {
sound-dai = <&frddr_c>;
};
/* 8ch hdmi interface */
dai-link-3 {
sound-dai = <&tdmif_b>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-0 = <1 1>;
dai-tdm-slot-tx-mask-1 = <1 1>;
dai-tdm-slot-tx-mask-2 = <1 1>;
dai-tdm-slot-tx-mask-3 = <1 1>;
mclk-fs = <256>;
codec {
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
};
};
/* hdmi glue */
dai-link-4 {
sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
codec {
sound-dai = <&hdmi_tx>;
};
};
};
};
&arb {
status = "okay";
};
&clkc_audio {
status = "okay";
};
&ethmac {
status = "okay";
pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
pinctrl-names = "default";
phy-mode = "rgmii-txid";
phy-handle = <&external_phy>;
rx-internal-delay-ps = <800>;
};
&ext_mdio {
external_phy: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
max-speed = <1000>;
reset-assert-us = <10000>;
reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_14 */
interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
};
};
&frddr_a {
status = "okay";
};
&frddr_b {
status = "okay";
};
&frddr_c {
status = "okay";
};
&tdmif_b {
status = "okay";
};
&tdmout_b {
status = "okay";
};
&tohdmitx {
status = "okay";
};

View file

@ -0,0 +1,108 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre SAS. All rights reserved.
* Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
*/
/dts-v1/;
#include "meson-sm1-ac2xx.dtsi"
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
/ {
compatible = "cyx,a95xf3-air", "amlogic,sm1";
model = "Shenzhen CYX Industrial Co., Ltd A95XF3-AIR";
sound {
compatible = "amlogic,axg-sound-card";
model = "A95XF3-AIR";
audio-aux-devs = <&tdmout_b>;
audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
status = "okay";
dai-link-0 {
sound-dai = <&frddr_a>;
};
dai-link-1 {
sound-dai = <&frddr_b>;
};
dai-link-2 {
sound-dai = <&frddr_c>;
};
/* 8ch hdmi interface */
dai-link-3 {
sound-dai = <&tdmif_b>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-0 = <1 1>;
dai-tdm-slot-tx-mask-1 = <1 1>;
dai-tdm-slot-tx-mask-2 = <1 1>;
dai-tdm-slot-tx-mask-3 = <1 1>;
mclk-fs = <256>;
codec {
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
};
};
/* hdmi glue */
dai-link-4 {
sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
codec {
sound-dai = <&hdmi_tx>;
};
};
};
};
&arb {
status = "okay";
};
&clkc_audio {
status = "okay";
};
&ethmac {
status = "okay";
phy-handle = <&internal_ephy>;
phy-mode = "rmii";
};
&frddr_a {
status = "okay";
};
&frddr_b {
status = "okay";
};
&frddr_c {
status = "okay";
};
&tdmif_b {
status = "okay";
};
&tdmout_b {
status = "okay";
};
&tohdmitx {
status = "okay";
};

View file

@ -0,0 +1,300 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre SAS. All rights reserved.
* Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
*
* AC200/AC202 = S905D3
* AC213/AC214 = S905X3
*
*/
#include "meson-sm1.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/meson-g12a-gpio.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
serial0 = &uart_AO;
ethernet0 = &ethmac;
};
chosen {
stdout-path = "serial0:115200n8";
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
};
cvbs-connector {
compatible = "composite-video-connector";
port {
cvbs_connector_in: endpoint {
remote-endpoint = <&cvbs_vdac_out>;
};
};
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x40000000>;
};
ao_5v: regulator-ao_5v {
compatible = "regulator-fixed";
regulator-name = "AO_5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&dc_in>;
regulator-always-on;
};
dc_in: regulator-dc_in {
compatible = "regulator-fixed";
regulator-name = "DC_IN";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
emmc_1v8: regulator-emmc_1v8 {
compatible = "regulator-fixed";
regulator-name = "EMMC_1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vddao_3v3>;
regulator-always-on;
};
vddao_3v3: regulator-vddao_3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDAO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&dc_in>;
regulator-always-on;
};
vddcpu: regulator-vddcpu {
compatible = "pwm-regulator";
regulator-name = "VDDCPU";
regulator-min-microvolt = <690000>;
regulator-max-microvolt = <1050000>;
vin-supply = <&dc_in>;
pwms = <&pwm_AO_cd 1 1500 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
vddio_ao1v8: regulator-vddio_ao1v8 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vddao_3v3>;
regulator-always-on;
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
clocks = <&wifi32k>;
clock-names = "ext_clock";
};
wifi32k: wifi32k {
compatible = "pwm-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
};
};
&cec_AO {
pinctrl-0 = <&cec_ao_a_h_pins>;
pinctrl-names = "default";
status = "disabled";
hdmi-phandle = <&hdmi_tx>;
};
&cecb_AO {
pinctrl-0 = <&cec_ao_b_h_pins>;
pinctrl-names = "default";
status = "okay";
hdmi-phandle = <&hdmi_tx>;
};
&cpu0 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu1 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU1_CLK>;
clock-latency = <50000>;
};
&cpu2 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU2_CLK>;
clock-latency = <50000>;
};
&cpu3 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU3_CLK>;
clock-latency = <50000>;
};
&cvbs_vdac_port {
cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>;
};
};
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
pinctrl-names = "default";
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
&ir {
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
};
&pwm_AO_ab {
status = "okay";
pinctrl-0 = <&pwm_ao_a_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};
&pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin0";
};
&saradc {
status = "okay";
vref-supply = <&vddio_ao1v8>;
};
/* SDIO */
&sd_emmc_a {
status = "okay";
pinctrl-0 = <&sdio_pins>;
pinctrl-1 = <&sdio_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
#address-cells = <1>;
#size-cells = <0>;
bus-width = <4>;
cap-sd-highspeed;
sd-uhs-sdr104;
max-frequency = <200000000>;
non-removable;
disable-wp;
/* WiFi firmware requires power to be kept while in suspend */
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddio_ao1v8>;
};
/* SD Card */
&sd_emmc_b {
status = "okay";
pinctrl-0 = <&sdcard_c_pins>;
pinctrl-1 = <&sdcard_clk_gate_c_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <4>;
cap-sd-highspeed;
/* CRC errors are observed at 50MHz */
max-frequency = <35000000>;
disable-wp;
cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddao_3v3>;
};
/* eMMC */
&sd_emmc_c {
status = "okay";
pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
max-frequency = <200000000>;
non-removable;
disable-wp;
mmc-pwrseq = <&emmc_pwrseq>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&emmc_1v8>;
};
&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
};
&usb {
status = "okay";
dr_mode = "otg";
};

View file

@ -0,0 +1,145 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre SAS. All rights reserved.
* Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
*/
/dts-v1/;
#include "meson-sm1-ac2xx.dtsi"
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
/ {
compatible = "haochuangyi,h96-max", "amlogic,sm1";
model = "Shenzhen Haochuangyi Technology Co., Ltd H96 Max";
sound {
compatible = "amlogic,axg-sound-card";
model = "H96-MAX";
audio-aux-devs = <&tdmout_b>;
audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
status = "okay";
dai-link-0 {
sound-dai = <&frddr_a>;
};
dai-link-1 {
sound-dai = <&frddr_b>;
};
dai-link-2 {
sound-dai = <&frddr_c>;
};
/* 8ch hdmi interface */
dai-link-3 {
sound-dai = <&tdmif_b>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-0 = <1 1>;
dai-tdm-slot-tx-mask-1 = <1 1>;
dai-tdm-slot-tx-mask-2 = <1 1>;
dai-tdm-slot-tx-mask-3 = <1 1>;
mclk-fs = <256>;
codec {
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
};
};
/* hdmi glue */
dai-link-4 {
sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
codec {
sound-dai = <&hdmi_tx>;
};
};
};
};
&arb {
status = "okay";
};
&clkc_audio {
status = "okay";
};
&ethmac {
status = "okay";
pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
pinctrl-names = "default";
phy-mode = "rgmii-txid";
phy-handle = <&external_phy>;
rx-internal-delay-ps = <800>;
};
&ext_mdio {
external_phy: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
max-speed = <1000>;
reset-assert-us = <10000>;
reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_14 */
interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
};
};
&frddr_a {
status = "okay";
};
&frddr_b {
status = "okay";
};
&frddr_c {
status = "okay";
};
&tdmif_b {
status = "okay";
};
&tdmout_b {
status = "okay";
};
&tohdmitx {
status = "okay";
};
&uart_A {
status = "okay";
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
pinctrl-names = "default";
uart-has-rtscts;
bluetooth {
compatible = "brcm,bcm43438-bt";
shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
max-speed = <2000000>;
clocks = <&wifi32k>;
clock-names = "lpo";
};
};

View file

@ -0,0 +1,133 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre SAS. All rights reserved.
* Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
*/
/dts-v1/;
#include "meson-sm1-ac2xx.dtsi"
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
/ {
compatible = "amediatech,x96-air-gbit", "amlogic,sm1";
model = "Shenzhen Amediatech Technology Co., Ltd X96 Air";
sound {
compatible = "amlogic,axg-sound-card";
model = "X96-AIR";
audio-aux-devs = <&tdmout_b>;
audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
status = "okay";
dai-link-0 {
sound-dai = <&frddr_a>;
};
dai-link-1 {
sound-dai = <&frddr_b>;
};
dai-link-2 {
sound-dai = <&frddr_c>;
};
/* 8ch hdmi interface */
dai-link-3 {
sound-dai = <&tdmif_b>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-0 = <1 1>;
dai-tdm-slot-tx-mask-1 = <1 1>;
dai-tdm-slot-tx-mask-2 = <1 1>;
dai-tdm-slot-tx-mask-3 = <1 1>;
mclk-fs = <256>;
codec {
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
};
};
/* hdmi glue */
dai-link-4 {
sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
codec {
sound-dai = <&hdmi_tx>;
};
};
};
};
&arb {
status = "okay";
};
&clkc_audio {
status = "okay";
};
&ethmac {
status = "okay";
pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
pinctrl-names = "default";
phy-mode = "rgmii-txid";
phy-handle = <&external_phy>;
rx-internal-delay-ps = <800>;
};
&ext_mdio {
external_phy: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
max-speed = <1000>;
reset-assert-us = <10000>;
reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_14 */
interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
};
};
&frddr_a {
status = "okay";
};
&frddr_b {
status = "okay";
};
&frddr_c {
status = "okay";
};
&ir {
linux,rc-map-name = "rc-x96max";
};
&tdmif_b {
status = "okay";
};
&tdmout_b {
status = "okay";
};
&tohdmitx {
status = "okay";
};

View file

@ -0,0 +1,112 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre SAS. All rights reserved.
* Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
*/
/dts-v1/;
#include "meson-sm1-ac2xx.dtsi"
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
/ {
compatible = "amediatech,x96-air", "amlogic,sm1";
model = "Shenzhen Amediatech Technology Co., Ltd X96 Air";
sound {
compatible = "amlogic,axg-sound-card";
model = "X96-AIR";
audio-aux-devs = <&tdmout_b>;
audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT";
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
status = "okay";
dai-link-0 {
sound-dai = <&frddr_a>;
};
dai-link-1 {
sound-dai = <&frddr_b>;
};
dai-link-2 {
sound-dai = <&frddr_c>;
};
/* 8ch hdmi interface */
dai-link-3 {
sound-dai = <&tdmif_b>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-0 = <1 1>;
dai-tdm-slot-tx-mask-1 = <1 1>;
dai-tdm-slot-tx-mask-2 = <1 1>;
dai-tdm-slot-tx-mask-3 = <1 1>;
mclk-fs = <256>;
codec {
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
};
};
/* hdmi glue */
dai-link-4 {
sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
codec {
sound-dai = <&hdmi_tx>;
};
};
};
};
&arb {
status = "okay";
};
&clkc_audio {
status = "okay";
};
&ethmac {
status = "okay";
phy-handle = <&internal_ephy>;
phy-mode = "rmii";
};
&frddr_a {
status = "okay";
};
&frddr_b {
status = "okay";
};
&frddr_c {
status = "okay";
};
&ir {
linux,rc-map-name = "rc-beelink-gs1";
};
&tdmif_b {
status = "okay";
};
&tdmout_b {
status = "okay";
};
&tohdmitx {
status = "okay";
};

View file

@ -356,6 +356,33 @@
status = "disabled";
};
spdifin: audio-controller@400 {
compatible = "amlogic,g12a-spdifin",
"amlogic,axg-spdifin";
reg = <0x0 0x400 0x0 0x30>;
#sound-dai-cells = <0>;
sound-name-prefix = "SPDIFIN";
interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
<&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
clock-names = "pclk", "refclk";
resets = <&clkc_audio AUD_RESET_SPDIFIN>;
status = "disabled";
};
spdifout_a: audio-controller@480 {
compatible = "amlogic,g12a-spdifout",
"amlogic,axg-spdifout";
reg = <0x0 0x480 0x0 0x50>;
#sound-dai-cells = <0>;
sound-name-prefix = "SPDIFOUT_A";
clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
<&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
clock-names = "pclk", "mclk";
resets = <&clkc_audio AUD_RESET_SPDIFOUT>;
status = "disabled";
};
tdmout_a: audio-controller@500 {
compatible = "amlogic,sm1-tdmout";
reg = <0x0 0x500 0x0 0x40>;