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net: dsa: mv88e6xxx: Add support for bridge port locked mode
Supporting bridge ports in locked mode using the drop on lock feature in Marvell mv88e6xxx switchcores is described in the '88E6096/88E6097/88E6097F Datasheet', sections 4.4.6, 4.4.7 and 5.1.2.1 (Drop on Lock). This feature is implemented here facilitated by the locked port flag. Signed-off-by: Hans Schultz <schultz.hans+netdev@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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parent
b9e8b58fd2
commit
34ea415f92
3 changed files with 45 additions and 2 deletions
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@ -6103,7 +6103,7 @@ static int mv88e6xxx_port_pre_bridge_flags(struct dsa_switch *ds, int port,
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const struct mv88e6xxx_ops *ops;
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if (flags.mask & ~(BR_LEARNING | BR_FLOOD | BR_MCAST_FLOOD |
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BR_BCAST_FLOOD))
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BR_BCAST_FLOOD | BR_PORT_LOCKED))
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return -EINVAL;
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ops = chip->info->ops;
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@ -6161,6 +6161,13 @@ static int mv88e6xxx_port_bridge_flags(struct dsa_switch *ds, int port,
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goto out;
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}
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if (flags.mask & BR_PORT_LOCKED) {
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bool locked = !!(flags.val & BR_PORT_LOCKED);
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err = mv88e6xxx_port_set_lock(chip, port, locked);
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if (err)
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goto out;
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}
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out:
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mv88e6xxx_reg_unlock(chip);
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@ -1234,6 +1234,35 @@ int mv88e6xxx_port_set_mirror(struct mv88e6xxx_chip *chip, int port,
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return err;
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}
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int mv88e6xxx_port_set_lock(struct mv88e6xxx_chip *chip, int port,
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bool locked)
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{
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u16 reg;
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int err;
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err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL0, ®);
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if (err)
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return err;
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reg &= ~MV88E6XXX_PORT_CTL0_SA_FILT_MASK;
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if (locked)
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reg |= MV88E6XXX_PORT_CTL0_SA_FILT_DROP_ON_LOCK;
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err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);
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if (err)
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return err;
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err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_ASSOC_VECTOR, ®);
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if (err)
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return err;
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reg &= ~MV88E6XXX_PORT_ASSOC_VECTOR_LOCKED_PORT;
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if (locked)
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reg |= MV88E6XXX_PORT_ASSOC_VECTOR_LOCKED_PORT;
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return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_ASSOC_VECTOR, reg);
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}
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int mv88e6xxx_port_set_8021q_mode(struct mv88e6xxx_chip *chip, int port,
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u16 mode)
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{
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@ -147,7 +147,11 @@
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/* Offset 0x04: Port Control Register */
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#define MV88E6XXX_PORT_CTL0 0x04
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#define MV88E6XXX_PORT_CTL0_USE_CORE_TAG 0x8000
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#define MV88E6XXX_PORT_CTL0_DROP_ON_LOCK 0x4000
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#define MV88E6XXX_PORT_CTL0_SA_FILT_MASK 0xc000
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#define MV88E6XXX_PORT_CTL0_SA_FILT_DISABLED 0x0000
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#define MV88E6XXX_PORT_CTL0_SA_FILT_DROP_ON_LOCK 0x4000
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#define MV88E6XXX_PORT_CTL0_SA_FILT_DROP_ON_UNLOCK 0x8000
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#define MV88E6XXX_PORT_CTL0_SA_FILT_DROP_ON_CPU 0xc000
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#define MV88E6XXX_PORT_CTL0_EGRESS_MODE_MASK 0x3000
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#define MV88E6XXX_PORT_CTL0_EGRESS_MODE_UNMODIFIED 0x0000
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#define MV88E6XXX_PORT_CTL0_EGRESS_MODE_UNTAGGED 0x1000
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@ -370,6 +374,9 @@ int mv88e6xxx_port_set_fid(struct mv88e6xxx_chip *chip, int port, u16 fid);
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int mv88e6xxx_port_get_pvid(struct mv88e6xxx_chip *chip, int port, u16 *pvid);
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int mv88e6xxx_port_set_pvid(struct mv88e6xxx_chip *chip, int port, u16 pvid);
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int mv88e6xxx_port_set_lock(struct mv88e6xxx_chip *chip, int port,
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bool locked);
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int mv88e6xxx_port_set_8021q_mode(struct mv88e6xxx_chip *chip, int port,
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u16 mode);
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int mv88e6095_port_tag_remap(struct mv88e6xxx_chip *chip, int port);
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