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	platform-drivers-x86 for v6.12-3
Highlights: - Asus thermal profile fix, fixing performance issues on Lunar Lake - Intel PMC: 1 revert for a lockdep issue + 1 bugfix - Dell WMI: Ignore some WMI events on suspend/resume to silence warnings The following is an automated git shortlog grouped by driver: asus-wmi: - Fix thermal profile initialization dell-wmi: - Ignore suspend notifications intel/pmc: - Revert "Enable the ACPI PM Timer to be turned off when suspended" platform/x86/intel/pmc: - Fix pmc_core_iounmap to call iounmap for valid addresses -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEEuvA7XScYQRpenhd+kuxHeUQDJ9wFAmcc1zAUHGhkZWdvZWRl QHJlZGhhdC5jb20ACgkQkuxHeUQDJ9yNDAgAgHmoIX1Z02pJuNGAnWfWPSU83EUT YdJRIzMBs45dMY+Cuugfe+YbcZttr5C0LIDdYrU28rVaTbNrL6XQlmteC6cTGbMZ kEscXsgnY++IMf8mzNKTrZj7Vm4d3oEWGPkaGoNU6j7fPzF2UU6nPMfjOaKi2h4z DL/SIJNOHptdKf11/U1zhiMJmGFxuvszINGwbpXK4CSamc2K8Cmre/J7O8gyX7wI ZlYlgf+M/Lz7ob9y+e62evg3mzGFyGNkL4SoEPdUrP0OsULdBq0Q9bcJwxklBco8 TxsXr+wvjRcN2krxhB+ZbW1BmQW80JR+7sxht7p5+Wq3EJO5xGIMq15Cbg== =S/K7 -----END PGP SIGNATURE----- Merge tag 'platform-drivers-x86-v6.12-3' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86 Pull x86 platform driver fixes from Hans de Goede: - Asus thermal profile fix, fixing performance issues on Lunar Lake - Intel PMC: one revert for a lockdep issue and one bugfix - Dell WMI: Ignore some WMI events on suspend/resume to silence warnings * tag 'platform-drivers-x86-v6.12-3' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86: platform/x86: asus-wmi: Fix thermal profile initialization platform/x86: dell-wmi: Ignore suspend notifications platform/x86/intel/pmc: Fix pmc_core_iounmap to call iounmap for valid addresses platform/x86:intel/pmc: Revert "Enable the ACPI PM Timer to be turned off when suspended"
This commit is contained in:
		
						commit
						284a2f8996
					
				
					 10 changed files with 22 additions and 65 deletions
				
			
		|  | @ -3908,6 +3908,16 @@ static int platform_profile_setup(struct asus_wmi *asus) | |||
| 	if (!asus->throttle_thermal_policy_dev) | ||||
| 		return 0; | ||||
| 
 | ||||
| 	/*
 | ||||
| 	 * We need to set the default thermal profile during probe or otherwise | ||||
| 	 * the system will often remain in silent mode, causing low performance. | ||||
| 	 */ | ||||
| 	err = throttle_thermal_policy_set_default(asus); | ||||
| 	if (err < 0) { | ||||
| 		pr_warn("Failed to set default thermal profile\n"); | ||||
| 		return err; | ||||
| 	} | ||||
| 
 | ||||
| 	dev_info(dev, "Using throttle_thermal_policy for platform_profile support\n"); | ||||
| 
 | ||||
| 	asus->platform_profile_handler.profile_get = asus_wmi_platform_profile_get; | ||||
|  |  | |||
|  | @ -264,6 +264,15 @@ static const struct key_entry dell_wmi_keymap_type_0010[] = { | |||
| 	/*Speaker Mute*/ | ||||
| 	{ KE_KEY, 0x109, { KEY_MUTE} }, | ||||
| 
 | ||||
| 	/* S2Idle screen off */ | ||||
| 	{ KE_IGNORE, 0x120, { KEY_RESERVED }}, | ||||
| 
 | ||||
| 	/* Leaving S4 or S2Idle suspend */ | ||||
| 	{ KE_IGNORE, 0x130, { KEY_RESERVED }}, | ||||
| 
 | ||||
| 	/* Entering S2Idle suspend */ | ||||
| 	{ KE_IGNORE, 0x140, { KEY_RESERVED }}, | ||||
| 
 | ||||
| 	/* Mic mute */ | ||||
| 	{ KE_KEY, 0x150, { KEY_MICMUTE } }, | ||||
| 
 | ||||
|  |  | |||
|  | @ -295,8 +295,6 @@ const struct pmc_reg_map adl_reg_map = { | |||
| 	.ppfear_buckets = CNP_PPFEAR_NUM_ENTRIES, | ||||
| 	.pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET, | ||||
| 	.pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT, | ||||
| 	.acpi_pm_tmr_ctl_offset = SPT_PMC_ACPI_PM_TMR_CTL_OFFSET, | ||||
| 	.acpi_pm_tmr_disable_bit = SPT_PMC_BIT_ACPI_PM_TMR_DISABLE, | ||||
| 	.ltr_ignore_max = ADL_NUM_IP_IGN_ALLOWED, | ||||
| 	.lpm_num_modes = ADL_LPM_NUM_MODES, | ||||
| 	.lpm_num_maps = ADL_LPM_NUM_MAPS, | ||||
|  |  | |||
|  | @ -200,8 +200,6 @@ const struct pmc_reg_map cnp_reg_map = { | |||
| 	.ppfear_buckets = CNP_PPFEAR_NUM_ENTRIES, | ||||
| 	.pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET, | ||||
| 	.pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT, | ||||
| 	.acpi_pm_tmr_ctl_offset = SPT_PMC_ACPI_PM_TMR_CTL_OFFSET, | ||||
| 	.acpi_pm_tmr_disable_bit = SPT_PMC_BIT_ACPI_PM_TMR_DISABLE, | ||||
| 	.ltr_ignore_max = CNP_NUM_IP_IGN_ALLOWED, | ||||
| 	.etr3_offset = ETR3_OFFSET, | ||||
| }; | ||||
|  |  | |||
|  | @ -11,7 +11,6 @@ | |||
| 
 | ||||
| #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | ||||
| 
 | ||||
| #include <linux/acpi_pmtmr.h> | ||||
| #include <linux/bitfield.h> | ||||
| #include <linux/debugfs.h> | ||||
| #include <linux/delay.h> | ||||
|  | @ -1258,39 +1257,6 @@ static bool pmc_core_is_pson_residency_enabled(struct pmc_dev *pmcdev) | |||
| 	return val == 1; | ||||
| } | ||||
| 
 | ||||
| /*
 | ||||
|  * Enable or disable ACPI PM Timer | ||||
|  * | ||||
|  * This function is intended to be a callback for ACPI PM suspend/resume event. | ||||
|  * The ACPI PM Timer is enabled on resume only if it was enabled during suspend. | ||||
|  */ | ||||
| static void pmc_core_acpi_pm_timer_suspend_resume(void *data, bool suspend) | ||||
| { | ||||
| 	struct pmc_dev *pmcdev = data; | ||||
| 	struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN]; | ||||
| 	const struct pmc_reg_map *map = pmc->map; | ||||
| 	bool enabled; | ||||
| 	u32 reg; | ||||
| 
 | ||||
| 	if (!map->acpi_pm_tmr_ctl_offset) | ||||
| 		return; | ||||
| 
 | ||||
| 	guard(mutex)(&pmcdev->lock); | ||||
| 
 | ||||
| 	if (!suspend && !pmcdev->enable_acpi_pm_timer_on_resume) | ||||
| 		return; | ||||
| 
 | ||||
| 	reg = pmc_core_reg_read(pmc, map->acpi_pm_tmr_ctl_offset); | ||||
| 	enabled = !(reg & map->acpi_pm_tmr_disable_bit); | ||||
| 	if (suspend) | ||||
| 		reg |= map->acpi_pm_tmr_disable_bit; | ||||
| 	else | ||||
| 		reg &= ~map->acpi_pm_tmr_disable_bit; | ||||
| 	pmc_core_reg_write(pmc, map->acpi_pm_tmr_ctl_offset, reg); | ||||
| 
 | ||||
| 	pmcdev->enable_acpi_pm_timer_on_resume = suspend && enabled; | ||||
| } | ||||
| 
 | ||||
| static void pmc_core_dbgfs_unregister(struct pmc_dev *pmcdev) | ||||
| { | ||||
| 	debugfs_remove_recursive(pmcdev->dbgfs_dir); | ||||
|  | @ -1486,7 +1452,6 @@ static int pmc_core_probe(struct platform_device *pdev) | |||
| 	struct pmc_dev *pmcdev; | ||||
| 	const struct x86_cpu_id *cpu_id; | ||||
| 	int (*core_init)(struct pmc_dev *pmcdev); | ||||
| 	const struct pmc_reg_map *map; | ||||
| 	struct pmc *primary_pmc; | ||||
| 	int ret; | ||||
| 
 | ||||
|  | @ -1545,11 +1510,6 @@ static int pmc_core_probe(struct platform_device *pdev) | |||
| 	pm_report_max_hw_sleep(FIELD_MAX(SLP_S0_RES_COUNTER_MASK) * | ||||
| 			       pmc_core_adjust_slp_s0_step(primary_pmc, 1)); | ||||
| 
 | ||||
| 	map = primary_pmc->map; | ||||
| 	if (map->acpi_pm_tmr_ctl_offset) | ||||
| 		acpi_pmtmr_register_suspend_resume_callback(pmc_core_acpi_pm_timer_suspend_resume, | ||||
| 							 pmcdev); | ||||
| 
 | ||||
| 	device_initialized = true; | ||||
| 	dev_info(&pdev->dev, " initialized\n"); | ||||
| 
 | ||||
|  | @ -1559,12 +1519,6 @@ static int pmc_core_probe(struct platform_device *pdev) | |||
| static void pmc_core_remove(struct platform_device *pdev) | ||||
| { | ||||
| 	struct pmc_dev *pmcdev = platform_get_drvdata(pdev); | ||||
| 	const struct pmc *pmc = pmcdev->pmcs[PMC_IDX_MAIN]; | ||||
| 	const struct pmc_reg_map *map = pmc->map; | ||||
| 
 | ||||
| 	if (map->acpi_pm_tmr_ctl_offset) | ||||
| 		acpi_pmtmr_unregister_suspend_resume_callback(); | ||||
| 
 | ||||
| 	pmc_core_dbgfs_unregister(pmcdev); | ||||
| 	pmc_core_clean_structure(pdev); | ||||
| } | ||||
|  |  | |||
|  | @ -68,8 +68,6 @@ struct telem_endpoint; | |||
| #define SPT_PMC_LTR_SCC				0x3A0 | ||||
| #define SPT_PMC_LTR_ISH				0x3A4 | ||||
| 
 | ||||
| #define SPT_PMC_ACPI_PM_TMR_CTL_OFFSET		0x18FC | ||||
| 
 | ||||
| /* Sunrise Point: PGD PFET Enable Ack Status Registers */ | ||||
| enum ppfear_regs { | ||||
| 	SPT_PMC_XRAM_PPFEAR0A = 0x590, | ||||
|  | @ -150,8 +148,6 @@ enum ppfear_regs { | |||
| #define SPT_PMC_VRIC1_SLPS0LVEN			BIT(13) | ||||
| #define SPT_PMC_VRIC1_XTALSDQDIS		BIT(22) | ||||
| 
 | ||||
| #define SPT_PMC_BIT_ACPI_PM_TMR_DISABLE		BIT(1) | ||||
| 
 | ||||
| /* Cannonlake Power Management Controller register offsets */ | ||||
| #define CNP_PMC_SLPS0_DBG_OFFSET		0x10B4 | ||||
| #define CNP_PMC_PM_CFG_OFFSET			0x1818 | ||||
|  | @ -355,8 +351,6 @@ struct pmc_reg_map { | |||
| 	const u8  *lpm_reg_index; | ||||
| 	const u32 pson_residency_offset; | ||||
| 	const u32 pson_residency_counter_step; | ||||
| 	const u32 acpi_pm_tmr_ctl_offset; | ||||
| 	const u32 acpi_pm_tmr_disable_bit; | ||||
| }; | ||||
| 
 | ||||
| /**
 | ||||
|  | @ -432,8 +426,6 @@ struct pmc_dev { | |||
| 	u32 die_c6_offset; | ||||
| 	struct telem_endpoint *punit_ep; | ||||
| 	struct pmc_info *regmap_list; | ||||
| 
 | ||||
| 	bool enable_acpi_pm_timer_on_resume; | ||||
| }; | ||||
| 
 | ||||
| enum pmc_index { | ||||
|  |  | |||
|  | @ -29,7 +29,7 @@ | |||
| #define LPM_REG_COUNT		28 | ||||
| #define LPM_MODE_OFFSET		1 | ||||
| 
 | ||||
| DEFINE_FREE(pmc_core_iounmap, void __iomem *, iounmap(_T)); | ||||
| DEFINE_FREE(pmc_core_iounmap, void __iomem *, if (_T) iounmap(_T)) | ||||
| 
 | ||||
| static u32 pmc_core_find_guid(struct pmc_info *list, const struct pmc_reg_map *map) | ||||
| { | ||||
|  | @ -262,6 +262,8 @@ pmc_core_ssram_get_pmc(struct pmc_dev *pmcdev, int pmc_idx, u32 offset) | |||
| 
 | ||||
| 	ssram_base = ssram_pcidev->resource[0].start; | ||||
| 	tmp_ssram = ioremap(ssram_base, SSRAM_HDR_SIZE); | ||||
| 	if (!tmp_ssram) | ||||
| 		return -ENOMEM; | ||||
| 
 | ||||
| 	if (pmc_idx != PMC_IDX_MAIN) { | ||||
| 		/*
 | ||||
|  |  | |||
|  | @ -46,8 +46,6 @@ const struct pmc_reg_map icl_reg_map = { | |||
| 	.ppfear_buckets = ICL_PPFEAR_NUM_ENTRIES, | ||||
| 	.pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET, | ||||
| 	.pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT, | ||||
| 	.acpi_pm_tmr_ctl_offset = SPT_PMC_ACPI_PM_TMR_CTL_OFFSET, | ||||
| 	.acpi_pm_tmr_disable_bit = SPT_PMC_BIT_ACPI_PM_TMR_DISABLE, | ||||
| 	.ltr_ignore_max = ICL_NUM_IP_IGN_ALLOWED, | ||||
| 	.etr3_offset = ETR3_OFFSET, | ||||
| }; | ||||
|  |  | |||
|  | @ -462,8 +462,6 @@ const struct pmc_reg_map mtl_socm_reg_map = { | |||
| 	.ppfear_buckets = MTL_SOCM_PPFEAR_NUM_ENTRIES, | ||||
| 	.pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET, | ||||
| 	.pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT, | ||||
| 	.acpi_pm_tmr_ctl_offset = SPT_PMC_ACPI_PM_TMR_CTL_OFFSET, | ||||
| 	.acpi_pm_tmr_disable_bit = SPT_PMC_BIT_ACPI_PM_TMR_DISABLE, | ||||
| 	.lpm_num_maps = ADL_LPM_NUM_MAPS, | ||||
| 	.ltr_ignore_max = MTL_SOCM_NUM_IP_IGN_ALLOWED, | ||||
| 	.lpm_res_counter_step_x2 = TGL_PMC_LPM_RES_COUNTER_STEP_X2, | ||||
|  |  | |||
|  | @ -197,8 +197,6 @@ const struct pmc_reg_map tgl_reg_map = { | |||
| 	.ppfear_buckets = ICL_PPFEAR_NUM_ENTRIES, | ||||
| 	.pm_cfg_offset = CNP_PMC_PM_CFG_OFFSET, | ||||
| 	.pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT, | ||||
| 	.acpi_pm_tmr_ctl_offset = SPT_PMC_ACPI_PM_TMR_CTL_OFFSET, | ||||
| 	.acpi_pm_tmr_disable_bit = SPT_PMC_BIT_ACPI_PM_TMR_DISABLE, | ||||
| 	.ltr_ignore_max = TGL_NUM_IP_IGN_ALLOWED, | ||||
| 	.lpm_num_maps = TGL_LPM_NUM_MAPS, | ||||
| 	.lpm_res_counter_step_x2 = TGL_PMC_LPM_RES_COUNTER_STEP_X2, | ||||
|  |  | |||
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