mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-05-24 10:39:52 +00:00
char/mwave: remove custom BOOLEAN type
The mwave driver has its own macros for the BOOLEAN type and the TRUE/FALSE values. This is redundant because the kernel already has bool/true/false, and it clashes with the ACPI headers that also define these types. The linux/acpi.h header is now included implicitly from mwave through the mc146818rtc.h header, as reported by Stephen Rothwell: In file included from drivers/char/mwave/smapi.c:51:0: drivers/char/mwave/smapi.h:52:0: warning: "TRUE" redefined #define TRUE 1 ^ In file included from include/acpi/acpi.h:58:0, from include/linux/acpi.h:33, from include/linux/mc146818rtc.h:21, from drivers/char/mwave/smapi.c:50: include/acpi/actypes.h:438:0: note: this is the location of the previous definition #define TRUE (1 == 1) ^ This removes the private types from mwave and uses the standard types instead. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Fixes: fd09cc80165c ("rtc: cmos: move mc146818rtc code out of asm-generic/rtc.h") Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
8b7d3a9d90
commit
26ec99b105
7 changed files with 93 additions and 97 deletions
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@ -124,7 +124,7 @@ static void dsp3780I_WriteGenCfg(unsigned short usDspBaseIO, unsigned uIndex,
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MKBYTE(rSlaveControl));
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MKBYTE(rSlaveControl));
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rSlaveControl_Save = rSlaveControl;
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rSlaveControl_Save = rSlaveControl;
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rSlaveControl.ConfigMode = TRUE;
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rSlaveControl.ConfigMode = true;
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PRINTK_2(TRACE_3780I,
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PRINTK_2(TRACE_3780I,
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"3780i::dsp3780i_WriteGenCfg entry rSlaveControl+ConfigMode %x\n",
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"3780i::dsp3780i_WriteGenCfg entry rSlaveControl+ConfigMode %x\n",
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@ -155,7 +155,7 @@ unsigned char dsp3780I_ReadGenCfg(unsigned short usDspBaseIO,
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MKBYTE(rSlaveControl) = InByteDsp(DSP_IsaSlaveControl);
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MKBYTE(rSlaveControl) = InByteDsp(DSP_IsaSlaveControl);
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rSlaveControl_Save = rSlaveControl;
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rSlaveControl_Save = rSlaveControl;
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rSlaveControl.ConfigMode = TRUE;
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rSlaveControl.ConfigMode = true;
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OutByteDsp(DSP_IsaSlaveControl, MKBYTE(rSlaveControl));
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OutByteDsp(DSP_IsaSlaveControl, MKBYTE(rSlaveControl));
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OutByteDsp(DSP_ConfigAddress, (unsigned char) uIndex);
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OutByteDsp(DSP_ConfigAddress, (unsigned char) uIndex);
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ucValue = InByteDsp(DSP_ConfigData);
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ucValue = InByteDsp(DSP_ConfigData);
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@ -230,7 +230,7 @@ int dsp3780I_EnableDSP(DSP_3780I_CONFIG_SETTINGS * pSettings,
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rUartCfg1.BaseIO = 3;
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rUartCfg1.BaseIO = 3;
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break;
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break;
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}
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}
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rUartCfg2.Enable = TRUE;
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rUartCfg2.Enable = true;
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}
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}
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rHBridgeCfg1.Reserved = rHBridgeCfg2.Reserved = 0;
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rHBridgeCfg1.Reserved = rHBridgeCfg2.Reserved = 0;
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@ -238,7 +238,7 @@ int dsp3780I_EnableDSP(DSP_3780I_CONFIG_SETTINGS * pSettings,
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rHBridgeCfg1.IrqPulse = pSettings->bDspIrqPulse;
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rHBridgeCfg1.IrqPulse = pSettings->bDspIrqPulse;
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rHBridgeCfg1.Irq = (unsigned char) pIrqMap[pSettings->usDspIrq];
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rHBridgeCfg1.Irq = (unsigned char) pIrqMap[pSettings->usDspIrq];
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rHBridgeCfg1.AccessMode = 1;
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rHBridgeCfg1.AccessMode = 1;
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rHBridgeCfg2.Enable = TRUE;
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rHBridgeCfg2.Enable = true;
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rBusmasterCfg2.Reserved = 0;
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rBusmasterCfg2.Reserved = 0;
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@ -278,8 +278,8 @@ int dsp3780I_EnableDSP(DSP_3780I_CONFIG_SETTINGS * pSettings,
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* soft-reset active for 10ms.
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* soft-reset active for 10ms.
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*/
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*/
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rSlaveControl.ClockControl = 0;
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rSlaveControl.ClockControl = 0;
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rSlaveControl.SoftReset = TRUE;
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rSlaveControl.SoftReset = true;
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rSlaveControl.ConfigMode = FALSE;
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rSlaveControl.ConfigMode = false;
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rSlaveControl.Reserved = 0;
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rSlaveControl.Reserved = 0;
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PRINTK_4(TRACE_3780I,
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PRINTK_4(TRACE_3780I,
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@ -302,7 +302,7 @@ int dsp3780I_EnableDSP(DSP_3780I_CONFIG_SETTINGS * pSettings,
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for (i = 0; i < 11; i++)
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for (i = 0; i < 11; i++)
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udelay(2000);
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udelay(2000);
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rSlaveControl.SoftReset = FALSE;
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rSlaveControl.SoftReset = false;
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OutWordDsp(DSP_IsaSlaveControl, MKWORD(rSlaveControl));
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OutWordDsp(DSP_IsaSlaveControl, MKWORD(rSlaveControl));
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MKWORD(tval) = InWordDsp(DSP_IsaSlaveControl);
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MKWORD(tval) = InWordDsp(DSP_IsaSlaveControl);
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@ -326,10 +326,10 @@ int dsp3780I_EnableDSP(DSP_3780I_CONFIG_SETTINGS * pSettings,
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}
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}
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rHBridgeControl.EnableDspInt = FALSE;
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rHBridgeControl.EnableDspInt = false;
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rHBridgeControl.MemAutoInc = TRUE;
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rHBridgeControl.MemAutoInc = true;
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rHBridgeControl.IoAutoInc = FALSE;
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rHBridgeControl.IoAutoInc = false;
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rHBridgeControl.DiagnosticMode = FALSE;
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rHBridgeControl.DiagnosticMode = false;
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PRINTK_3(TRACE_3780I,
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PRINTK_3(TRACE_3780I,
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"3780i::dsp3780i_EnableDSP DSP_HBridgeControl %x rHBridgeControl %x\n",
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"3780i::dsp3780i_EnableDSP DSP_HBridgeControl %x rHBridgeControl %x\n",
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@ -345,7 +345,7 @@ int dsp3780I_EnableDSP(DSP_3780I_CONFIG_SETTINGS * pSettings,
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ChipID = ReadMsaCfg(DSP_ChipID);
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ChipID = ReadMsaCfg(DSP_ChipID);
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PRINTK_2(TRACE_3780I,
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PRINTK_2(TRACE_3780I,
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"3780i::dsp3780I_EnableDSP exiting bRC=TRUE, ChipID %x\n",
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"3780i::dsp3780I_EnableDSP exiting bRC=true, ChipID %x\n",
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ChipID);
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ChipID);
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return 0;
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return 0;
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@ -361,8 +361,8 @@ int dsp3780I_DisableDSP(DSP_3780I_CONFIG_SETTINGS * pSettings)
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PRINTK_1(TRACE_3780I, "3780i::dsp3780i_DisableDSP entry\n");
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PRINTK_1(TRACE_3780I, "3780i::dsp3780i_DisableDSP entry\n");
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rSlaveControl.ClockControl = 0;
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rSlaveControl.ClockControl = 0;
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rSlaveControl.SoftReset = TRUE;
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rSlaveControl.SoftReset = true;
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rSlaveControl.ConfigMode = FALSE;
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rSlaveControl.ConfigMode = false;
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rSlaveControl.Reserved = 0;
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rSlaveControl.Reserved = 0;
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spin_lock_irqsave(&dsp_lock, flags);
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spin_lock_irqsave(&dsp_lock, flags);
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OutWordDsp(DSP_IsaSlaveControl, MKWORD(rSlaveControl));
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OutWordDsp(DSP_IsaSlaveControl, MKWORD(rSlaveControl));
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@ -398,14 +398,14 @@ int dsp3780I_Reset(DSP_3780I_CONFIG_SETTINGS * pSettings)
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PRINTK_2(TRACE_3780I, "3780i::dsp3780i_Reset rHBridgeControl %x\n",
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PRINTK_2(TRACE_3780I, "3780i::dsp3780i_Reset rHBridgeControl %x\n",
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MKWORD(rHBridgeControl));
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MKWORD(rHBridgeControl));
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rHBridgeControl.EnableDspInt = FALSE;
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rHBridgeControl.EnableDspInt = false;
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OutWordDsp(DSP_HBridgeControl, MKWORD(rHBridgeControl));
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OutWordDsp(DSP_HBridgeControl, MKWORD(rHBridgeControl));
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spin_unlock_irqrestore(&dsp_lock, flags);
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spin_unlock_irqrestore(&dsp_lock, flags);
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/* Reset the core via the boot domain register */
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/* Reset the core via the boot domain register */
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rBootDomain.ResetCore = TRUE;
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rBootDomain.ResetCore = true;
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rBootDomain.Halt = TRUE;
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rBootDomain.Halt = true;
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rBootDomain.NMI = TRUE;
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rBootDomain.NMI = true;
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rBootDomain.Reserved = 0;
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rBootDomain.Reserved = 0;
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PRINTK_2(TRACE_3780I, "3780i::dsp3780i_Reset rBootDomain %x\n",
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PRINTK_2(TRACE_3780I, "3780i::dsp3780i_Reset rBootDomain %x\n",
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@ -438,26 +438,26 @@ int dsp3780I_Run(DSP_3780I_CONFIG_SETTINGS * pSettings)
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/* Transition the core to a running state */
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/* Transition the core to a running state */
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rBootDomain.ResetCore = TRUE;
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rBootDomain.ResetCore = true;
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rBootDomain.Halt = FALSE;
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rBootDomain.Halt = false;
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rBootDomain.NMI = TRUE;
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rBootDomain.NMI = true;
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rBootDomain.Reserved = 0;
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rBootDomain.Reserved = 0;
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WriteMsaCfg(DSP_MspBootDomain, MKWORD(rBootDomain));
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WriteMsaCfg(DSP_MspBootDomain, MKWORD(rBootDomain));
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udelay(5);
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udelay(5);
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rBootDomain.ResetCore = FALSE;
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rBootDomain.ResetCore = false;
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WriteMsaCfg(DSP_MspBootDomain, MKWORD(rBootDomain));
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WriteMsaCfg(DSP_MspBootDomain, MKWORD(rBootDomain));
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udelay(5);
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udelay(5);
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rBootDomain.NMI = FALSE;
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rBootDomain.NMI = false;
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WriteMsaCfg(DSP_MspBootDomain, MKWORD(rBootDomain));
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WriteMsaCfg(DSP_MspBootDomain, MKWORD(rBootDomain));
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udelay(5);
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udelay(5);
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/* Enable DSP to PC interrupt */
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/* Enable DSP to PC interrupt */
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spin_lock_irqsave(&dsp_lock, flags);
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spin_lock_irqsave(&dsp_lock, flags);
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MKWORD(rHBridgeControl) = InWordDsp(DSP_HBridgeControl);
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MKWORD(rHBridgeControl) = InWordDsp(DSP_HBridgeControl);
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rHBridgeControl.EnableDspInt = TRUE;
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rHBridgeControl.EnableDspInt = true;
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PRINTK_2(TRACE_3780I, "3780i::dsp3780i_Run rHBridgeControl %x\n",
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PRINTK_2(TRACE_3780I, "3780i::dsp3780i_Run rHBridgeControl %x\n",
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MKWORD(rHBridgeControl));
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MKWORD(rHBridgeControl));
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@ -466,7 +466,7 @@ int dsp3780I_Run(DSP_3780I_CONFIG_SETTINGS * pSettings)
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spin_unlock_irqrestore(&dsp_lock, flags);
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spin_unlock_irqrestore(&dsp_lock, flags);
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PRINTK_1(TRACE_3780I, "3780i::dsp3780i_Run exit bRC=TRUE\n");
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PRINTK_1(TRACE_3780I, "3780i::dsp3780i_Run exit bRC=true\n");
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return 0;
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return 0;
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}
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}
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@ -508,7 +508,7 @@ int dsp3780I_ReadDStore(unsigned short usDspBaseIO, void __user *pvBuffer,
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PRINTK_1(TRACE_3780I,
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PRINTK_1(TRACE_3780I,
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"3780I::dsp3780I_ReadDStore exit bRC=TRUE\n");
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"3780I::dsp3780I_ReadDStore exit bRC=true\n");
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return 0;
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return 0;
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}
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}
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@ -550,7 +550,7 @@ int dsp3780I_ReadAndClearDStore(unsigned short usDspBaseIO,
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PRINTK_1(TRACE_3780I,
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PRINTK_1(TRACE_3780I,
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"3780I::dsp3780I_ReadAndClearDStore exit bRC=TRUE\n");
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"3780I::dsp3780I_ReadAndClearDStore exit bRC=true\n");
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return 0;
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return 0;
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}
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}
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@ -592,7 +592,7 @@ int dsp3780I_WriteDStore(unsigned short usDspBaseIO, void __user *pvBuffer,
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PRINTK_1(TRACE_3780I,
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PRINTK_1(TRACE_3780I,
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"3780I::dsp3780D_WriteDStore exit bRC=TRUE\n");
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"3780I::dsp3780D_WriteDStore exit bRC=true\n");
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return 0;
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return 0;
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}
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}
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@ -640,7 +640,7 @@ int dsp3780I_ReadIStore(unsigned short usDspBaseIO, void __user *pvBuffer,
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}
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}
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PRINTK_1(TRACE_3780I,
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PRINTK_1(TRACE_3780I,
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"3780I::dsp3780I_ReadIStore exit bRC=TRUE\n");
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"3780I::dsp3780I_ReadIStore exit bRC=true\n");
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return 0;
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return 0;
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}
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}
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@ -689,7 +689,7 @@ int dsp3780I_WriteIStore(unsigned short usDspBaseIO, void __user *pvBuffer,
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}
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}
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PRINTK_1(TRACE_3780I,
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PRINTK_1(TRACE_3780I,
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"3780I::dsp3780I_WriteIStore exit bRC=TRUE\n");
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"3780I::dsp3780I_WriteIStore exit bRC=true\n");
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return 0;
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return 0;
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}
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}
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@ -713,7 +713,7 @@ int dsp3780I_GetIPCSource(unsigned short usDspBaseIO,
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*/
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*/
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spin_lock_irqsave(&dsp_lock, flags);
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spin_lock_irqsave(&dsp_lock, flags);
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MKWORD(rHBridgeControl) = InWordDsp(DSP_HBridgeControl);
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MKWORD(rHBridgeControl) = InWordDsp(DSP_HBridgeControl);
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rHBridgeControl.EnableDspInt = FALSE;
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rHBridgeControl.EnableDspInt = false;
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OutWordDsp(DSP_HBridgeControl, MKWORD(rHBridgeControl));
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OutWordDsp(DSP_HBridgeControl, MKWORD(rHBridgeControl));
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*pusIPCSource = InWordDsp(DSP_Interrupt);
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*pusIPCSource = InWordDsp(DSP_Interrupt);
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@ -725,7 +725,7 @@ int dsp3780I_GetIPCSource(unsigned short usDspBaseIO,
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OutWordDsp(DSP_Interrupt, (unsigned short) ~(*pusIPCSource));
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OutWordDsp(DSP_Interrupt, (unsigned short) ~(*pusIPCSource));
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rHBridgeControl.EnableDspInt = TRUE;
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rHBridgeControl.EnableDspInt = true;
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OutWordDsp(DSP_HBridgeControl, MKWORD(rHBridgeControl));
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OutWordDsp(DSP_HBridgeControl, MKWORD(rHBridgeControl));
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spin_unlock_irqrestore(&dsp_lock, flags);
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spin_unlock_irqrestore(&dsp_lock, flags);
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@ -101,7 +101,7 @@ typedef struct {
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} DSP_UART_CFG_1;
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} DSP_UART_CFG_1;
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typedef struct {
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typedef struct {
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unsigned char Enable:1; /* RW: Enable I/O and IRQ: 0=FALSE, 1=TRUE */
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unsigned char Enable:1; /* RW: Enable I/O and IRQ: 0=false, 1=true */
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unsigned char Reserved:7; /* 0: Reserved */
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unsigned char Reserved:7; /* 0: Reserved */
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} DSP_UART_CFG_2;
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} DSP_UART_CFG_2;
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@ -114,7 +114,7 @@ typedef struct {
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} DSP_HBRIDGE_CFG_1;
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} DSP_HBRIDGE_CFG_1;
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typedef struct {
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typedef struct {
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unsigned char Enable:1; /* RW: enable I/O and IRQ: 0=FALSE, 1=TRUE */
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unsigned char Enable:1; /* RW: enable I/O and IRQ: 0=false, 1=true */
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unsigned char Reserved:7; /* 0: Reserved */
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unsigned char Reserved:7; /* 0: Reserved */
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} DSP_HBRIDGE_CFG_2;
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} DSP_HBRIDGE_CFG_2;
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@ -133,12 +133,12 @@ typedef struct {
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typedef struct {
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typedef struct {
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unsigned char GateIOCHRDY:1; /* RW: Enable IOCHRDY gating: 0=FALSE, 1=TRUE */
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unsigned char GateIOCHRDY:1; /* RW: Enable IOCHRDY gating: 0=false, 1=true */
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unsigned char Reserved:7; /* 0: Reserved */
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unsigned char Reserved:7; /* 0: Reserved */
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} DSP_ISA_PROT_CFG;
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} DSP_ISA_PROT_CFG;
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typedef struct {
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typedef struct {
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unsigned char Enable:1; /* RW: Enable low power suspend/resume 0=FALSE, 1=TRUE */
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unsigned char Enable:1; /* RW: Enable low power suspend/resume 0=false, 1=true */
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unsigned char Reserved:7; /* 0: Reserved */
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unsigned char Reserved:7; /* 0: Reserved */
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} DSP_POWER_MGMT_CFG;
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} DSP_POWER_MGMT_CFG;
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@ -296,8 +296,8 @@ static long mwave_ioctl(struct file *file, unsigned int iocmd,
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pDrvData->IPCs[ipcnum].usIntCount);
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pDrvData->IPCs[ipcnum].usIntCount);
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mutex_lock(&mwave_mutex);
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mutex_lock(&mwave_mutex);
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pDrvData->IPCs[ipcnum].bIsHere = FALSE;
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pDrvData->IPCs[ipcnum].bIsHere = false;
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pDrvData->IPCs[ipcnum].bIsEnabled = TRUE;
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pDrvData->IPCs[ipcnum].bIsEnabled = true;
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mutex_unlock(&mwave_mutex);
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mutex_unlock(&mwave_mutex);
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PRINTK_2(TRACE_MWAVE,
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PRINTK_2(TRACE_MWAVE,
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@ -324,7 +324,7 @@ static long mwave_ioctl(struct file *file, unsigned int iocmd,
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pDrvData->IPCs[ipcnum].usIntCount);
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pDrvData->IPCs[ipcnum].usIntCount);
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mutex_lock(&mwave_mutex);
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mutex_lock(&mwave_mutex);
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if (pDrvData->IPCs[ipcnum].bIsEnabled == TRUE) {
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if (pDrvData->IPCs[ipcnum].bIsEnabled == true) {
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DECLARE_WAITQUEUE(wait, current);
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DECLARE_WAITQUEUE(wait, current);
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PRINTK_2(TRACE_MWAVE,
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PRINTK_2(TRACE_MWAVE,
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@ -332,7 +332,7 @@ static long mwave_ioctl(struct file *file, unsigned int iocmd,
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" ipc %x going to sleep\n",
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" ipc %x going to sleep\n",
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ipcnum);
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ipcnum);
|
||||||
add_wait_queue(&pDrvData->IPCs[ipcnum].ipc_wait_queue, &wait);
|
add_wait_queue(&pDrvData->IPCs[ipcnum].ipc_wait_queue, &wait);
|
||||||
pDrvData->IPCs[ipcnum].bIsHere = TRUE;
|
pDrvData->IPCs[ipcnum].bIsHere = true;
|
||||||
set_current_state(TASK_INTERRUPTIBLE);
|
set_current_state(TASK_INTERRUPTIBLE);
|
||||||
/* check whether an event was signalled by */
|
/* check whether an event was signalled by */
|
||||||
/* the interrupt handler while we were gone */
|
/* the interrupt handler while we were gone */
|
||||||
|
@ -355,7 +355,7 @@ static long mwave_ioctl(struct file *file, unsigned int iocmd,
|
||||||
" application\n",
|
" application\n",
|
||||||
ipcnum);
|
ipcnum);
|
||||||
}
|
}
|
||||||
pDrvData->IPCs[ipcnum].bIsHere = FALSE;
|
pDrvData->IPCs[ipcnum].bIsHere = false;
|
||||||
remove_wait_queue(&pDrvData->IPCs[ipcnum].ipc_wait_queue, &wait);
|
remove_wait_queue(&pDrvData->IPCs[ipcnum].ipc_wait_queue, &wait);
|
||||||
set_current_state(TASK_RUNNING);
|
set_current_state(TASK_RUNNING);
|
||||||
PRINTK_2(TRACE_MWAVE,
|
PRINTK_2(TRACE_MWAVE,
|
||||||
|
@ -384,9 +384,9 @@ static long mwave_ioctl(struct file *file, unsigned int iocmd,
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
mutex_lock(&mwave_mutex);
|
mutex_lock(&mwave_mutex);
|
||||||
if (pDrvData->IPCs[ipcnum].bIsEnabled == TRUE) {
|
if (pDrvData->IPCs[ipcnum].bIsEnabled == true) {
|
||||||
pDrvData->IPCs[ipcnum].bIsEnabled = FALSE;
|
pDrvData->IPCs[ipcnum].bIsEnabled = false;
|
||||||
if (pDrvData->IPCs[ipcnum].bIsHere == TRUE) {
|
if (pDrvData->IPCs[ipcnum].bIsHere == true) {
|
||||||
wake_up_interruptible(&pDrvData->IPCs[ipcnum].ipc_wait_queue);
|
wake_up_interruptible(&pDrvData->IPCs[ipcnum].ipc_wait_queue);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -541,7 +541,7 @@ static void mwave_exit(void)
|
||||||
|
|
||||||
if (pDrvData->device_registered) {
|
if (pDrvData->device_registered) {
|
||||||
device_unregister(&mwave_device);
|
device_unregister(&mwave_device);
|
||||||
pDrvData->device_registered = FALSE;
|
pDrvData->device_registered = false;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
@ -576,16 +576,16 @@ static int __init mwave_init(void)
|
||||||
|
|
||||||
memset(&mwave_s_mdd, 0, sizeof(MWAVE_DEVICE_DATA));
|
memset(&mwave_s_mdd, 0, sizeof(MWAVE_DEVICE_DATA));
|
||||||
|
|
||||||
pDrvData->bBDInitialized = FALSE;
|
pDrvData->bBDInitialized = false;
|
||||||
pDrvData->bResourcesClaimed = FALSE;
|
pDrvData->bResourcesClaimed = false;
|
||||||
pDrvData->bDSPEnabled = FALSE;
|
pDrvData->bDSPEnabled = false;
|
||||||
pDrvData->bDSPReset = FALSE;
|
pDrvData->bDSPReset = false;
|
||||||
pDrvData->bMwaveDevRegistered = FALSE;
|
pDrvData->bMwaveDevRegistered = false;
|
||||||
pDrvData->sLine = -1;
|
pDrvData->sLine = -1;
|
||||||
|
|
||||||
for (i = 0; i < ARRAY_SIZE(pDrvData->IPCs); i++) {
|
for (i = 0; i < ARRAY_SIZE(pDrvData->IPCs); i++) {
|
||||||
pDrvData->IPCs[i].bIsEnabled = FALSE;
|
pDrvData->IPCs[i].bIsEnabled = false;
|
||||||
pDrvData->IPCs[i].bIsHere = FALSE;
|
pDrvData->IPCs[i].bIsHere = false;
|
||||||
pDrvData->IPCs[i].usIntCount = 0; /* no ints received yet */
|
pDrvData->IPCs[i].usIntCount = 0; /* no ints received yet */
|
||||||
init_waitqueue_head(&pDrvData->IPCs[i].ipc_wait_queue);
|
init_waitqueue_head(&pDrvData->IPCs[i].ipc_wait_queue);
|
||||||
}
|
}
|
||||||
|
@ -601,7 +601,7 @@ static int __init mwave_init(void)
|
||||||
" Failed to initialize board data\n");
|
" Failed to initialize board data\n");
|
||||||
goto cleanup_error;
|
goto cleanup_error;
|
||||||
}
|
}
|
||||||
pDrvData->bBDInitialized = TRUE;
|
pDrvData->bBDInitialized = true;
|
||||||
|
|
||||||
retval = tp3780I_CalcResources(&pDrvData->rBDData);
|
retval = tp3780I_CalcResources(&pDrvData->rBDData);
|
||||||
PRINTK_2(TRACE_MWAVE,
|
PRINTK_2(TRACE_MWAVE,
|
||||||
|
@ -626,7 +626,7 @@ static int __init mwave_init(void)
|
||||||
" Failed to claim resources\n");
|
" Failed to claim resources\n");
|
||||||
goto cleanup_error;
|
goto cleanup_error;
|
||||||
}
|
}
|
||||||
pDrvData->bResourcesClaimed = TRUE;
|
pDrvData->bResourcesClaimed = true;
|
||||||
|
|
||||||
retval = tp3780I_EnableDSP(&pDrvData->rBDData);
|
retval = tp3780I_EnableDSP(&pDrvData->rBDData);
|
||||||
PRINTK_2(TRACE_MWAVE,
|
PRINTK_2(TRACE_MWAVE,
|
||||||
|
@ -639,7 +639,7 @@ static int __init mwave_init(void)
|
||||||
" Failed to enable DSP\n");
|
" Failed to enable DSP\n");
|
||||||
goto cleanup_error;
|
goto cleanup_error;
|
||||||
}
|
}
|
||||||
pDrvData->bDSPEnabled = TRUE;
|
pDrvData->bDSPEnabled = true;
|
||||||
|
|
||||||
if (misc_register(&mwave_misc_dev) < 0) {
|
if (misc_register(&mwave_misc_dev) < 0) {
|
||||||
PRINTK_ERROR(KERN_ERR_MWAVE
|
PRINTK_ERROR(KERN_ERR_MWAVE
|
||||||
|
@ -647,7 +647,7 @@ static int __init mwave_init(void)
|
||||||
" Failed to register misc device\n");
|
" Failed to register misc device\n");
|
||||||
goto cleanup_error;
|
goto cleanup_error;
|
||||||
}
|
}
|
||||||
pDrvData->bMwaveDevRegistered = TRUE;
|
pDrvData->bMwaveDevRegistered = true;
|
||||||
|
|
||||||
pDrvData->sLine = register_serial_portandirq(
|
pDrvData->sLine = register_serial_portandirq(
|
||||||
pDrvData->rBDData.rDspSettings.usUartBaseIO,
|
pDrvData->rBDData.rDspSettings.usUartBaseIO,
|
||||||
|
@ -668,7 +668,7 @@ static int __init mwave_init(void)
|
||||||
|
|
||||||
if (device_register(&mwave_device))
|
if (device_register(&mwave_device))
|
||||||
goto cleanup_error;
|
goto cleanup_error;
|
||||||
pDrvData->device_registered = TRUE;
|
pDrvData->device_registered = true;
|
||||||
for (i = 0; i < ARRAY_SIZE(mwave_dev_attrs); i++) {
|
for (i = 0; i < ARRAY_SIZE(mwave_dev_attrs); i++) {
|
||||||
if(device_create_file(&mwave_device, mwave_dev_attrs[i])) {
|
if(device_create_file(&mwave_device, mwave_dev_attrs[i])) {
|
||||||
PRINTK_ERROR(KERN_ERR_MWAVE
|
PRINTK_ERROR(KERN_ERR_MWAVE
|
||||||
|
|
|
@ -125,8 +125,8 @@ extern int mwave_uart_io;
|
||||||
|
|
||||||
typedef struct _MWAVE_IPC {
|
typedef struct _MWAVE_IPC {
|
||||||
unsigned short usIntCount; /* 0=none, 1=first, 2=greater than 1st */
|
unsigned short usIntCount; /* 0=none, 1=first, 2=greater than 1st */
|
||||||
BOOLEAN bIsEnabled;
|
bool bIsEnabled;
|
||||||
BOOLEAN bIsHere;
|
bool bIsHere;
|
||||||
/* entry spin lock */
|
/* entry spin lock */
|
||||||
wait_queue_head_t ipc_wait_queue;
|
wait_queue_head_t ipc_wait_queue;
|
||||||
} MWAVE_IPC;
|
} MWAVE_IPC;
|
||||||
|
@ -135,12 +135,12 @@ typedef struct _MWAVE_DEVICE_DATA {
|
||||||
THINKPAD_BD_DATA rBDData; /* board driver's data area */
|
THINKPAD_BD_DATA rBDData; /* board driver's data area */
|
||||||
unsigned long ulIPCSource_ISR; /* IPC source bits for recently processed intr, set during ISR processing */
|
unsigned long ulIPCSource_ISR; /* IPC source bits for recently processed intr, set during ISR processing */
|
||||||
unsigned long ulIPCSource_DPC; /* IPC source bits for recently processed intr, set during DPC processing */
|
unsigned long ulIPCSource_DPC; /* IPC source bits for recently processed intr, set during DPC processing */
|
||||||
BOOLEAN bBDInitialized;
|
bool bBDInitialized;
|
||||||
BOOLEAN bResourcesClaimed;
|
bool bResourcesClaimed;
|
||||||
BOOLEAN bDSPEnabled;
|
bool bDSPEnabled;
|
||||||
BOOLEAN bDSPReset;
|
bool bDSPReset;
|
||||||
MWAVE_IPC IPCs[16];
|
MWAVE_IPC IPCs[16];
|
||||||
BOOLEAN bMwaveDevRegistered;
|
bool bMwaveDevRegistered;
|
||||||
short sLine;
|
short sLine;
|
||||||
int nr_registered_attrs;
|
int nr_registered_attrs;
|
||||||
int device_registered;
|
int device_registered;
|
||||||
|
|
|
@ -493,7 +493,7 @@ exit_smapi_request_error:
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
int smapi_set_DSP_power_state(BOOLEAN bOn)
|
int smapi_set_DSP_power_state(bool bOn)
|
||||||
{
|
{
|
||||||
int bRC = -EIO;
|
int bRC = -EIO;
|
||||||
unsigned short usAX, usBX, usCX, usDX, usDI, usSI;
|
unsigned short usAX, usBX, usCX, usDX, usDI, usSI;
|
||||||
|
@ -556,7 +556,7 @@ int smapi_init(void)
|
||||||
PRINTK_ERROR("smapi::smapi_init, ERROR unable to read from SMAPI port\n");
|
PRINTK_ERROR("smapi::smapi_init, ERROR unable to read from SMAPI port\n");
|
||||||
} else {
|
} else {
|
||||||
PRINTK_2(TRACE_SMAPI,
|
PRINTK_2(TRACE_SMAPI,
|
||||||
"smapi::smapi_init, exit TRUE g_usSmapiPort %x\n",
|
"smapi::smapi_init, exit true g_usSmapiPort %x\n",
|
||||||
g_usSmapiPort);
|
g_usSmapiPort);
|
||||||
retval = 0;
|
retval = 0;
|
||||||
//SmapiQuerySystemID();
|
//SmapiQuerySystemID();
|
||||||
|
|
|
@ -49,10 +49,6 @@
|
||||||
#ifndef _LINUX_SMAPI_H
|
#ifndef _LINUX_SMAPI_H
|
||||||
#define _LINUX_SMAPI_H
|
#define _LINUX_SMAPI_H
|
||||||
|
|
||||||
#define TRUE 1
|
|
||||||
#define FALSE 0
|
|
||||||
#define BOOLEAN int
|
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
int bDSPPresent;
|
int bDSPPresent;
|
||||||
int bDSPEnabled;
|
int bDSPEnabled;
|
||||||
|
@ -74,7 +70,7 @@ typedef struct {
|
||||||
int smapi_init(void);
|
int smapi_init(void);
|
||||||
int smapi_query_DSP_cfg(SMAPI_DSP_SETTINGS * pSettings);
|
int smapi_query_DSP_cfg(SMAPI_DSP_SETTINGS * pSettings);
|
||||||
int smapi_set_DSP_cfg(void);
|
int smapi_set_DSP_cfg(void);
|
||||||
int smapi_set_DSP_power_state(BOOLEAN bOn);
|
int smapi_set_DSP_power_state(bool bOn);
|
||||||
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -80,13 +80,13 @@ static void EnableSRAM(THINKPAD_BD_DATA * pBDData)
|
||||||
WriteMsaCfg(DSP_GpioModeControl_15_8, MKWORD(rGpioMode));
|
WriteMsaCfg(DSP_GpioModeControl_15_8, MKWORD(rGpioMode));
|
||||||
|
|
||||||
MKWORD(rGpioDriverEnable) = 0;
|
MKWORD(rGpioDriverEnable) = 0;
|
||||||
rGpioDriverEnable.Enable10 = TRUE;
|
rGpioDriverEnable.Enable10 = true;
|
||||||
rGpioDriverEnable.Mask10 = TRUE;
|
rGpioDriverEnable.Mask10 = true;
|
||||||
WriteMsaCfg(DSP_GpioDriverEnable_15_8, MKWORD(rGpioDriverEnable));
|
WriteMsaCfg(DSP_GpioDriverEnable_15_8, MKWORD(rGpioDriverEnable));
|
||||||
|
|
||||||
MKWORD(rGpioOutputData) = 0;
|
MKWORD(rGpioOutputData) = 0;
|
||||||
rGpioOutputData.Latch10 = 0;
|
rGpioOutputData.Latch10 = 0;
|
||||||
rGpioOutputData.Mask10 = TRUE;
|
rGpioOutputData.Mask10 = true;
|
||||||
WriteMsaCfg(DSP_GpioOutputData_15_8, MKWORD(rGpioOutputData));
|
WriteMsaCfg(DSP_GpioOutputData_15_8, MKWORD(rGpioOutputData));
|
||||||
|
|
||||||
PRINTK_1(TRACE_TP3780I, "tp3780i::EnableSRAM exit\n");
|
PRINTK_1(TRACE_TP3780I, "tp3780i::EnableSRAM exit\n");
|
||||||
|
@ -127,7 +127,7 @@ static irqreturn_t DspInterrupt(int irq, void *dev_id)
|
||||||
PRINTK_2(TRACE_TP3780I,
|
PRINTK_2(TRACE_TP3780I,
|
||||||
"tp3780i::DspInterrupt usIntCount %x\n",
|
"tp3780i::DspInterrupt usIntCount %x\n",
|
||||||
pDrvData->IPCs[usPCNum - 1].usIntCount);
|
pDrvData->IPCs[usPCNum - 1].usIntCount);
|
||||||
if (pDrvData->IPCs[usPCNum - 1].bIsEnabled == TRUE) {
|
if (pDrvData->IPCs[usPCNum - 1].bIsEnabled == true) {
|
||||||
PRINTK_2(TRACE_TP3780I,
|
PRINTK_2(TRACE_TP3780I,
|
||||||
"tp3780i::DspInterrupt, waking up usPCNum %x\n",
|
"tp3780i::DspInterrupt, waking up usPCNum %x\n",
|
||||||
usPCNum - 1);
|
usPCNum - 1);
|
||||||
|
@ -160,8 +160,8 @@ int tp3780I_InitializeBoardData(THINKPAD_BD_DATA * pBDData)
|
||||||
|
|
||||||
PRINTK_2(TRACE_TP3780I, "tp3780i::tp3780I_InitializeBoardData entry pBDData %p\n", pBDData);
|
PRINTK_2(TRACE_TP3780I, "tp3780i::tp3780I_InitializeBoardData entry pBDData %p\n", pBDData);
|
||||||
|
|
||||||
pBDData->bDSPEnabled = FALSE;
|
pBDData->bDSPEnabled = false;
|
||||||
pSettings->bInterruptClaimed = FALSE;
|
pSettings->bInterruptClaimed = false;
|
||||||
|
|
||||||
retval = smapi_init();
|
retval = smapi_init();
|
||||||
if (retval) {
|
if (retval) {
|
||||||
|
@ -269,7 +269,7 @@ int tp3780I_ReleaseResources(THINKPAD_BD_DATA * pBDData)
|
||||||
|
|
||||||
if (pSettings->bInterruptClaimed) {
|
if (pSettings->bInterruptClaimed) {
|
||||||
free_irq(pSettings->usDspIrq, NULL);
|
free_irq(pSettings->usDspIrq, NULL);
|
||||||
pSettings->bInterruptClaimed = FALSE;
|
pSettings->bInterruptClaimed = false;
|
||||||
}
|
}
|
||||||
|
|
||||||
PRINTK_2(TRACE_TP3780I,
|
PRINTK_2(TRACE_TP3780I,
|
||||||
|
@ -283,7 +283,7 @@ int tp3780I_ReleaseResources(THINKPAD_BD_DATA * pBDData)
|
||||||
int tp3780I_EnableDSP(THINKPAD_BD_DATA * pBDData)
|
int tp3780I_EnableDSP(THINKPAD_BD_DATA * pBDData)
|
||||||
{
|
{
|
||||||
DSP_3780I_CONFIG_SETTINGS *pSettings = &pBDData->rDspSettings;
|
DSP_3780I_CONFIG_SETTINGS *pSettings = &pBDData->rDspSettings;
|
||||||
BOOLEAN bDSPPoweredUp = FALSE, bInterruptAllocated = FALSE;
|
bool bDSPPoweredUp = false, bInterruptAllocated = false;
|
||||||
|
|
||||||
PRINTK_2(TRACE_TP3780I, "tp3780i::tp3780I_EnableDSP entry pBDData %p\n", pBDData);
|
PRINTK_2(TRACE_TP3780I, "tp3780i::tp3780I_EnableDSP entry pBDData %p\n", pBDData);
|
||||||
|
|
||||||
|
@ -336,14 +336,14 @@ int tp3780I_EnableDSP(THINKPAD_BD_DATA * pBDData)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
pSettings->bDspIrqActiveLow = pSettings->bDspIrqPulse = TRUE;
|
pSettings->bDspIrqActiveLow = pSettings->bDspIrqPulse = true;
|
||||||
pSettings->bUartIrqActiveLow = pSettings->bUartIrqPulse = TRUE;
|
pSettings->bUartIrqActiveLow = pSettings->bUartIrqPulse = true;
|
||||||
|
|
||||||
if (pBDData->bShareDspIrq) {
|
if (pBDData->bShareDspIrq) {
|
||||||
pSettings->bDspIrqActiveLow = FALSE;
|
pSettings->bDspIrqActiveLow = false;
|
||||||
}
|
}
|
||||||
if (pBDData->bShareUartIrq) {
|
if (pBDData->bShareUartIrq) {
|
||||||
pSettings->bUartIrqActiveLow = FALSE;
|
pSettings->bUartIrqActiveLow = false;
|
||||||
}
|
}
|
||||||
|
|
||||||
pSettings->usNumTransfers = TP_CFG_NumTransfers;
|
pSettings->usNumTransfers = TP_CFG_NumTransfers;
|
||||||
|
@ -373,16 +373,16 @@ int tp3780I_EnableDSP(THINKPAD_BD_DATA * pBDData)
|
||||||
PRINTK_3(TRACE_TP3780I,
|
PRINTK_3(TRACE_TP3780I,
|
||||||
"tp3780i::tp3780I_EnableDSP, got interrupt %x bShareDspIrq %x\n",
|
"tp3780i::tp3780I_EnableDSP, got interrupt %x bShareDspIrq %x\n",
|
||||||
pSettings->usDspIrq, pBDData->bShareDspIrq);
|
pSettings->usDspIrq, pBDData->bShareDspIrq);
|
||||||
bInterruptAllocated = TRUE;
|
bInterruptAllocated = true;
|
||||||
pSettings->bInterruptClaimed = TRUE;
|
pSettings->bInterruptClaimed = true;
|
||||||
}
|
}
|
||||||
|
|
||||||
smapi_set_DSP_power_state(FALSE);
|
smapi_set_DSP_power_state(false);
|
||||||
if (smapi_set_DSP_power_state(TRUE)) {
|
if (smapi_set_DSP_power_state(true)) {
|
||||||
PRINTK_ERROR(KERN_ERR_MWAVE "tp3780i::tp3780I_EnableDSP: Error: smapi_set_DSP_power_state(TRUE) failed\n");
|
PRINTK_ERROR(KERN_ERR_MWAVE "tp3780i::tp3780I_EnableDSP: Error: smapi_set_DSP_power_state(true) failed\n");
|
||||||
goto exit_cleanup;
|
goto exit_cleanup;
|
||||||
} else {
|
} else {
|
||||||
bDSPPoweredUp = TRUE;
|
bDSPPoweredUp = true;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (dsp3780I_EnableDSP(pSettings, s_ausThinkpadIrqToField, s_ausThinkpadDmaToField)) {
|
if (dsp3780I_EnableDSP(pSettings, s_ausThinkpadIrqToField, s_ausThinkpadDmaToField)) {
|
||||||
|
@ -392,7 +392,7 @@ int tp3780I_EnableDSP(THINKPAD_BD_DATA * pBDData)
|
||||||
|
|
||||||
EnableSRAM(pBDData);
|
EnableSRAM(pBDData);
|
||||||
|
|
||||||
pBDData->bDSPEnabled = TRUE;
|
pBDData->bDSPEnabled = true;
|
||||||
|
|
||||||
PRINTK_1(TRACE_TP3780I, "tp3780i::tp3780I_EnableDSP exit\n");
|
PRINTK_1(TRACE_TP3780I, "tp3780i::tp3780I_EnableDSP exit\n");
|
||||||
|
|
||||||
|
@ -401,10 +401,10 @@ int tp3780I_EnableDSP(THINKPAD_BD_DATA * pBDData)
|
||||||
exit_cleanup:
|
exit_cleanup:
|
||||||
PRINTK_ERROR("tp3780i::tp3780I_EnableDSP: Cleaning up\n");
|
PRINTK_ERROR("tp3780i::tp3780I_EnableDSP: Cleaning up\n");
|
||||||
if (bDSPPoweredUp)
|
if (bDSPPoweredUp)
|
||||||
smapi_set_DSP_power_state(FALSE);
|
smapi_set_DSP_power_state(false);
|
||||||
if (bInterruptAllocated) {
|
if (bInterruptAllocated) {
|
||||||
free_irq(pSettings->usDspIrq, NULL);
|
free_irq(pSettings->usDspIrq, NULL);
|
||||||
pSettings->bInterruptClaimed = FALSE;
|
pSettings->bInterruptClaimed = false;
|
||||||
}
|
}
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
@ -421,10 +421,10 @@ int tp3780I_DisableDSP(THINKPAD_BD_DATA * pBDData)
|
||||||
dsp3780I_DisableDSP(&pBDData->rDspSettings);
|
dsp3780I_DisableDSP(&pBDData->rDspSettings);
|
||||||
if (pSettings->bInterruptClaimed) {
|
if (pSettings->bInterruptClaimed) {
|
||||||
free_irq(pSettings->usDspIrq, NULL);
|
free_irq(pSettings->usDspIrq, NULL);
|
||||||
pSettings->bInterruptClaimed = FALSE;
|
pSettings->bInterruptClaimed = false;
|
||||||
}
|
}
|
||||||
smapi_set_DSP_power_state(FALSE);
|
smapi_set_DSP_power_state(false);
|
||||||
pBDData->bDSPEnabled = FALSE;
|
pBDData->bDSPEnabled = false;
|
||||||
}
|
}
|
||||||
|
|
||||||
PRINTK_2(TRACE_TP3780I, "tp3780i::tp3780I_DisableDSP exit retval %x\n", retval);
|
PRINTK_2(TRACE_TP3780I, "tp3780i::tp3780I_DisableDSP exit retval %x\n", retval);
|
||||||
|
@ -516,7 +516,7 @@ int tp3780I_ReadWriteDspDStore(THINKPAD_BD_DATA * pBDData, unsigned int uOpcode,
|
||||||
int retval = 0;
|
int retval = 0;
|
||||||
DSP_3780I_CONFIG_SETTINGS *pSettings = &pBDData->rDspSettings;
|
DSP_3780I_CONFIG_SETTINGS *pSettings = &pBDData->rDspSettings;
|
||||||
unsigned short usDspBaseIO = pSettings->usDspBaseIO;
|
unsigned short usDspBaseIO = pSettings->usDspBaseIO;
|
||||||
BOOLEAN bRC = 0;
|
bool bRC = 0;
|
||||||
|
|
||||||
PRINTK_6(TRACE_TP3780I,
|
PRINTK_6(TRACE_TP3780I,
|
||||||
"tp3780i::tp3780I_ReadWriteDspDStore entry pBDData %p, uOpcode %x, pvBuffer %p, uCount %x, ulDSPAddr %lx\n",
|
"tp3780i::tp3780I_ReadWriteDspDStore entry pBDData %p, uOpcode %x, pvBuffer %p, uCount %x, ulDSPAddr %lx\n",
|
||||||
|
@ -552,7 +552,7 @@ int tp3780I_ReadWriteDspIStore(THINKPAD_BD_DATA * pBDData, unsigned int uOpcode,
|
||||||
int retval = 0;
|
int retval = 0;
|
||||||
DSP_3780I_CONFIG_SETTINGS *pSettings = &pBDData->rDspSettings;
|
DSP_3780I_CONFIG_SETTINGS *pSettings = &pBDData->rDspSettings;
|
||||||
unsigned short usDspBaseIO = pSettings->usDspBaseIO;
|
unsigned short usDspBaseIO = pSettings->usDspBaseIO;
|
||||||
BOOLEAN bRC = 0;
|
bool bRC = 0;
|
||||||
|
|
||||||
PRINTK_6(TRACE_TP3780I,
|
PRINTK_6(TRACE_TP3780I,
|
||||||
"tp3780i::tp3780I_ReadWriteDspIStore entry pBDData %p, uOpcode %x, pvBuffer %p, uCount %x, ulDSPAddr %lx\n",
|
"tp3780i::tp3780I_ReadWriteDspIStore entry pBDData %p, uOpcode %x, pvBuffer %p, uCount %x, ulDSPAddr %lx\n",
|
||||||
|
|
Loading…
Add table
Reference in a new issue