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drm/amdgpu: move fence structure into amdgpu_fence.c

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No need to have that in the header file any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Christian König 2016-03-11 15:12:53 +01:00 • committed by Alex Deucher
parent 77163f074a
commit 22e5a2f46a
2 changed files with 25 additions and 26 deletions
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25
drivers/gpu/drm/amd/amdgpu/amdgpu.h
View file

@ -180,7 +180,6 @@ extern int amdgpu_powerplay;
#define CIK_CURSOR_HEIGHT 128 #define CIK_CURSOR_HEIGHT 128
struct amdgpu_device; struct amdgpu_device;
struct amdgpu_fence;
struct amdgpu_ib; struct amdgpu_ib;
struct amdgpu_vm; struct amdgpu_vm;
struct amdgpu_ring; struct amdgpu_ring;
@ -403,16 +402,6 @@ struct amdgpu_fence_driver {
#define AMDGPU_FENCE_FLAG_64BIT (1 << 0) #define AMDGPU_FENCE_FLAG_64BIT (1 << 0)
#define AMDGPU_FENCE_FLAG_INT (1 << 1) #define AMDGPU_FENCE_FLAG_INT (1 << 1)
struct amdgpu_fence {
struct fence base;
/* RB, DMA, etc. */
struct amdgpu_ring *ring;
uint64_t seq;
wait_queue_t fence_wake;
};
struct amdgpu_user_fence { struct amdgpu_user_fence {
/* write-back bo */ /* write-back bo */
struct amdgpu_bo *bo; struct amdgpu_bo *bo;
@ -2108,20 +2097,6 @@ void amdgpu_io_wreg(struct amdgpu_device *adev, u32 reg, u32 v);
u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index); u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index);
void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v); void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v);
/*
* Cast helper
*/
extern const struct fence_ops amdgpu_fence_ops;
static inline struct amdgpu_fence *to_amdgpu_fence(struct fence *f)
{
struct amdgpu_fence *__f = container_of(f, struct amdgpu_fence, base);
if (__f->base.ops == &amdgpu_fence_ops)
return __f;
return NULL;
}
/* /*
* Registers read & write functions. * Registers read & write functions.
*/ */

26
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
View file

@ -47,9 +47,33 @@
* that the the relevant GPU caches have been flushed. * that the the relevant GPU caches have been flushed.
*/ */
struct amdgpu_fence {
struct fence base;
/* RB, DMA, etc. */
struct amdgpu_ring *ring;
uint64_t seq;
wait_queue_t fence_wake;
};
static struct kmem_cache *amdgpu_fence_slab; static struct kmem_cache *amdgpu_fence_slab;
static atomic_t amdgpu_fence_slab_ref = ATOMIC_INIT(0); static atomic_t amdgpu_fence_slab_ref = ATOMIC_INIT(0);
/*
* Cast helper
*/
static const struct fence_ops amdgpu_fence_ops;
static inline struct amdgpu_fence *to_amdgpu_fence(struct fence *f)
{
struct amdgpu_fence *__f = container_of(f, struct amdgpu_fence, base);
if (__f->base.ops == &amdgpu_fence_ops)
return __f;
return NULL;
}
/** /**
* amdgpu_fence_write - write a fence value * amdgpu_fence_write - write a fence value
* *
@ -663,7 +687,7 @@ static void amdgpu_fence_release(struct fence *f)
kmem_cache_free(amdgpu_fence_slab, fence); kmem_cache_free(amdgpu_fence_slab, fence);
} }
const struct fence_ops amdgpu_fence_ops = { static const struct fence_ops amdgpu_fence_ops = {
.get_driver_name = amdgpu_fence_get_driver_name, .get_driver_name = amdgpu_fence_get_driver_name,
.get_timeline_name = amdgpu_fence_get_timeline_name, .get_timeline_name = amdgpu_fence_get_timeline_name,
.enable_signaling = amdgpu_fence_enable_signaling, .enable_signaling = amdgpu_fence_enable_signaling,