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drm/amd/display: Fix dmub soft hang for PSR 1
[Why] Unexpected change of aux hw mapping causes dmub soft hang when initiate aux transation at wrong aux channel. ddc_channel stands for hw dp aux index which is from vbios, but link_index is pure software concept for link count depending on which link is probed first. They are not interchangeable. dmub aux transaction could pass if happens eDP link_index gets the same value as vbios ddc_channel, e.g., ddc_channel = 1, link_index = 1 if they gets different, e.g., ddc_channel = 2, link_index = 0, overwrite ddc_channel with link_index will have wrong ddc channel being used for aux transaction in dmub PSR, cause aux transaction soft hang. [How] ddc_channel mapping to each link is determined by vbios and further parsed in dc. Such info. should not be touched in any kind, otherwise the mapping is screwed up leading to aux transaction timeout. Reviewed-by: Aurabindo Jayamohanan Pillai <Aurabindo.Pillai@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 changed files with 1 additions and 3 deletions
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@ -8648,7 +8648,7 @@ static int amdgpu_dm_i2c_xfer(struct i2c_adapter *i2c_adap,
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if (dc_submit_i2c(
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ddc_service->ctx->dc,
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ddc_service->ddc_pin->hw_info.ddc_channel,
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ddc_service->link->link_index,
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&cmd))
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result = num;
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@ -8684,8 +8684,6 @@ create_i2c(struct ddc_service *ddc_service,
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snprintf(i2c->base.name, sizeof(i2c->base.name), "AMDGPU DM i2c hw bus %d", link_index);
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i2c_set_adapdata(&i2c->base, i2c);
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i2c->ddc_service = ddc_service;
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if (i2c->ddc_service->ddc_pin)
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i2c->ddc_service->ddc_pin->hw_info.ddc_channel = link_index;
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return i2c;
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}
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