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arm64: dts: apple: t7000: Add CPU caches

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Add information about CPU caches in Apple A8 SoC.

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Link: https://lore.kernel.org/r/20250220-caches-v1-2-2c7011097768@gmail.com
Signed-off-by: Sven Peter <sven@svenpeter.dev>
This commit is contained in:
Nick Chan 2025-02-20 20:21:43 +08:00 • committed by Sven Peter
parent 0a52d413af
commit 1ed7edcf5c
1 changed files with 13 additions and 0 deletions
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13
arch/arm64/boot/dts/apple/t7000.dtsi
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@ -37,6 +37,9 @@
operating-points-v2 = <&typhoon_opp>;
enable-method = "spin-table";
device_type = "cpu";
next-level-cache = <&l2_cache>;
i-cache-size = <0x10000>;
d-cache-size = <0x10000>;
};
cpu1: cpu@1 {
@ -47,6 +50,16 @@
operating-points-v2 = <&typhoon_opp>;
enable-method = "spin-table";
device_type = "cpu";
next-level-cache = <&l2_cache>;
i-cache-size = <0x10000>;
d-cache-size = <0x10000>;
};
l2_cache: l2-cache {
compatible = "cache";
cache-level = <2>;
cache-unified;
cache-size = <0x100000>;
};
};